diff --git a/components/esp_hw_support/adc_share_hw_ctrl.c b/components/esp_hw_support/adc_share_hw_ctrl.c
index 32f3c67b79..a9054d47a1 100644
--- a/components/esp_hw_support/adc_share_hw_ctrl.c
+++ b/components/esp_hw_support/adc_share_hw_ctrl.c
@@ -207,6 +207,9 @@ void adc_apb_periph_claim(void)
     if (s_adc_digi_ctrlr_cnt == 1) {
         ADC_BUS_CLK_ATOMIC() {
             adc_ll_enable_bus_clock(true);
+#if SOC_RCC_IS_INDEPENDENT
+            adc_ll_enable_func_clock(true);
+#endif
             adc_ll_reset_register();
         }
     }
@@ -221,6 +224,9 @@ void adc_apb_periph_free(void)
     if (s_adc_digi_ctrlr_cnt == 0) {
         ADC_BUS_CLK_ATOMIC() {
             adc_ll_enable_bus_clock(false);
+#if SOC_RCC_IS_INDEPENDENT
+            adc_ll_enable_func_clock(false);
+#endif
         }
     } else if (s_adc_digi_ctrlr_cnt < 0) {
         portEXIT_CRITICAL(&s_spinlock);
diff --git a/components/hal/esp32c5/include/hal/adc_ll.h b/components/hal/esp32c5/include/hal/adc_ll.h
index 616ea25e61..7c491440b4 100644
--- a/components/hal/esp32c5/include/hal/adc_ll.h
+++ b/components/hal/esp32c5/include/hal/adc_ll.h
@@ -566,6 +566,17 @@ static inline void adc_ll_enable_bus_clock(bool enable)
     PCR.saradc_conf.saradc_reg_clk_en = enable;
 }
 
+#if SOC_RCC_IS_INDEPENDENT
+/**
+ * @brief Enable the ADC function clock
+ * @param enable true to enable, false to disable
+ */
+static inline void adc_ll_enable_func_clock(bool enable)
+{
+    PCR.saradc_clkm_conf.saradc_clkm_en = enable;
+}
+#endif
+
 /**
  * @brief Reset ADC module
  */
diff --git a/components/hal/esp32c6/include/hal/adc_ll.h b/components/hal/esp32c6/include/hal/adc_ll.h
index db51a869da..439f4c0514 100644
--- a/components/hal/esp32c6/include/hal/adc_ll.h
+++ b/components/hal/esp32c6/include/hal/adc_ll.h
@@ -565,6 +565,17 @@ static inline void adc_ll_enable_bus_clock(bool enable)
     PCR.saradc_conf.saradc_reg_clk_en = enable;
 }
 
+#if SOC_RCC_IS_INDEPENDENT
+/**
+ * @brief Enable the ADC function clock
+ * @param enable true to enable, false to disable
+ */
+static inline void adc_ll_enable_func_clock(bool enable)
+{
+    PCR.saradc_clkm_conf.saradc_clkm_en = enable;
+}
+#endif
+
 /**
  * @brief Reset ADC module
  */
diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h
index 8c02ddd191..ab7f8fa58f 100644
--- a/components/hal/esp32h2/include/hal/adc_ll.h
+++ b/components/hal/esp32h2/include/hal/adc_ll.h
@@ -566,6 +566,17 @@ static inline void adc_ll_enable_bus_clock(bool enable)
     PCR.saradc_conf.saradc_reg_clk_en = enable;
 }
 
+#if SOC_RCC_IS_INDEPENDENT
+/**
+ * @brief Enable the ADC function clock
+ * @param enable true to enable, false to disable
+ */
+static inline void adc_ll_enable_func_clock(bool enable)
+{
+    PCR.saradc_clkm_conf.saradc_clkm_en = enable;
+}
+#endif
+
 /**
  * @brief Reset ADC module
  */