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refactor(i2c_p4eco5): update i2c_struct.h on P4 ECO5

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Update the i2c_struct.h file to support P4ECO5.
This commit is contained in:
Chen Chen
2025-08-26 11:25:16 +08:00
parent 1f0152dd3c
commit 2ff0e32696
3 changed files with 11 additions and 1246 deletions
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4
components/esp_rom/esp32p4/ld/esp32p4.rom.eco5.ld
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@@ -320,8 +320,8 @@ gpio_get_input_level = 0x4fc0055c;
gpio_matrix_in = 0x4fc00560; gpio_matrix_in = 0x4fc00560;
gpio_matrix_out = 0x4fc00564; gpio_matrix_out = 0x4fc00564;
gpio_bypass_matrix_in = 0x4fc00568; gpio_bypass_matrix_in = 0x4fc00568;
gpio_output_disable = 0x4fc0056c; /* gpio_output_disable = 0x4fc0056c; */
gpio_output_enable = 0x4fc00570; /* gpio_output_enable = 0x4fc00570; */
gpio_pad_input_disable = 0x4fc00574; gpio_pad_input_disable = 0x4fc00574;
gpio_pad_input_enable = 0x4fc00578; gpio_pad_input_enable = 0x4fc00578;
gpio_pad_pulldown = 0x4fc0057c; gpio_pad_pulldown = 0x4fc0057c;

1235
components/soc/esp32p4/register/hw_ver2/soc/i2c_eco5_struct.h
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File diff suppressed because it is too large Load Diff

18
components/soc/esp32p4/register/hw_ver2/soc/i2c_struct.h
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@@ -235,9 +235,9 @@ typedef union {
/** clk_en : R/W; bitpos: [8]; default: 0; /** clk_en : R/W; bitpos: [8]; default: 0;
* Configures whether to gate clock signal for registers. * Configures whether to gate clock signal for registers.
* *
* 0: Force clock on for registers * 0: Support clock only when registers are read or written to by software
* *
* 1: Support clock only when registers are read or written to by software. * 1: Force clock on for registers
*/ */
uint32_t clk_en:1; uint32_t clk_en:1;
/** arbitration_en : R/W; bitpos: [9]; default: 1; /** arbitration_en : R/W; bitpos: [9]; default: 1;
@@ -550,7 +550,7 @@ typedef union {
uint32_t slave_addressed:1; uint32_t slave_addressed:1;
uint32_t reserved_6:2; uint32_t reserved_6:2;
/** rxfifo_cnt : RO; bitpos: [13:8]; default: 0; /** rxfifo_cnt : RO; bitpos: [13:8]; default: 0;
* Represents the number of data bytes to be sent. * Represents the number of data bytes received in RAM.
*/ */
uint32_t rxfifo_cnt:6; uint32_t rxfifo_cnt:6;
/** stretch_cause : RO; bitpos: [15:14]; default: 3; /** stretch_cause : RO; bitpos: [15:14]; default: 3;
@@ -564,7 +564,7 @@ typedef union {
uint32_t stretch_cause:2; uint32_t stretch_cause:2;
uint32_t reserved_16:2; uint32_t reserved_16:2;
/** txfifo_cnt : RO; bitpos: [23:18]; default: 0; /** txfifo_cnt : RO; bitpos: [23:18]; default: 0;
* Represents the number of data bytes received in RAM. * Represents the number of data bytes to be sent.
*/ */
uint32_t txfifo_cnt:6; uint32_t txfifo_cnt:6;
/** scl_main_state_last : RO; bitpos: [26:24]; default: 0; /** scl_main_state_last : RO; bitpos: [26:24]; default: 0;
@@ -1009,11 +1009,11 @@ typedef union {
/** command : R/W; bitpos: [13:0]; default: 0; /** command : R/W; bitpos: [13:0]; default: 0;
* Configures command. It consists of three parts: * Configures command. It consists of three parts:
* op_code is the command, * op_code is the command,
* 0: RSTART, * 1: WRITE
* 1: WRITE, * 2: STOP
* 2: READ, * 3: READ
* 3: STOP, * 4: END
* 4: END. * 6: RSTART
* *
* Byte_num represents the number of bytes that need to be sent or received. * Byte_num represents the number of bytes that need to be sent or received.
* ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd * ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd