From 30fa7163767f58b9c3194cc80a56c14082f05606 Mon Sep 17 00:00:00 2001 From: "Michael (XIAO Xufeng)" Date: Tue, 7 Apr 2020 22:58:26 +0800 Subject: [PATCH] spi: fix cs num support for different SPI hosts. For esp32, all SPI hosts have 3 CS pins, however, on ESP32, SPIMEM1 has two CS pins, FSPI has six, while HSPI has three. --- components/soc/include/hal/spi_flash_hal.h | 2 +- components/soc/soc/esp32s2/include/soc/spi_caps.h | 2 +- components/soc/src/esp32/include/hal/spi_flash_ll.h | 6 +++--- components/soc/src/esp32s2/include/hal/gpspi_flash_ll.h | 8 ++++++-- components/soc/src/esp32s2/include/hal/spi_ll.h | 3 +++ components/soc/src/esp32s2/include/hal/spimem_flash_ll.h | 6 +++--- components/soc/src/hal/spi_flash_hal.c | 4 ++++ 7 files changed, 21 insertions(+), 10 deletions(-) diff --git a/components/soc/include/hal/spi_flash_hal.h b/components/soc/include/hal/spi_flash_hal.h index 8ea7a454da..ffc1a22f03 100644 --- a/components/soc/include/hal/spi_flash_hal.h +++ b/components/soc/include/hal/spi_flash_hal.h @@ -48,7 +48,7 @@ typedef struct { /// Configuration structure for the SPI driver. typedef struct { spi_host_device_t host_id; ///< SPI peripheral ID. - int cs_num; ///< Which cs pin is used, 0-2. + int cs_num; ///< Which cs pin is used, 0-(SOC_SPI_PERIPH_CS_NUM-1). bool iomux; ///< Whether the IOMUX is used, used for timing compensation. int input_delay_ns; ///< Input delay on the MISO pin after the launch clock， used for timing compensation. esp_flash_speed_t speed;///< SPI flash clock speed to work at. diff --git a/components/soc/soc/esp32s2/include/soc/spi_caps.h b/components/soc/soc/esp32s2/include/soc/spi_caps.h index 1352bcde78..7e2bb74aba 100644 --- a/components/soc/soc/esp32s2/include/soc/spi_caps.h +++ b/components/soc/soc/esp32s2/include/soc/spi_caps.h @@ -16,7 +16,7 @@ #define SOC_SPI_PERIPH_NUM 3 #define SOC_SPI_DMA_CHAN_NUM 3 -#define SOC_SPI_PERIPH_CS_NUM(i) 3 +#define SOC_SPI_PERIPH_CS_NUM(i) (((i)==0)? 2: (((i)==1)? 6: 3)) #define SPI_FUNC_NUM 0 #define SPI_IOMUX_PIN_NUM_HD 27 diff --git a/components/soc/src/esp32/include/hal/spi_flash_ll.h b/components/soc/src/esp32/include/hal/spi_flash_ll.h index 74f37db4be..50a3d0d641 100644 --- a/components/soc/src/esp32/include/hal/spi_flash_ll.h +++ b/components/soc/src/esp32/include/hal/spi_flash_ll.h @@ -238,9 +238,9 @@ static inline bool spi_flash_ll_host_idle(const spi_dev_t *dev) */ static inline void spi_flash_ll_set_cs_pin(spi_dev_t *dev, int pin) { - dev->pin.cs0_dis = (pin == 0) ? 0 : 1; - dev->pin.cs1_dis = (pin == 1) ? 0 : 1; - dev->pin.cs2_dis = (pin == 2) ? 0 : 1; + dev->pin.cs0_dis = (pin != 0); + dev->pin.cs1_dis = (pin != 1); + dev->pin.cs2_dis = (pin != 2); } /** diff --git a/components/soc/src/esp32s2/include/hal/gpspi_flash_ll.h b/components/soc/src/esp32s2/include/hal/gpspi_flash_ll.h index 4af85d1e85..2db7e6fc4a 100644 --- a/components/soc/src/esp32s2/include/hal/gpspi_flash_ll.h +++ b/components/soc/src/esp32s2/include/hal/gpspi_flash_ll.h @@ -185,8 +185,12 @@ static inline void gpspi_flash_ll_read_phase(spi_dev_t *dev) */ static inline void gpspi_flash_ll_set_cs_pin(spi_dev_t *dev, int pin) { - dev->misc.cs0_dis = (pin == 0) ? 0 : 1; - dev->misc.cs1_dis = (pin == 1) ? 0 : 1; + dev->misc.cs0_dis = (pin != 0); + dev->misc.cs1_dis = (pin != 1); + dev->misc.cs2_dis = (pin != 2); + dev->misc.cs3_dis = (pin != 3); + dev->misc.cs4_dis = (pin != 4); + dev->misc.cs5_dis = (pin != 5); } /** diff --git a/components/soc/src/esp32s2/include/hal/spi_ll.h b/components/soc/src/esp32s2/include/hal/spi_ll.h index f69ad2a181..cc3a3ded5a 100644 --- a/components/soc/src/esp32s2/include/hal/spi_ll.h +++ b/components/soc/src/esp32s2/include/hal/spi_ll.h @@ -576,6 +576,9 @@ static inline void spi_ll_master_select_cs(spi_dev_t *hw, int cs_id) hw->misc.cs0_dis = (cs_id == 0) ? 0 : 1; hw->misc.cs1_dis = (cs_id == 1) ? 0 : 1; hw->misc.cs2_dis = (cs_id == 2) ? 0 : 1; + hw->misc.cs3_dis = (cs_id == 3) ? 0 : 1; + hw->misc.cs4_dis = (cs_id == 4) ? 0 : 1; + hw->misc.cs5_dis = (cs_id == 5) ? 0 : 1; } /*------------------------------------------------------------------------------ diff --git a/components/soc/src/esp32s2/include/hal/spimem_flash_ll.h b/components/soc/src/esp32s2/include/hal/spimem_flash_ll.h index cb257d7f3f..d5a0e26a09 100644 --- a/components/soc/src/esp32s2/include/hal/spimem_flash_ll.h +++ b/components/soc/src/esp32s2/include/hal/spimem_flash_ll.h @@ -227,12 +227,12 @@ static inline void spimem_flash_ll_read_phase(spi_mem_dev_t *dev) * Select which pin to use for the flash * * @param dev Beginning address of the peripheral registers. - * @param pin Pin ID to use, 0-2. Set to other values to disable all the CS pins. + * @param pin Pin ID to use, 0-1. Set to other values to disable all the CS pins. */ static inline void spimem_flash_ll_set_cs_pin(spi_mem_dev_t *dev, int pin) { - dev->misc.cs0_dis = (pin == 0) ? 0 : 1; - dev->misc.cs1_dis = (pin == 1) ? 0 : 1; + dev->misc.cs0_dis = (pin != 0); + dev->misc.cs1_dis = (pin != 1); } /** diff --git a/components/soc/src/hal/spi_flash_hal.c b/components/soc/src/hal/spi_flash_hal.c index f8c2f3c611..343c3ede3c 100644 --- a/components/soc/src/hal/spi_flash_hal.c +++ b/components/soc/src/hal/spi_flash_hal.c @@ -15,6 +15,7 @@ #include #include "hal/spi_flash_hal.h" #include "string.h" +#include "soc/spi_caps.h" #include "hal/hal_defs.h" #define APB_CYCLE_NS (1000*1000*1000LL/APB_CLK_FREQ) @@ -68,6 +69,9 @@ esp_err_t spi_flash_hal_init(spi_flash_hal_context_t *data_out, const spi_flash_ if (!esp_ptr_internal(data_out)) { return ESP_ERR_INVALID_ARG; } + if (cfg->cs_num >= SOC_SPI_PERIPH_CS_NUM(cfg->host_id)) { + return ESP_ERR_INVALID_ARG; + } spi_flash_hal_clock_config_t clock_cfg = spi_flash_clk_cfg_reg[cfg->speed];