diff --git a/components/soc/esp32c2/include/soc/soc.h b/components/soc/esp32c2/include/soc/soc.h
index c0d7e84dab..0a5008b08c 100644
--- a/components/soc/esp32c2/include/soc/soc.h
+++ b/components/soc/esp32c2/include/soc/soc.h
@@ -201,7 +201,7 @@
 #define SOC_DEBUG_HIGH 0x28000000
 
 // Start (highest address) of ROM boot stack, only relevant during early boot
-#define SOC_ROM_STACK_START         0x3fcebf10
+#define SOC_ROM_STACK_START         0x3fcdeb70
 #define SOC_ROM_STACK_SIZE          0x2000
 
 //On RISC-V CPUs, the interrupt sources are all external interrupts, whose type, source and priority are configured by SW.