From 333858e57b818675da37a5f709e493eb5027b2b9 Mon Sep 17 00:00:00 2001
From: Chen Jichang <chenjichang@espressif.com>
Date: Fri, 1 Aug 2025 19:54:08 +0800
Subject: [PATCH] fix(dma): add burst size check when dma access psram

---
 components/esp_hw_support/dma/gdma.c          | 6 ++++++
 components/hal/esp32c5/include/hal/gdma_ll.h  | 1 +
 components/hal/esp32c61/include/hal/gdma_ll.h | 1 +
 components/hal/esp32h4/include/hal/gdma_ll.h  | 1 +
 components/hal/esp32p4/include/hal/gdma_ll.h  | 1 +
 components/hal/esp32s3/include/hal/gdma_ll.h  | 1 +
 6 files changed, 11 insertions(+)

diff --git a/components/esp_hw_support/dma/gdma.c b/components/esp_hw_support/dma/gdma.c
index f222e9817e..29211df99e 100644
--- a/components/esp_hw_support/dma/gdma.c
+++ b/components/esp_hw_support/dma/gdma.c
@@ -357,6 +357,12 @@ esp_err_t gdma_config_transfer(gdma_channel_handle_t dma_chan, const gdma_transf
         // burst size must be power of 2
         ESP_RETURN_ON_FALSE((max_data_burst_size & (max_data_burst_size - 1)) == 0, ESP_ERR_INVALID_ARG,
                             TAG, "invalid max_data_burst_size: %"PRIu32, max_data_burst_size);
+#if SOC_AHB_GDMA_SUPPORT_PSRAM || SOC_AXI_GDMA_SUPPORT_PSRAM
+        if (config->access_ext_mem) {
+            ESP_RETURN_ON_FALSE(max_data_burst_size <= GDMA_LL_MAX_BURST_SIZE_PSRAM, ESP_ERR_INVALID_ARG,
+                                TAG, "max_data_burst_size must not exceed %d when accessing external memory", GDMA_LL_MAX_BURST_SIZE_PSRAM);
+        }
+#endif
     }
     gdma_pair_t *pair = dma_chan->pair;
     gdma_group_t *group = pair->group;
diff --git a/components/hal/esp32c5/include/hal/gdma_ll.h b/components/hal/esp32c5/include/hal/gdma_ll.h
index f167217769..f4a17e88f4 100644
--- a/components/hal/esp32c5/include/hal/gdma_ll.h
+++ b/components/hal/esp32c5/include/hal/gdma_ll.h
@@ -8,6 +8,7 @@
 #include "soc/pcr_struct.h"
 #include "hal/ahb_dma_ll.h"
 #define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
+#define GDMA_LL_MAX_BURST_SIZE_PSRAM      32 // PSRAM controller doesn't support burst access with size > 32 bytes
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/hal/esp32c61/include/hal/gdma_ll.h b/components/hal/esp32c61/include/hal/gdma_ll.h
index f167217769..f4a17e88f4 100644
--- a/components/hal/esp32c61/include/hal/gdma_ll.h
+++ b/components/hal/esp32c61/include/hal/gdma_ll.h
@@ -8,6 +8,7 @@
 #include "soc/pcr_struct.h"
 #include "hal/ahb_dma_ll.h"
 #define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
+#define GDMA_LL_MAX_BURST_SIZE_PSRAM      32 // PSRAM controller doesn't support burst access with size > 32 bytes
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/hal/esp32h4/include/hal/gdma_ll.h b/components/hal/esp32h4/include/hal/gdma_ll.h
index 5c7ca2ad77..0e04e3b495 100644
--- a/components/hal/esp32h4/include/hal/gdma_ll.h
+++ b/components/hal/esp32h4/include/hal/gdma_ll.h
@@ -8,6 +8,7 @@
 #include "soc/pcr_struct.h"
 #include "hal/ahb_dma_ll.h"
 #define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
+#define GDMA_LL_MAX_BURST_SIZE_PSRAM      64 // PSRAM support INCR16
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/hal/esp32p4/include/hal/gdma_ll.h b/components/hal/esp32p4/include/hal/gdma_ll.h
index 17f1b5a15e..8fd8ad5f2d 100644
--- a/components/hal/esp32p4/include/hal/gdma_ll.h
+++ b/components/hal/esp32p4/include/hal/gdma_ll.h
@@ -47,6 +47,7 @@
 
 #define GDMA_LL_AHB_DESC_ALIGNMENT      4
 #define GDMA_LL_AXI_DESC_ALIGNMENT      8
+#define GDMA_LL_MAX_BURST_SIZE_PSRAM    64 // PSRAM controller doesn't support burst access with size > 64 bytes
 
 #define GDMA_LL_TX_ETM_EVENT_TABLE(group, chan, event)                \
     (uint32_t[2][GDMA_ETM_EVENT_MAX]){                                \
diff --git a/components/hal/esp32s3/include/hal/gdma_ll.h b/components/hal/esp32s3/include/hal/gdma_ll.h
index c232966ca5..d69c74fd1e 100644
--- a/components/hal/esp32s3/include/hal/gdma_ll.h
+++ b/components/hal/esp32s3/include/hal/gdma_ll.h
@@ -64,6 +64,7 @@ extern "C" {
 
 #define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
 #define GDMA_LL_AHB_RX_BURST_NEEDS_ALIGNMENT  1
+#define GDMA_LL_MAX_BURST_SIZE_PSRAM          64 // PSRAM controller doesn't support burst access with size > 64 bytes
 
 ///////////////////////////////////// Common /////////////////////////////////////////