espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-11-01 23:51:49 +01:00
Code Issues Packages Projects Releases Wiki Activity

Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.

Browse Source
This commit is contained in:
Jeroen Domburg
2017-07-20 16:26:35 +08:00
parent 518edac42f
commit 34372a091c
22 changed files with 1412 additions and 198 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
components/soc/esp32/include/soc/soc.h
View File

@@ -67,6 +67,9 @@
#define SOC_RTC_IRAM_HIGH 0x400C2000
#define SOC_RTC_DATA_LOW 0x50000000
#define SOC_RTC_DATA_HIGH 0x50002000
#define SOC_EXTRAM_DATA_LOW 0x3F800000
#define SOC_EXTRAM_DATA_HIGH 0x3FC00000
#define DR_REG_DPORT_BASE 0x3ff00000
#define DR_REG_AES_BASE 0x3ff01000
@@ -119,7 +122,7 @@
#define DR_REG_UART2_BASE 0x3ff6E000
#define DR_REG_PWM2_BASE 0x3ff6F000
#define DR_REG_PWM3_BASE 0x3ff70000
#define PERIPHS_SPI_ENCRYPT_BASEADDR DR_REG_SPI_ENCRYPT_BASE
#define PERIPHS_SPI_ENCRYPT_BASEADDR DR_REG_SPI_ENCRYPT_BASE
//Registers Operation {{
#define ETS_UNCACHED_ADDR(addr) (addr)