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fix(spi_flash): Fix spi flash qio/dio read failed on gpspi flash

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C.S.M
2025-08-15 11:02:15 +08:00
committed by BOT
parent 185857aee2
commit 34f9863115
2 changed files with 4 additions and 7 deletions
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4
components/hal/spi_flash_hal_common.inc
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@@ -125,9 +125,9 @@ esp_err_t spi_flash_hal_configure_host_io_mode(
* - DIO is similar. * - DIO is similar.
*/ */
if (conf_required) { if (conf_required) {
#if !SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL
int line_width = (io_mode == SPI_FLASH_DIO? 2: 4); int line_width = (io_mode == SPI_FLASH_DIO? 2: 4);
dummy_cyclelen_base -= SPI_FLASH_LL_CONTINUOUS_MODE_BIT_NUMS / line_width; dummy_cyclelen_base -= SPI_FLASH_LL_CONTINUOUS_MODE_BIT_NUMS / line_width;
#if !SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL
addr_bitlen += SPI_FLASH_LL_CONTINUOUS_MODE_BIT_NUMS; addr_bitlen += SPI_FLASH_LL_CONTINUOUS_MODE_BIT_NUMS;
#endif #endif
spi_flash_ll_set_extra_address(dev, 0); spi_flash_ll_set_extra_address(dev, 0);
@@ -145,7 +145,9 @@ esp_err_t spi_flash_hal_configure_host_io_mode(
} }
#endif #endif
#else #else
if (conf_required) {
gpspi_flash_ll_set_dummy_out(dev, (conf_required? 1: 0), 1); gpspi_flash_ll_set_dummy_out(dev, (conf_required? 1: 0), 1);
}
#endif #endif
#if SOC_IS(ESP32P4) #if SOC_IS(ESP32P4)

5
components/spi_flash/include/spi_flash/spi_flash_defs.h
View File

@@ -57,13 +57,8 @@
#define CMD_RDSFDP 0x5A /* Read the SFDP of the flash */ #define CMD_RDSFDP 0x5A /* Read the SFDP of the flash */
#if !SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL
#define SPI_FLASH_DIO_DUMMY_BITLEN 4 #define SPI_FLASH_DIO_DUMMY_BITLEN 4
#define SPI_FLASH_QIO_DUMMY_BITLEN 6 #define SPI_FLASH_QIO_DUMMY_BITLEN 6
#else
#define SPI_FLASH_DIO_DUMMY_BITLEN 0
#define SPI_FLASH_QIO_DUMMY_BITLEN 4
#endif
#define SPI_FLASH_DIO_ADDR_BITLEN 24 #define SPI_FLASH_DIO_ADDR_BITLEN 24
#define SPI_FLASH_QIO_ADDR_BITLEN 24 #define SPI_FLASH_QIO_ADDR_BITLEN 24
#define SPI_FLASH_QOUT_ADDR_BITLEN 24 #define SPI_FLASH_QOUT_ADDR_BITLEN 24