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soc/rtc: power down VDDSDIO in deep sleep

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If VDDSDIO is controlled by RTC (which is the case when using 1.8V flash
and CONFIG_BOOTLOADER_VDDSDIO_BOOST is enabled), need to allow VDDSDIO
to be controlled by the state machine before going into deep sleep.
This commit is contained in:
Ivan Grokhotkov
2017-11-08 21:45:10 +08:00
parent 305e2695d6
commit 378f3463fe
1 changed files with 4 additions and 0 deletions
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4
components/soc/esp32/rtc_sleep.c
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@@ -193,6 +193,10 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_FORCE_NOSLEEP); SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_FORCE_NOSLEEP);
} }
/* enable VDDSDIO control by state machine */
REG_CLR_BIT(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_FORCE);
REG_SET_BIT(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_PD_EN);
REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_SLP, cfg.rtc_dbias_slp); REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_SLP, cfg.rtc_dbias_slp);
REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_WAK, cfg.rtc_dbias_wak); REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_WAK, cfg.rtc_dbias_wak);
REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_WAK, cfg.dig_dbias_wak); REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_WAK, cfg.dig_dbias_wak);