feat(spi_master): add transaction config for dynamic clock speed update

Closes https://github.com/espressif/esp-idf/issues/13753
This commit is contained in:
wanckl
2025-01-26 20:32:27 +08:00
parent 194cafd22c
commit 39c85269cc
20 changed files with 211 additions and 128 deletions
+4
View File
@@ -465,3 +465,7 @@
re: "undefined reference to `(socketpair|gai_strerror|gethostname|getnameinfo|pipe|getifaddrs|freeifaddrs)'"
hint: "{}() is not supported in IDF.\nTo use a simplified implementation of this function, add a dependency to sock_utils library 'idf.py add-dependency espressif/sock_utils'"
match_to_output: True
-
re: "spi_hal: The clock_speed_hz should less than"
hint: "When operating in full-duplex mode at high frequencies, the device may not read data correctly.\nTry using IOMUX pins to increase the frequency limit or switch to half-duplex mode.\nNote that the SPI master can only operate at divisors of 80 MHz, and the driver always selects the closest available frequency to your configuration.\nSpecify SPI_DEVICE_NO_DUMMY to bypass this check. This allows higher output speeds but may result in unreliable data reads."