diff --git a/components/hal/esp32c6/include/hal/i2s_ll.h b/components/hal/esp32c6/include/hal/i2s_ll.h
index f8bad2feb1..349638bbf8 100644
--- a/components/hal/esp32c6/include/hal/i2s_ll.h
+++ b/components/hal/esp32c6/include/hal/i2s_ll.h
@@ -220,6 +220,9 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
     case I2S_CLK_SRC_XTAL:
         PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 0;
         break;
+    case I2S_CLK_SRC_PLL_240M:
+        PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 1;
+        break;
     case I2S_CLK_SRC_PLL_160M:
         PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 2;
         break;
@@ -246,6 +249,9 @@ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
     case I2S_CLK_SRC_XTAL:
         PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 0;
         break;
+    case I2S_CLK_SRC_PLL_240M:
+        PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 1;
+        break;
     case I2S_CLK_SRC_PLL_160M:
         PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 2;
         break;
diff --git a/components/hal/esp32s3/include/hal/i2s_ll.h b/components/hal/esp32s3/include/hal/i2s_ll.h
index 82677b556d..7899839e09 100644
--- a/components/hal/esp32s3/include/hal/i2s_ll.h
+++ b/components/hal/esp32s3/include/hal/i2s_ll.h
@@ -233,6 +233,9 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
     case I2S_CLK_SRC_XTAL:
         hw->tx_clkm_conf.tx_clk_sel = 0;
         break;
+    case I2S_CLK_SRC_PLL_240M:
+        hw->tx_clkm_conf.tx_clk_sel = 1;
+        break;
     case I2S_CLK_SRC_PLL_160M:
         hw->tx_clkm_conf.tx_clk_sel = 2;
         break;
@@ -258,6 +261,9 @@ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
     case I2S_CLK_SRC_XTAL:
         hw->rx_clkm_conf.rx_clk_sel = 0;
         break;
+    case I2S_CLK_SRC_PLL_240M:
+        hw->rx_clkm_conf.rx_clk_sel = 1;
+        break;
     case I2S_CLK_SRC_PLL_160M:
         hw->rx_clkm_conf.rx_clk_sel = 2;
         break;
diff --git a/components/soc/esp32c6/include/soc/clk_tree_defs.h b/components/soc/esp32c6/include/soc/clk_tree_defs.h
index 69c9619162..7a5ba2b44c 100644
--- a/components/soc/esp32c6/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32c6/include/soc/clk_tree_defs.h
@@ -295,13 +295,14 @@ typedef enum {
 /**
  * @brief Array initializer for all supported clock sources of I2S
  */
-#define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, I2S_CLK_SRC_EXTERNAL}
+#define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F240M, SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, I2S_CLK_SRC_EXTERNAL}
 
 /**
  * @brief I2S clock source enum
  */
 typedef enum {
     I2S_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M,                /*!< Select PLL_F160M as the default source clock  */
+    I2S_CLK_SRC_PLL_240M = SOC_MOD_CLK_PLL_F240M,               /*!< Select PLL_F240M as the source clock */
     I2S_CLK_SRC_PLL_160M = SOC_MOD_CLK_PLL_F160M,               /*!< Select PLL_F160M as the source clock */
     I2S_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,                        /*!< Select XTAL as the source clock */
     I2S_CLK_SRC_EXTERNAL = -1,                                  /*!< Select external clock as source clock */
diff --git a/components/soc/esp32s3/include/soc/clk_tree_defs.h b/components/soc/esp32s3/include/soc/clk_tree_defs.h
index f38395fb19..5915b49f7e 100644
--- a/components/soc/esp32s3/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32s3/include/soc/clk_tree_defs.h
@@ -280,16 +280,19 @@ typedef enum {
 /**
  * @brief Array initializer for all supported clock sources of I2S
  */
-#define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, I2S_CLK_SRC_EXTERNAL}
+#define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F240M, SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, I2S_CLK_SRC_EXTERNAL}
 
 /**
  * @brief I2S clock source enum
  */
 typedef enum {
     I2S_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M,                    /*!< Select PLL_F160M as the default source clock  */
+    I2S_CLK_SRC_PLL_240M = SOC_MOD_CLK_PLL_D2,                      /*!< Select PLL_D2 as the source clock.
+                                                                         It is default to 240MHz while PLL is 480MHz,
+                                                                         but it will be 160MHz if PLL is 320MHz */
     I2S_CLK_SRC_PLL_160M = SOC_MOD_CLK_PLL_F160M,                   /*!< Select PLL_F160M as the source clock */
     I2S_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,                            /*!< Select XTAL as the source clock */
-    I2S_CLK_SRC_EXTERNAL = -1,                                  /*!< Select external clock as source clock */
+    I2S_CLK_SRC_EXTERNAL = -1,                                      /*!< Select external clock as source clock */
 } soc_periph_i2s_clk_src_t;
 
 /////////////////////////////////////////////////I2C////////////////////////////////////////////////////////////////////