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https://github.com/espressif/esp-idf.git
synced 2025-07-30 18:57:19 +02:00
Power Management: fix REGDMA clock issue when wake up form light sleep
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@ -26,6 +26,9 @@ pau_context_t * __attribute__((weak)) IRAM_ATTR PAU_instance(void)
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static pau_hal_context_t pau_hal = { .dev = NULL };
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static pau_hal_context_t pau_hal = { .dev = NULL };
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static pau_context_t pau_context = { .hal = &pau_hal };
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static pau_context_t pau_context = { .hal = &pau_hal };
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/* periph_module_enable don not need to be put in iram because it is
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* called before the flash is powered off and will not be called again. */
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if (pau_hal.dev == NULL) {
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if (pau_hal.dev == NULL) {
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pau_hal.dev = &PAU;
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pau_hal.dev = &PAU;
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periph_module_enable(PERIPH_REGDMA_MODULE);
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periph_module_enable(PERIPH_REGDMA_MODULE);
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@ -62,6 +65,13 @@ void pau_regdma_trigger_modem_link_restore(void)
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#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
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#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
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void IRAM_ATTR pau_regdma_set_system_link_addr(void *link_addr)
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void IRAM_ATTR pau_regdma_set_system_link_addr(void *link_addr)
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{
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{
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/* ESP32H2 use software to trigger REGDMA to restore instead of PMU,
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* because regdma has power bug, so we need to manually set the clock
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* for regdma before using it after the chip wakes up. We use
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* pau_hal_clock_configure because periph_module_enable will consume
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* a relatively large amount of memory space. */
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pau_hal_regdma_clock_configure(PAU_instance()->hal, true);
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pau_hal_set_regdma_system_link_addr(PAU_instance()->hal, link_addr);
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pau_hal_set_regdma_system_link_addr(PAU_instance()->hal, link_addr);
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}
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}
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@ -7,7 +7,9 @@
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// The HAL layer for PAU (ESP32-H2 specific part)
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// The HAL layer for PAU (ESP32-H2 specific part)
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#include "soc/soc.h"
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#include "soc/soc.h"
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#include "soc/pcr_struct.h"
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#include "esp_attr.h"
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#include "esp_attr.h"
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#include "hal/misc.h"
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#include "hal/pau_hal.h"
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#include "hal/pau_hal.h"
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#include "hal/pau_types.h"
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#include "hal/pau_types.h"
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@ -57,3 +59,9 @@ void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
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pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
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pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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}
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}
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void IRAM_ATTR pau_hal_regdma_clock_configure(pau_hal_context_t *hal, bool enable)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.regdma_conf, regdma_rst_en, !enable);
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HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.regdma_conf, regdma_clk_en, enable);
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}
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@ -100,6 +100,15 @@ void pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool backup_or_rest
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*/
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*/
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void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal);
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void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal);
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#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
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/**
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* @brief Enable or disable PAU module clock
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*
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* @param hal regdma hal context
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*/
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void pau_hal_regdma_clock_configure(pau_hal_context_t *hal, bool enable);
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#endif
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -1111,6 +1111,10 @@ config SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
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bool
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bool
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default y
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default y
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config SOC_PM_RETENTION_HAS_CLOCK_BUG
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bool
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default y
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config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
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config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
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bool
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bool
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default y
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default y
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@ -460,6 +460,7 @@
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#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
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#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
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#define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!<Supports CRC only the stub code in RTC memory */
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#define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!<Supports CRC only the stub code in RTC memory */
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#define SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (1)
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#define SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (1)
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#define SOC_PM_RETENTION_HAS_CLOCK_BUG (1)
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/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
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/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
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#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)
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#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)
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