mirror of
https://github.com/espressif/esp-idf.git
synced 2025-07-30 18:57:19 +02:00
fix(hal): Make the ECDSA countermeasure dynamically applicable
This commit makes the ECDSA countermeasure dynamically applicable across different revisions of the ESP32H2 SoC.
This commit is contained in:
@ -15,8 +15,6 @@ choice ESP32H2_REV_MIN
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bool "Rev v0.1 (ECO1)"
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bool "Rev v0.1 (ECO1)"
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config ESP32H2_REV_MIN_2
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config ESP32H2_REV_MIN_2
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bool "Rev v0.2 (ECO2)"
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bool "Rev v0.2 (ECO2)"
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config ESP32H2_REV_MIN_102
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bool "Rev v1.2 (ECO5)"
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endchoice
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endchoice
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config ESP32H2_REV_MIN_FULL
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config ESP32H2_REV_MIN_FULL
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@ -24,7 +22,6 @@ config ESP32H2_REV_MIN_FULL
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default 0 if ESP32H2_REV_MIN_0
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default 0 if ESP32H2_REV_MIN_0
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default 1 if ESP32H2_REV_MIN_1
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default 1 if ESP32H2_REV_MIN_1
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default 2 if ESP32H2_REV_MIN_2
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default 2 if ESP32H2_REV_MIN_2
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default 102 if ESP32H2_REV_MIN_102
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config ESP_REV_MIN_FULL
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config ESP_REV_MIN_FULL
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int
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int
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@ -34,7 +31,7 @@ config ESP_REV_MIN_FULL
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# MAX Revision
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# MAX Revision
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#
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#
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comment "Maximum Supported ESP32-H2 Revision (Rev v1.99)"
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comment "Maximum Supported ESP32-H2 Revision (Rev v0.99)"
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# Maximum revision that IDF supports.
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# Maximum revision that IDF supports.
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# It can not be changed by user.
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# It can not be changed by user.
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# Only Espressif can change it when a new version will be supported in IDF.
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# Only Espressif can change it when a new version will be supported in IDF.
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@ -40,7 +40,6 @@ menu "ESP Security Specific"
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config ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL
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config ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL
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bool "Forcefully enable ECC constant time point multiplication operations"
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bool "Forcefully enable ECC constant time point multiplication operations"
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depends on SOC_ECC_CONSTANT_TIME_POINT_MUL
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depends on SOC_ECC_CONSTANT_TIME_POINT_MUL
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depends on !(IDF_TARGET_ESP32H2 && ESP32H2_REV_MIN_FULL < 102)
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default N
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default N
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help
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help
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If enabled, the app startup code will burn the ECC_FORCE_CONST_TIME efuse bit to force the
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If enabled, the app startup code will burn the ECC_FORCE_CONST_TIME efuse bit to force the
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@ -12,6 +12,8 @@
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#include "esp_efuse_table.h"
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#include "esp_efuse_table.h"
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#include "esp_security_priv.h"
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#include "esp_security_priv.h"
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#include "esp_err.h"
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#include "esp_err.h"
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#include "hal/efuse_hal.h"
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY
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#include "hal/key_mgr_ll.h"
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#include "hal/key_mgr_ll.h"
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#endif
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#endif
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@ -41,7 +43,13 @@ ESP_SYSTEM_INIT_FN(esp_security_init, SECONDARY, BIT(0), 103)
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#endif
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#endif
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#if CONFIG_ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL
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#if CONFIG_ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL
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if (!esp_efuse_read_field_bit(ESP_EFUSE_ECC_FORCE_CONST_TIME)) {
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bool force_constant_time = true;
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#if CONFIG_IDF_TARGET_ESP32H2
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if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 102)) {
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force_constant_time = false;
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}
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#endif
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if (!esp_efuse_read_field_bit(ESP_EFUSE_ECC_FORCE_CONST_TIME) && force_constant_time) {
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ESP_EARLY_LOGD(TAG, "Forcefully enabling ECC constant time operations");
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ESP_EARLY_LOGD(TAG, "Forcefully enabling ECC constant time operations");
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esp_err_t err = esp_efuse_write_field_bit(ESP_EFUSE_ECC_FORCE_CONST_TIME);
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esp_err_t err = esp_efuse_write_field_bit(ESP_EFUSE_ECC_FORCE_CONST_TIME);
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if (err != ESP_OK) {
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if (err != ESP_OK) {
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@ -105,7 +105,7 @@ menu "Hardware Abstraction Layer (HAL) and Low Level (LL)"
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config HAL_ECDSA_GEN_SIG_CM
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config HAL_ECDSA_GEN_SIG_CM
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bool "Enable countermeasure for ECDSA signature generation"
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bool "Enable countermeasure for ECDSA signature generation"
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depends on IDF_TARGET_ESP32H2 && ESP32H2_REV_MIN_FULL < 102
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depends on IDF_TARGET_ESP32H2
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default n
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default n
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help
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help
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Enable this option to apply the countermeasure for ECDSA signature operation
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Enable this option to apply the countermeasure for ECDSA signature operation
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@ -12,6 +12,7 @@
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#if CONFIG_HAL_ECDSA_GEN_SIG_CM
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#if CONFIG_HAL_ECDSA_GEN_SIG_CM
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#include "esp_fault.h"
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#include "esp_fault.h"
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#include "esp_random.h"
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#include "esp_random.h"
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#include "soc/chip_revision.h"
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#endif
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#endif
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#ifdef SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
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#ifdef SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
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@ -136,7 +137,11 @@ void ecdsa_hal_gen_signature(ecdsa_hal_config_t *conf, const uint8_t *hash,
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configure_ecdsa_periph(conf);
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configure_ecdsa_periph(conf);
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#if CONFIG_HAL_ECDSA_GEN_SIG_CM
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#if CONFIG_HAL_ECDSA_GEN_SIG_CM
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ecdsa_hal_gen_signature_with_countermeasure(hash, r_out, s_out, len);
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if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 102)) {
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ecdsa_hal_gen_signature_with_countermeasure(hash, r_out, s_out, len);
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} else {
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ecdsa_hal_gen_signature_inner(hash, r_out, s_out, len);
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}
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#else /* CONFIG_HAL_ECDSA_GEN_SIG_CM */
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#else /* CONFIG_HAL_ECDSA_GEN_SIG_CM */
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ecdsa_hal_gen_signature_inner(hash, r_out, s_out, len);
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ecdsa_hal_gen_signature_inner(hash, r_out, s_out, len);
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#endif /* !CONFIG_HAL_ECDSA_GEN_SIG_CM */
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#endif /* !CONFIG_HAL_ECDSA_GEN_SIG_CM */
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@ -27,6 +27,8 @@
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#if CONFIG_MBEDTLS_HARDWARE_ECDSA_SIGN_CONSTANT_TIME_CM
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#if CONFIG_MBEDTLS_HARDWARE_ECDSA_SIGN_CONSTANT_TIME_CM
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#include "esp_timer.h"
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#include "esp_timer.h"
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#include "soc/chip_revision.h"
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#include "hal/efuse_hal.h"
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#if CONFIG_ESP_CRYPTO_DPA_PROTECTION_LEVEL_HIGH
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#if CONFIG_ESP_CRYPTO_DPA_PROTECTION_LEVEL_HIGH
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/*
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/*
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@ -362,9 +364,11 @@ static int esp_ecdsa_sign(mbedtls_ecp_group *grp, mbedtls_mpi* r, mbedtls_mpi* s
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#endif
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#endif
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ecdsa_hal_gen_signature(&conf, sha_le, r_le, s_le, len);
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ecdsa_hal_gen_signature(&conf, sha_le, r_le, s_le, len);
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#if CONFIG_MBEDTLS_HARDWARE_ECDSA_SIGN_CONSTANT_TIME_CM
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#if CONFIG_MBEDTLS_HARDWARE_ECDSA_SIGN_CONSTANT_TIME_CM
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sig_time = esp_timer_get_time() - sig_time;
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if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 102)) {
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if (sig_time < ECDSA_CM_FIXED_SIG_TIME) {
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sig_time = esp_timer_get_time() - sig_time;
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esp_rom_delay_us(ECDSA_CM_FIXED_SIG_TIME - sig_time);
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if (sig_time < ECDSA_CM_FIXED_SIG_TIME) {
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esp_rom_delay_us(ECDSA_CM_FIXED_SIG_TIME - sig_time);
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}
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}
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}
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#endif
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#endif
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process_again = !ecdsa_hal_get_operation_result()
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process_again = !ecdsa_hal_get_operation_result()
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