diff --git a/components/espcoredump/src/core_dump_sha.c b/components/espcoredump/src/core_dump_sha.c
index 5de67eaa56..fcd81ae978 100644
--- a/components/espcoredump/src/core_dump_sha.c
+++ b/components/espcoredump/src/core_dump_sha.c
@@ -31,7 +31,9 @@ static void core_dump_sha256_start(core_dump_sha_ctx_t *sha_ctx)
 static void core_dump_sha256_update(core_dump_sha_ctx_t *sha_ctx, const void *data, size_t data_len)
 {
     // set software mode of SHA calculation
+#if CONFIG_MBEDTLS_HARDWARE_SHA
     sha_ctx->ctx.mode = ESP_MBEDTLS_SHA256_SOFTWARE;
+#endif
     mbedtls_sha256_update(&sha_ctx->ctx, data, data_len);
 }
 
diff --git a/tools/test_apps/system/panic/pytest_panic.py b/tools/test_apps/system/panic/pytest_panic.py
index e95c808444..195e77c1cd 100644
--- a/tools/test_apps/system/panic/pytest_panic.py
+++ b/tools/test_apps/system/panic/pytest_panic.py
@@ -47,6 +47,7 @@ TARGETS_DUAL_CORE = TARGETS_XTENSA_DUAL_CORE
 CONFIGS = [
     pytest.param('coredump_flash_bin_crc', marks=TARGETS_ALL),
     pytest.param('coredump_flash_elf_sha', marks=TARGETS_ALL),
+    pytest.param('coredump_flash_elf_soft_sha', marks=TARGETS_ALL),
     pytest.param('coredump_uart_bin_crc', marks=TARGETS_ALL),
     pytest.param('coredump_uart_elf_crc', marks=TARGETS_ALL),
     pytest.param('coredump_flash_custom_stack', marks=TARGETS_RISCV),
diff --git a/tools/test_apps/system/panic/sdkconfig.ci.coredump_flash_elf_soft_sha b/tools/test_apps/system/panic/sdkconfig.ci.coredump_flash_elf_soft_sha
new file mode 100644
index 0000000000..e426d2e4d1
--- /dev/null
+++ b/tools/test_apps/system/panic/sdkconfig.ci.coredump_flash_elf_soft_sha
@@ -0,0 +1,5 @@
+CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
+CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
+CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
+CONFIG_LOG_DEFAULT_LEVEL_INFO=y
+CONFIG_MBEDTLS_HARDWARE_SHA=n