diff --git a/components/esp_driver_gpio/test_apps/gpio/sdkconfig.ci.iram_safe b/components/esp_driver_gpio/test_apps/gpio/sdkconfig.ci.iram_safe index 8d43b77909..653c5c641a 100644 --- a/components/esp_driver_gpio/test_apps/gpio/sdkconfig.ci.iram_safe +++ b/components/esp_driver_gpio/test_apps/gpio/sdkconfig.ci.iram_safe @@ -8,3 +8,5 @@ CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y # GPIO test uses IPC call, the default stack size of IPC task can satisfy the -O0 optimization CONFIG_ESP_IPC_TASK_STACK_SIZE=2048 +# test gpio functionality with non-default option +CONFIG_HAL_GPIO_USE_ROM_IMPL=n diff --git a/components/esp_rom/esp32/include/esp32/rom/gpio.h b/components/esp_rom/esp32/include/esp32/rom/gpio.h index 6a6b458718..24570f19ef 100644 --- a/components/esp_rom/esp32/include/esp32/rom/gpio.h +++ b/components/esp_rom/esp32/include/esp32/rom/gpio.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -36,15 +36,6 @@ extern "C" { #define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0) -typedef enum { - GPIO_PIN_INTR_DISABLE = 0, - GPIO_PIN_INTR_POSEDGE = 1, - GPIO_PIN_INTR_NEGEDGE = 2, - GPIO_PIN_INTR_ANYEDGE = 3, - GPIO_PIN_INTR_LOLEVEL = 4, - GPIO_PIN_INTR_HILEVEL = 5 -} GPIO_INT_TYPE; - #define GPIO_OUTPUT_SET(gpio_no, bit_value) \ ((gpio_no < 32) ? gpio_output_set(bit_value<BIT(0). - * There is no particular ordering guaranteed; so if the order of writes is significant, - * calling code should divide a single call into multiple calls. + * @brief Set GPIO output level * - * @param uint32_t set_mask : the gpios that need high level. - * - * @param uint32_t clear_mask : the gpios that need low level. - * - * @param uint32_t enable_mask : the gpios that need be changed. - * - * @param uint32_t disable_mask : the gpios that need disable output. - * - * @return None + * @param gpio_num GPIO number + * @param level Output level, 0:low; 1:high */ -void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask); +void gpio_set_output_level(uint32_t gpio_num, uint32_t level); /** - * @brief Sample the value of GPIO input pins(0-28) and returns a bitmask. - * @param None + * @brief Get GPIO input level * - * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0. + * @param gpio_num GPIO number + * + * @return 0:the GPIO_input level is low; 1:the GPIO input level is high */ -uint32_t gpio_input_get(void); - -/** - * @brief Set GPIO to wakeup. - * Please do not call this function in SDK. - * - * @param uint32_t i: gpio number. - * - * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used - * - * @return None - */ -void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); - -/** - * @brief disable GPIOs to wakeup. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void gpio_pin_wakeup_disable(void); +uint32_t gpio_get_input_level(uint32_t gpio_num); /** * @brief set gpio input to a signal, one gpio can input to several signals. diff --git a/components/esp_rom/esp32c6/include/esp32c6/rom/gpio.h b/components/esp_rom/esp32c6/include/esp32c6/rom/gpio.h index 6ac6dc21da..935cbd1e97 100644 --- a/components/esp_rom/esp32c6/include/esp32c6/rom/gpio.h +++ b/components/esp_rom/esp32c6/include/esp32c6/rom/gpio.h @@ -72,7 +72,7 @@ void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mas uint32_t gpio_input_get(void); /** - * @brief Set GPIO to wakeup the ESP32. + * @brief Set GPIO to wakeup the chip. * Please do not call this function in SDK. * * @param uint32_t i: gpio number. @@ -84,7 +84,7 @@ uint32_t gpio_input_get(void); void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); /** - * @brief disable GPIOs to wakeup the ESP32. + * @brief disable GPIOs to wakeup the chip. * Please do not call this function in SDK. * * @param None diff --git a/components/esp_rom/esp32c61/include/esp32c61/rom/gpio.h b/components/esp_rom/esp32c61/include/esp32c61/rom/gpio.h index abaa4a8ab0..9ba44accc7 100644 --- a/components/esp_rom/esp32c61/include/esp32c61/rom/gpio.h +++ b/components/esp_rom/esp32c61/include/esp32c61/rom/gpio.h @@ -33,62 +33,23 @@ extern "C" { #define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0) -typedef enum { - GPIO_PIN_INTR_DISABLE = 0, - GPIO_PIN_INTR_POSEDGE = 1, - GPIO_PIN_INTR_NEGEDGE = 2, - GPIO_PIN_INTR_ANYEDGE = 3, - GPIO_PIN_INTR_LOLEVEL = 4, - GPIO_PIN_INTR_HILEVEL = 5 -} GPIO_INT_TYPE; - /** - * @brief Change GPIO(0-29) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0). - * There is no particular ordering guaranteed; so if the order of writes is significant, - * calling code should divide a single call into multiple calls. + * @brief Set GPIO output level * - * @param uint32_t set_mask : the gpios that need high level. - * - * @param uint32_t clear_mask : the gpios that need low level. - * - * @param uint32_t enable_mask : the gpios that need be changed. - * - * @param uint32_t disable_mask : the gpios that need disable output. - * - * @return None + * @param gpio_num GPIO number + * @param level Output level, 0:low; 1:high */ -void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask); +void gpio_set_output_level(uint32_t gpio_num, uint32_t level); /** - * @brief Sample the value of GPIO input pins(0-29) and returns a bitmask. - * @param None + * @brief Get GPIO input level * - * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0. + * @param gpio_num GPIO number + * + * @return 0:the GPIO_input level is low; 1:the GPIO input level is high */ -uint32_t gpio_input_get(void); - -/** - * @brief Set GPIO to wakeup. - * Please do not call this function in SDK. - * - * @param uint32_t i: gpio number. - * - * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used - * - * @return None - */ -void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); - -/** - * @brief disable GPIOs to wakeup. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void gpio_pin_wakeup_disable(void); +uint32_t gpio_get_input_level(uint32_t gpio_num); /** * @brief set gpio input to a signal, one gpio can input to several signals. diff --git a/components/esp_rom/esp32h2/include/esp32h2/rom/gpio.h b/components/esp_rom/esp32h2/include/esp32h2/rom/gpio.h index 5829765c60..74551dd693 100644 --- a/components/esp_rom/esp32h2/include/esp32h2/rom/gpio.h +++ b/components/esp_rom/esp32h2/include/esp32h2/rom/gpio.h @@ -73,7 +73,7 @@ void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mas uint32_t gpio_input_get(void); /** - * @brief Set GPIO to wakeup the ESP32. + * @brief Set GPIO to wakeup the chip. * Please do not call this function in SDK. * * @param uint32_t i: gpio number. @@ -85,7 +85,7 @@ uint32_t gpio_input_get(void); void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); /** - * @brief disable GPIOs to wakeup the ESP32. + * @brief disable GPIOs to wakeup the chip. * Please do not call this function in SDK. * * @param None diff --git a/components/esp_rom/esp32h21/include/esp32h21/rom/gpio.h b/components/esp_rom/esp32h21/include/esp32h21/rom/gpio.h index 4fa2cd0e98..987cd887a8 100644 --- a/components/esp_rom/esp32h21/include/esp32h21/rom/gpio.h +++ b/components/esp_rom/esp32h21/include/esp32h21/rom/gpio.h @@ -73,7 +73,7 @@ void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mas uint32_t gpio_input_get(void); /** - * @brief Set GPIO to wakeup the ESP32H21. + * @brief Set GPIO to wakeup the chip. * Please do not call this function in SDK. * * @param uint32_t i: gpio number. @@ -85,7 +85,7 @@ uint32_t gpio_input_get(void); void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); /** - * @brief disable GPIOs to wakeup the ESP32H21. + * @brief disable GPIOs to wakeup the chip. * Please do not call this function in SDK. * * @param None diff --git a/components/esp_rom/esp32h4/include/esp32h4/rom/gpio.h b/components/esp_rom/esp32h4/include/esp32h4/rom/gpio.h index a4e36af30a..da4cec9da0 100644 --- a/components/esp_rom/esp32h4/include/esp32h4/rom/gpio.h +++ b/components/esp_rom/esp32h4/include/esp32h4/rom/gpio.h @@ -25,10 +25,6 @@ extern "C" { #define GPIO_REG_READ(reg) READ_PERI_REG(reg) #define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val) -#define GPIO_OUTPUT_SET(gpio_no, bit_value) gpio_set_output_level(gpio_no, bit_value) -#define GPIO_DIS_OUTPUT(gpio_no) gpio_output_disable(gpio_no) -#define GPIO_INPUT_GET(gpio_no) gpio_get_input_level(gpio_no) - /** * @brief Set GPIO output level * @@ -83,23 +79,23 @@ void gpio_bypass_matrix_in(uint32_t signal_idx); */ void gpio_matrix_out(uint32_t gpio_num, uint32_t signal_idx, bool out_inv, bool oen_inv); -/** - * @brief enable gpio output. - * - * @param uint32_t gpio_num : gpio number - * - * @return None - */ -void gpio_output_enable(uint32_t gpio_num); +// /** +// * @brief enable gpio output. +// * +// * @param uint32_t gpio_num : gpio number +// * +// * @return None +// */ +// void gpio_output_enable(uint32_t gpio_num); -/** - * @brief disable gpio output. - * - * @param uint32_t gpio_num : gpio number - * - * @return None - */ -void gpio_output_disable(uint32_t gpio_num); +// /** +// * @brief disable gpio output. +// * +// * @param uint32_t gpio_num : gpio number +// * +// * @return None +// */ +// void gpio_output_disable(uint32_t gpio_num); /** * @brief Select pad as a gpio function from IOMUX. @@ -110,15 +106,6 @@ void gpio_output_disable(uint32_t gpio_num); */ void gpio_pad_select_gpio(uint32_t gpio_num); -/** - * @brief Select a mux for the pad(LP pad) in the IOMUX. - * @note This function is only for LP pad and not all chips have LP pad. - * - * @param gpio_num GPIO number should be LP GPIO - * @param mux_sel Select pad as LP GPIO or HP GPIO, 1:LP GPIO,0:HP GPIO - */ -void gpio_lppad_select_mux(uint32_t gpio_num, uint32_t mux_sel); - /** * @brief Set pad driver capability. * @@ -130,17 +117,6 @@ void gpio_lppad_select_mux(uint32_t gpio_num, uint32_t mux_sel); */ void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv); -/** - * @brief Set MSPI dedicated pad driver capability. - * - * @param uint32_t gpio_num : MSPI dedicated gpio number - * - * @param uint32_t drv : 0-3 - * - * @return None - */ -void gpio_ded_pad_set_drv(uint32_t ded_gpio_num, uint32_t drv); - /** * @brief Pull up the pad from gpio number. * @@ -150,15 +126,6 @@ void gpio_ded_pad_set_drv(uint32_t ded_gpio_num, uint32_t drv); */ void gpio_pad_pullup(uint32_t gpio_num); -/** - * @brief Pull up the MSPI dedicated pad from gpio number. - * - * @param uint32_t gpio_num : MSPI dedicated gpio number - * - * @return None - */ -void gpio_ded_pad_pullup(uint32_t ded_gpio_num); - /** * @brief Pull down the pad from gpio number. * @@ -168,15 +135,6 @@ void gpio_ded_pad_pullup(uint32_t ded_gpio_num); */ void gpio_pad_pulldown(uint32_t gpio_num); -/** - * @brief Pull down the MSPI dedicated pad from gpio number. - * - * @param uint32_t gpio_num : MSPI dedicated gpio number - * - * @return None - */ -void gpio_ded_pad_pulldown(uint32_t ded_gpio_num); - /** * @brief enable gpio pad input. * @@ -204,15 +162,6 @@ void gpio_pad_input_disable(uint32_t gpio_num); */ void gpio_pad_unhold(uint32_t gpio_num); -/** - * @brief Unhold the mspi dedicated pad from gpio number. - * - * @param uint32_t gpio_num : mspi dedicated gpio number - * - * @return None - */ -void gpio_ded_pad_unhold(uint32_t ded_gpio_num); - /** * @brief Hold the pad from gpio number. * @@ -222,15 +171,6 @@ void gpio_ded_pad_unhold(uint32_t ded_gpio_num); */ void gpio_pad_hold(uint32_t gpio_num); -/** - * @brief Hold the mspi dedicated pad from gpio number. - * - * @param uint32_t gpio_num : mspi dedicated gpio number - * - * @return None - */ -void gpio_ded_pad_hold(uint32_t gpio_num); - /** * @} */ diff --git a/components/esp_rom/esp32p4/include/esp32p4/rom/gpio.h b/components/esp_rom/esp32p4/include/esp32p4/rom/gpio.h index e59383319b..c07d11114f 100644 --- a/components/esp_rom/esp32p4/include/esp32p4/rom/gpio.h +++ b/components/esp_rom/esp32p4/include/esp32p4/rom/gpio.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -38,161 +38,22 @@ extern "C" { #define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0) -typedef enum { - GPIO_PIN_INTR_DISABLE = 0, - GPIO_PIN_INTR_POSEDGE = 1, - GPIO_PIN_INTR_NEGEDGE = 2, - GPIO_PIN_INTR_ANYEDGE = 3, - GPIO_PIN_INTR_LOLEVEL = 4, - GPIO_PIN_INTR_HILEVEL = 5 -} GPIO_INT_TYPE; - -#define GPIO_OUTPUT_SET(gpio_no, bit_value) \ - ((gpio_no < 32) ? gpio_output_set(bit_value<>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0)) - -/* GPIO interrupt handler, registered through gpio_intr_handler_register */ -typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg); +/** + * @brief Set GPIO output level + * + * @param gpio_num GPIO number + * @param level Output level, 0:low; 1:high + */ +void gpio_set_output_level(uint32_t gpio_num, uint32_t level); /** - * @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet - * to initialize "output enables" and pin configurations for each gpio pin. - * Please do not call this function in SDK. + * @brief Get GPIO input level * - * @param None + * @param gpio_num GPIO number * - * @return None + * @return 0:the GPIO_input level is low; 1:the GPIO input level is high */ -void gpio_init(void); - -/** - * @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0). - * There is no particular ordering guaranteed; so if the order of writes is significant, - * calling code should divide a single call into multiple calls. - * - * @param uint32_t set_mask : the gpios that need high level. - * - * @param uint32_t clear_mask : the gpios that need low level. - * - * @param uint32_t enable_mask : the gpios that need be changed. - * - * @param uint32_t disable_mask : the gpios that need disable output. - * - * @return None - */ -void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask); - -/** - * @brief Change GPIO(32-54) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0). - * There is no particular ordering guaranteed; so if the order of writes is significant, - * calling code should divide a single call into multiple calls. - * - * @param uint32_t set_mask : the gpios that need high level. - * - * @param uint32_t clear_mask : the gpios that need low level. - * - * @param uint32_t enable_mask : the gpios that need be changed. - * - * @param uint32_t disable_mask : the gpios that need disable output. - * - * @return None - */ -void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask); - -/** - * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask. - * - * @param None - * - * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0. - */ -uint32_t gpio_input_get(void); - -/** - * @brief Sample the value of GPIO input pins(32-54) and returns a bitmask. - * - * @param None - * - * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32. - */ -uint32_t gpio_input_get_high(void); - -/** - * @brief Register an application-specific interrupt handler for GPIO pin interrupts. - * Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack. - * Please do not call this function in SDK. - * - * @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler - * - * @param void *arg : gpio application-specific interrupt handler argument. - * - * @return None - */ -void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg); - -/** - * @brief Get gpio interrupts which happens but not processed. - * Please do not call this function in SDK. - * - * @param None - * - * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0. - */ -uint32_t gpio_intr_pending(void); - -/** - * @brief Get gpio interrupts which happens but not processed. - * Please do not call this function in SDK. - * - * @param None - * - * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32. - */ -uint32_t gpio_intr_pending_high(void); - -/** - * @brief Ack gpio interrupts to process pending interrupts. - * Please do not call this function in SDK. - * - * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0. - * - * @return None - */ -void gpio_intr_ack(uint32_t ack_mask); - -/** - * @brief Ack gpio interrupts to process pending interrupts. - * Please do not call this function in SDK. - * - * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32. - * - * @return None - */ -void gpio_intr_ack_high(uint32_t ack_mask); - -/** - * @brief Set GPIO to wakeup the ESP32P4. - * Please do not call this function in SDK. - * - * @param uint32_t i: gpio number. - * - * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used - * - * @return None - */ -void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); - -/** - * @brief disable GPIOs to wakeup the ESP32P4. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void gpio_pin_wakeup_disable(void); +uint32_t gpio_get_input_level(uint32_t gpio_num); /** * @brief set gpio input to a signal, one gpio can input to several signals. diff --git a/components/esp_rom/esp32s2/include/esp32s2/rom/gpio.h b/components/esp_rom/esp32s2/include/esp32s2/rom/gpio.h index 84e0af1adb..c350a1200c 100644 --- a/components/esp_rom/esp32s2/include/esp32s2/rom/gpio.h +++ b/components/esp_rom/esp32s2/include/esp32s2/rom/gpio.h @@ -104,7 +104,7 @@ uint32_t gpio_input_get(void); uint32_t gpio_input_get_high(void); /** - * @brief Set GPIO to wakeup the ESP32. + * @brief Set GPIO to wakeup the chip. * Please do not call this function in SDK. * * @param uint32_t i: gpio number. @@ -116,7 +116,7 @@ uint32_t gpio_input_get_high(void); void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); /** - * @brief disable GPIOs to wakeup the ESP32. + * @brief disable GPIOs to wakeup the chip. * Please do not call this function in SDK. * * @param None diff --git a/components/esp_rom/esp32s3/include/esp32s3/rom/gpio.h b/components/esp_rom/esp32s3/include/esp32s3/rom/gpio.h index 8958b03578..414bbc91d6 100644 --- a/components/esp_rom/esp32s3/include/esp32s3/rom/gpio.h +++ b/components/esp_rom/esp32s3/include/esp32s3/rom/gpio.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -63,6 +63,7 @@ typedef enum { */ void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask); +// gpio_output_set_high does not show in ESP32S3 ROM /** * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask. @@ -73,8 +74,10 @@ void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mas */ uint32_t gpio_input_get(void); +// gpio_input_get_high does not show in ESP32S3 ROM + /** - * @brief Set GPIO to wakeup the ESP32. + * @brief Set GPIO to wakeup the chip. * Please do not call this function in SDK. * * @param uint32_t i: gpio number. @@ -86,7 +89,7 @@ uint32_t gpio_input_get(void); void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); /** - * @brief disable GPIOs to wakeup the ESP32. + * @brief disable GPIOs to wakeup the chip. * Please do not call this function in SDK. * * @param None diff --git a/components/hal/esp32c5/include/hal/gpio_ll.h b/components/hal/esp32c5/include/hal/gpio_ll.h index ec30974adf..f4d65bb499 100644 --- a/components/hal/esp32c5/include/hal/gpio_ll.h +++ b/components/hal/esp32c5/include/hal/gpio_ll.h @@ -27,6 +27,8 @@ #include "soc/usb_serial_jtag_struct.h" #include "hal/gpio_types.h" #include "hal/assert.h" +#include "hal/config.h" +#include "rom/gpio.h" #ifdef __cplusplus extern "C" { @@ -336,11 +338,15 @@ static inline void gpio_ll_od_enable(gpio_dev_t *hw, uint32_t gpio_num) __attribute__((always_inline)) static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t level) { +#if HAL_CONFIG_GPIO_USE_ROM_API + gpio_set_output_level(gpio_num, level); +#else if (level) { hw->out_w1ts.val = 1 << gpio_num; } else { hw->out_w1tc.val = 1 << gpio_num; } +#endif } /** @@ -358,7 +364,11 @@ static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t __attribute__((always_inline)) static inline int gpio_ll_get_level(gpio_dev_t *hw, uint32_t gpio_num) { +#if HAL_CONFIG_GPIO_USE_ROM_API + return gpio_get_input_level(gpio_num); +#else return (hw->in.in_data_next >> gpio_num) & 0x1; +#endif } /** diff --git a/components/hal/esp32c61/include/hal/gpio_ll.h b/components/hal/esp32c61/include/hal/gpio_ll.h index bee5182bd9..3e8ff27654 100644 --- a/components/hal/esp32c61/include/hal/gpio_ll.h +++ b/components/hal/esp32c61/include/hal/gpio_ll.h @@ -27,6 +27,8 @@ #include "soc/io_mux_struct.h" #include "hal/gpio_types.h" #include "hal/assert.h" +#include "hal/config.h" +#include "rom/gpio.h" #ifdef __cplusplus extern "C" { @@ -334,11 +336,15 @@ static inline void gpio_ll_od_enable(gpio_dev_t *hw, uint32_t gpio_num) __attribute__((always_inline)) static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t level) { +#if HAL_CONFIG_GPIO_USE_ROM_API + gpio_set_output_level(gpio_num, level); +#else if (level) { hw->out_w1ts.val = 1 << gpio_num; } else { hw->out_w1tc.val = 1 << gpio_num; } +#endif } /** @@ -356,7 +362,11 @@ static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t __attribute__((always_inline)) static inline int gpio_ll_get_level(gpio_dev_t *hw, uint32_t gpio_num) { +#if HAL_CONFIG_GPIO_USE_ROM_API + return gpio_get_input_level(gpio_num); +#else return (hw->in.in_data_next >> gpio_num) & 0x1; +#endif } /** diff --git a/components/hal/esp32h4/include/hal/gpio_ll.h b/components/hal/esp32h4/include/hal/gpio_ll.h index 85f703ea3b..3bb8747402 100644 --- a/components/hal/esp32h4/include/hal/gpio_ll.h +++ b/components/hal/esp32h4/include/hal/gpio_ll.h @@ -26,6 +26,8 @@ #include "hal/gpio_types.h" #include "hal/misc.h" #include "hal/assert.h" +#include "hal/config.h" +#include "rom/gpio.h" #ifdef __cplusplus extern "C" { @@ -314,6 +316,9 @@ static inline void gpio_ll_od_enable(gpio_dev_t *hw, uint32_t gpio_num) __attribute__((always_inline)) static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t level) { +#if HAL_CONFIG_GPIO_USE_ROM_API + gpio_set_output_level(gpio_num, level); +#else if (level) { if (gpio_num < 32) { hw->out_w1ts.val = (1 << gpio_num); @@ -327,6 +332,7 @@ static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t hw->out1_w1tc.val = (1 << (gpio_num - 32)); } } +#endif } /** @@ -344,11 +350,15 @@ static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t __attribute__((always_inline)) static inline int gpio_ll_get_level(gpio_dev_t *hw, uint32_t gpio_num) { +#if HAL_CONFIG_GPIO_USE_ROM_API + return gpio_get_input_level(gpio_num); +#else if (gpio_num < 32) { return (hw->in.in_data_next >> gpio_num) & 0x1; } else { return (hw->in1.in1_data_next >> (gpio_num - 32)) & 0x1; } +#endif } /** diff --git a/components/hal/esp32p4/include/hal/gpio_ll.h b/components/hal/esp32p4/include/hal/gpio_ll.h index 431213e653..ae72435ac5 100644 --- a/components/hal/esp32p4/include/hal/gpio_ll.h +++ b/components/hal/esp32p4/include/hal/gpio_ll.h @@ -31,6 +31,8 @@ #include "hal/gpio_types.h" #include "hal/misc.h" #include "hal/assert.h" +#include "hal/config.h" +#include "rom/gpio.h" #ifdef __cplusplus extern "C" { @@ -382,6 +384,9 @@ static inline void gpio_ll_od_enable(gpio_dev_t *hw, uint32_t gpio_num) __attribute__((always_inline)) static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t level) { +#if HAL_CONFIG_GPIO_USE_ROM_API + gpio_set_output_level(gpio_num, level); +#else if (level) { if (gpio_num < 32) { hw->out_w1ts.val = 1 << gpio_num; @@ -395,6 +400,7 @@ static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t hw->out1_w1tc.val = 1 << (gpio_num - 32); } } +#endif } /** @@ -412,11 +418,15 @@ static inline void gpio_ll_set_level(gpio_dev_t *hw, uint32_t gpio_num, uint32_t __attribute__((always_inline)) static inline int gpio_ll_get_level(gpio_dev_t *hw, uint32_t gpio_num) { +#if HAL_CONFIG_GPIO_USE_ROM_API + return gpio_get_input_level(gpio_num); +#else if (gpio_num < 32) { return (hw->in.in_data_next >> gpio_num) & 0x1; } else { return (hw->in1.in1_data_next >> (gpio_num - 32)) & 0x1; } +#endif } /**