From 3f42a81447a92bae14a0e599384ef240768c3b13 Mon Sep 17 00:00:00 2001 From: zhiweijian Date: Fri, 28 Oct 2022 17:20:03 +0800 Subject: [PATCH] Fixed CI esp32s3.default_2_s3.Test failed --- components/esp_phy/test/test_phy_rtc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/components/esp_phy/test/test_phy_rtc.c b/components/esp_phy/test/test_phy_rtc.c index e7a4ee0844..5846ce8a4f 100644 --- a/components/esp_phy/test/test_phy_rtc.c +++ b/components/esp_phy/test/test_phy_rtc.c @@ -77,12 +77,15 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg) #if SOC_BT_SUPPORTED +#if CONFIG_IDF_TARGET_ESP32 + /* Only esp32 will call bt_track_pll_cap() in the interrupt + handler, other chips will call this function in the task + */ ESP_LOGI(TAG, "Test bt_track_pll_cap()..."); spi_flash_disable_interrupts_caches_and_other_cpu(); bt_track_pll_cap(); spi_flash_enable_interrupts_caches_and_other_cpu(); -#if CONFIG_IDF_TARGET_ESP32 extern void bt_bb_init_cmplx_reg(void); ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()..."); spi_flash_disable_interrupts_caches_and_other_cpu();