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Merge branch 'test/add_spi_slave_freq_test' into 'master'

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spi: add spi multiple config test

Closes IDF-5882

See merge request espressif/esp-idf!20125
This commit is contained in:
Wan Lei
2023-03-03 12:54:32 +08:00
parent 140e6bea72 e5810924f2
commit 40ca80397c
15 changed files with 1002 additions and 201 deletions
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3
components/driver/spi/gpspi/spi_slave.c
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@@ -50,6 +50,7 @@ static const char *SPI_TAG = "spi_slave";
typedef struct {
int id;
spi_bus_config_t bus_config;
spi_slave_interface_config_t cfg;
intr_handle_t intr;
spi_slave_hal_context_t hal;
@@ -156,6 +157,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
}
memset(spihost[host], 0, sizeof(spi_slave_t));
memcpy(&spihost[host]->cfg, slave_config, sizeof(spi_slave_interface_config_t));
memcpy(&spihost[host]->bus_config, bus_config, sizeof(spi_bus_config_t));
spihost[host]->id = host;
bool use_dma = (dma_chan != SPI_DMA_DISABLED);
@@ -301,6 +303,7 @@ esp_err_t spi_slave_free(spi_host_device_t host)
if (spihost[host]->dma_enabled) {
spicommon_dma_chan_free(host);
}
spicommon_bus_free_io_cfg(&spihost[host]->bus_config);
free(spihost[host]->hal.dmadesc_tx);
free(spihost[host]->hal.dmadesc_rx);
esp_intr_free(spihost[host]->intr);

13
components/driver/test_apps/components/test_driver_utils/include/test_spi_utils.h
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@@ -165,6 +165,17 @@
.flags=0,\
}
//default device config for slave hd devices
#define SPI_SLOT_TEST_DEFAULT_CONFIG() {\
.spics_io_num = PIN_NUM_CS, \
.flags = 0, \
.mode = 0, \
.command_bits = 8,\
.address_bits = 8,\
.dummy_bits = 8,\
.queue_size = 10,\
}
typedef enum {
FULL_DUPLEX = 0,
HALF_DUPLEX_MISO = 1,
@@ -252,8 +263,8 @@ esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_
#define spitest_cmp_or_dump(expected, actual, len) ({\
int r = memcmp(expected, actual, len);\
if (r != 0) {\
ESP_LOG_BUFFER_HEXDUMP("expected", expected, len, ESP_LOG_INFO);\
ESP_LOG_BUFFER_HEXDUMP("actual ", actual, len, ESP_LOG_WARN);\
ESP_LOG_BUFFER_HEXDUMP("expecte", expected, len, ESP_LOG_INFO);\
TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, len);\
}\
r;\

2
components/driver/test_apps/spi/param/main/CMakeLists.txt
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@@ -9,6 +9,6 @@ set(srcs
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(
SRCS ${srcs}
PRIV_REQUIRES test_utils driver test_driver_utils
PRIV_REQUIRES test_utils driver test_driver_utils esp_serial_slave_link
WHOLE_ARCHIVE
)

925
components/driver/test_apps/spi/param/main/test_spi_param.c
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File diff suppressed because it is too large Load Diff

4
components/driver/test_apps/spi/slave/main/test_app_main.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -8,7 +8,7 @@
#include "unity_test_utils.h"
#include "esp_heap_caps.h"
#define TEST_MEMORY_LEAK_THRESHOLD (100)
#define TEST_MEMORY_LEAK_THRESHOLD (120)
static size_t before_free_8bit;
static size_t before_free_32bit;

8
components/driver/test_apps/spi/slave/main/test_spi_slave.c
View File

@@ -736,14 +736,8 @@ TEST_CASE("test_slave_isr_pin_to_core","[spi]")
slave_expect = 0;
for (int i = 0; i < TEST_ISR_CNT; i++) {
TEST_ESP_OK(spi_slave_initialize(TEST_SPI_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO));
TEST_ESP_OK(spi_slave_queue_trans(TEST_SPI_HOST, &trans_cfg, portMAX_DELAY));
// This two delay used for hardware to activate a interrupt after invoke
vTaskDelay(1);
// to invoke a trans_done intr for spi slave without a master
spi_ll_set_int_stat(SPI_LL_GET_HW(TEST_SPI_HOST));
vTaskDelay(1);
vTaskDelay(1); // Waiting ISR on core 1 to be done.
TEST_ESP_OK(spi_slave_free(TEST_SPI_HOST));
}
printf("Test Slave ISR Assign CPU1: %d : %ld\n", TEST_ISR_CNT, slave_expect);

10
components/driver/test_apps/spi/slave_hd/main/test_spi_slave_hd.c
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@@ -27,16 +27,6 @@
//ESP32-S2 cannot do single board test over IOMUX+GPIO matrix
#define TEST_MASTER_GPIO_MATRIX 1
#define SPI_SLOT_TEST_DEFAULT_CONFIG() {\
.spics_io_num = PIN_NUM_CS, \
.flags = 0, \
.mode = 0, \
.command_bits = 8,\
.address_bits = 8,\
.dummy_bits = 8,\
.queue_size = 10,\
}
//context definition for the tcf framework
typedef struct {
WORD_ALIGNED_ATTR uint8_t master_wrdma_buf[TEST_DMA_MAX_SIZE];

1
components/idf_test/include/esp32/idf_performance_target.h
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@@ -28,6 +28,7 @@
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 90000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 1900000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 16*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#if !CONFIG_FREERTOS_SMP // IDF-5223

1
components/idf_test/include/esp32c2/idf_performance_target.h
View File

@@ -27,6 +27,7 @@
#define IDF_PERFORMANCE_MAX_ECDSA_P192_VERIFY_OP 32000
#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 49000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 20
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 16
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 45

1
components/idf_test/include/esp32c3/idf_performance_target.h
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@@ -20,6 +20,7 @@
#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 45000
#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 670000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#if !CONFIG_FREERTOS_SMP // IDF-5223
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15

1
components/idf_test/include/esp32c6/idf_performance_target.h
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@@ -17,6 +17,7 @@
#define IDF_PERFORMANCE_MAX_ECDSA_P192_VERIFY_OP 18000
#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 27000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 34
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 17
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 32

1
components/idf_test/include/esp32h2/idf_performance_target.h
View File

@@ -18,6 +18,7 @@
#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 45000
#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 670000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 28
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 24
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 58

1
components/idf_test/include/esp32h4/idf_performance_target.h
View File

@@ -26,6 +26,7 @@
#define IDF_PERFORMANCE_MAX_ECDSA_P192_VERIFY_OP 32000
#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 49000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32

1
components/idf_test/include/esp32s2/idf_performance_target.h
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@@ -23,6 +23,7 @@
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 62000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 1850000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32

1
components/idf_test/include/esp32s3/idf_performance_target.h
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@@ -21,6 +21,7 @@
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 80000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 2500000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32