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esp_rom: add common ROM API to update CPU tick rate

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This commit is contained in:
morris
2023-04-19 11:54:57 +08:00
parent b18f390ed9
commit 4123e611dc
23 changed files with 67 additions and 86 deletions
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9
components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld
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@@ -1,9 +0,0 @@
PROVIDE ( ets_update_cpu_frequency = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
PROVIDE ( MD5Final = 0x4005db1c );
PROVIDE ( MD5Init = 0x4005da7c );
PROVIDE ( MD5Update = 0x4005da9c );
/* bootloader will use following functions from xtensa hal library */
xthal_get_ccount = 0x4000c050;
xthal_get_ccompare = 0x4000c078;
xthal_set_ccompare = 0x4000c058;

13
components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld
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@@ -1,13 +0,0 @@
/*
* ESP32S2 ROM address table
* Generated for ROM with MD5sum: 0a2c7ec5109c17884606d23b47045796
*/
PROVIDE (ets_update_cpu_frequency = 0x4000d8a4);
PROVIDE (MD5Final = 0x4000530c);
PROVIDE (MD5Init = 0x4000526c);
PROVIDE (MD5Update = 0x4000528c);
/* bootloader will use following functions from xtensa hal library */
xthal_get_ccount = 0x4001aa90;
xthal_get_ccompare = 0x4001aabc;
xthal_set_ccompare = 0x4001aa98;

6
components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld
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@@ -1,6 +0,0 @@
/**
* ESP32S3 ROM address table
* Generated for ROM with MD5sum: d20fb231463ce337432b1fa9cba0b3c9
*/
PROVIDE ( ets_update_cpu_frequency = 0x40043164 );