espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-04 21:24:32 +02:00
Code Issues Packages Projects Releases Wiki Activity

ulp: temporarily disable SOC_RISCV_COPROC_SUPPORTED for esp32c6

Browse Source 
This commit diables SOC_RISCV_COPROC_SUPPORTED capability for esp32c6
until the feature is supported on this target.
This commit is contained in:
Sudeep Mohanty
2022-09-02 11:43:42 +02:00
parent 15ec31e902
commit 42214abbf5
2 changed files with 1 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@@ -27,10 +27,6 @@ config SOC_SUPPORTS_SECURE_DL_MODE
bool
default y
config SOC_RISCV_COPROC_SUPPORTED
bool
default y
config SOC_EFUSE_KEY_PURPOSE_FIELD
bool
default y

2
components/soc/esp32c6/include/soc/soc_caps.h
View File

@@ -35,7 +35,7 @@
// #define SOC_TEMP_SENSOR_SUPPORTED 1 // TODO: IDF-5322
#define SOC_WIFI_SUPPORTED 1
#define SOC_SUPPORTS_SECURE_DL_MODE 1
#define SOC_RISCV_COPROC_SUPPORTED 1
//#define SOC_RISCV_COPROC_SUPPORTED 1 // TODO: IDF-5816
#define SOC_EFUSE_KEY_PURPOSE_FIELD 1
#define SOC_EFUSE_HAS_EFUSE_RST_BUG 1
#define SOC_RTC_FAST_MEM_SUPPORTED 1