From 8020c46da7d8747dd4b650b9e01acf0c5d06414d Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Fri, 22 Jan 2021 18:04:27 +0800 Subject: [PATCH 1/3] spi_flash: enable ext flash unit-test on esp32c3 --- components/spi_flash/test/test_esp_flash.c | 20 ++++++++++++++------ tools/ci/config/target-test.yml | 7 +++++++ 2 files changed, 21 insertions(+), 6 deletions(-) diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/test_esp_flash.c index 94810e3963..645fd63f34 100644 --- a/components/spi_flash/test/test_esp_flash.c +++ b/components/spi_flash/test/test_esp_flash.c @@ -137,16 +137,24 @@ typedef void (*flash_test_func_t)(const esp_partition_t *part); These tests run for all the flash chip configs shown in config_list, below (internal and external). */ -#if defined(CONFIG_SPIRAM) || TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3) +#if defined(CONFIG_SPIRAM) #define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN) #define FLASH_TEST_CASE_3_IGNORE(STR, FUNCT_TO_RUN) #else +#if !CONFIG_IDF_TARGET_ESP32C3 #define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \ TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} #define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \ TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} +#else +#define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \ + TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} + +#define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \ + TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} +#endif // !CONFIG_IDF_TARGET_ESP32C3 #endif //currently all the configs are the same with esp_flash_spi_device_config_t, no more information required @@ -230,8 +238,11 @@ flashtest_config_t config_list[] = { }; #elif CONFIG_IDF_TARGET_ESP32C3 flashtest_config_t config_list[] = { - FLASHTEST_CONFIG_COMMON, /* No runners for esp32c3 for these config yet */ + { + /* no need to init */ + .host_id = -1, + }, { .io_mode = TEST_SPI_READ_MODE, .speed = TEST_SPI_SPEED, @@ -879,14 +890,12 @@ TEST_CASE("SPI flash test reading with all speed/mode permutations", "[esp_flash } #ifndef CONFIG_SPIRAM -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3) TEST_CASE("SPI flash test reading with all speed/mode permutations, 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH]") { for (int i = 0; i < TEST_CONFIG_NUM; i++) { test_permutations_chip(&config_list[i]); } } -#endif //TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3) #endif @@ -955,8 +964,7 @@ static void test_write_large_buffer(const esp_partition_t* part, const uint8_t * read_and_check(part, source, length); } -#if !CONFIG_SPIRAM && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3) -/* No runners on C3, TODO ESP32-C3 IDF-2399 */ +#if !CONFIG_SPIRAM typedef struct { uint32_t us_start; diff --git a/tools/ci/config/target-test.yml b/tools/ci/config/target-test.yml index 81a456d69a..7af8f3bb26 100644 --- a/tools/ci/config/target-test.yml +++ b/tools/ci/config/target-test.yml @@ -578,6 +578,13 @@ UT_C3: - ESP32C3_IDF - UT_T1_1 +UT_C3_FLASH: + extends: .unit_test_c3_template + parallel: 3 + tags: + - ESP32C3_IDF + - UT_T1_ESP_FLASH + nvs_compatible_test: extends: .integration_test_template artifacts: From cc1c6c30beeba9e672f4411de174bb875b7da20f Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Tue, 2 Feb 2021 12:39:38 +0800 Subject: [PATCH 2/3] flash: check boya chip support --- components/bootloader_support/src/flash_qio_mode.c | 1 + 1 file changed, 1 insertion(+) diff --git a/components/bootloader_support/src/flash_qio_mode.c b/components/bootloader_support/src/flash_qio_mode.c index dc2969744d..fc9dcd376c 100644 --- a/components/bootloader_support/src/flash_qio_mode.c +++ b/components/bootloader_support/src/flash_qio_mode.c @@ -94,6 +94,7 @@ const static qio_info_t chip_data[] = { This approach works for chips including: GigaDevice (mfg ID 0xC8, flash IDs including 4016), FM25Q32 (QOUT mode only, mfg ID 0xA1, flash IDs including 4016) + BY25Q32 (mfg ID 0x68, flash IDs including 4016) */ { NULL, 0xFF, 0xFFFF, 0xFFFF, read_status_8b_rdsr2, write_status_8b_wrsr2, 1 }, }; From e38326d715ee584a8dcc387d399754a53360e2e1 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Thu, 4 Feb 2021 14:37:07 +0800 Subject: [PATCH 3/3] spi_flash: fix the issue that ext flash hold is not controlled properly --- components/hal/esp32c3/include/hal/gpspi_flash_ll.h | 1 + components/spi_flash/test/test_esp_flash.c | 9 ++++----- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/components/hal/esp32c3/include/hal/gpspi_flash_ll.h b/components/hal/esp32c3/include/hal/gpspi_flash_ll.h index 66c78989a2..d1911c4a32 100644 --- a/components/hal/esp32c3/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32c3/include/hal/gpspi_flash_ll.h @@ -148,6 +148,7 @@ static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *bu */ static inline void gpspi_flash_ll_user_start(spi_dev_t *dev) { + dev->ctrl.hold_pol = 1; dev->cmd.update = 1; while (dev->cmd.update); dev->cmd.usr = 1; diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/test_esp_flash.c index 645fd63f34..1360ea83bb 100644 --- a/components/spi_flash/test/test_esp_flash.c +++ b/components/spi_flash/test/test_esp_flash.c @@ -141,21 +141,21 @@ typedef void (*flash_test_func_t)(const esp_partition_t *part); #define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN) #define FLASH_TEST_CASE_3_IGNORE(STR, FUNCT_TO_RUN) -#else +#else //CONFIG_SPIRAM #if !CONFIG_IDF_TARGET_ESP32C3 #define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \ TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} #define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \ TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} -#else +#else //CONFIG_IDF_TARGET_ESP32C3 #define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \ TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} #define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \ TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);} #endif // !CONFIG_IDF_TARGET_ESP32C3 -#endif +#endif //CONFIG_SPIRAM //currently all the configs are the same with esp_flash_spi_device_config_t, no more information required typedef esp_flash_spi_device_config_t flashtest_config_t; @@ -204,7 +204,6 @@ flashtest_config_t config_list[] = { #elif CONFIG_IDF_TARGET_ESP32S2 flashtest_config_t config_list[] = { FLASHTEST_CONFIG_COMMON, - /* No runners for esp32s2 for these config yet */ { .io_mode = TEST_SPI_READ_MODE, .speed = TEST_SPI_SPEED, @@ -238,7 +237,7 @@ flashtest_config_t config_list[] = { }; #elif CONFIG_IDF_TARGET_ESP32C3 flashtest_config_t config_list[] = { - /* No runners for esp32c3 for these config yet */ + /* No SPI1 CS1 flash on esp32c3 test */ { /* no need to init */ .host_id = -1,