mirror of
https://github.com/espressif/esp-idf.git
synced 2025-10-04 11:00:58 +02:00
uart: fix esp32c3 uart output garbage value after resetting
This commit is contained in:
@@ -31,6 +31,7 @@
|
||||
#include "soc/rtc.h"
|
||||
#include "soc/syscon_reg.h"
|
||||
#include "soc/system_reg.h"
|
||||
#include "soc/uart_reg.h"
|
||||
#include "hal/wdt_hal.h"
|
||||
|
||||
/* "inner" restart function for after RTOS, interrupts & anything else on this
|
||||
@@ -99,6 +100,10 @@ void IRAM_ATTR esp_restart_noos(void)
|
||||
|
||||
REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0);
|
||||
|
||||
// Reset uart0 core first, then reset apb side.
|
||||
// rom will clear this bit, as well as SYSTEM_UART_RST
|
||||
SET_PERI_REG_MASK(UART_CLK_CONF_REG(0), UART_RST_CORE_M);
|
||||
|
||||
// Reset timer/spi/uart
|
||||
SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG,
|
||||
SYSTEM_TIMERS_RST | SYSTEM_SPI01_RST | SYSTEM_UART_RST);
|
||||
|
Reference in New Issue
Block a user