From 434bdaeede2096d0fffeb3427115e3da5a819895 Mon Sep 17 00:00:00 2001 From: Zhou Xiao Date: Mon, 15 Sep 2025 14:55:51 +0800 Subject: [PATCH] fix(ble): fixed ble log v2 configuration issues --- components/bt/common/ble_log/Kconfig.in | 28 +++++++++++++++++-- .../src/internal_include/ble_log_lbm.h | 1 - .../src/internal_include/ble_log_util.h | 13 ++------- .../ble_log/src/prph/ble_log_prph_uart_dma.c | 4 +-- 4 files changed, 28 insertions(+), 18 deletions(-) diff --git a/components/bt/common/ble_log/Kconfig.in b/components/bt/common/ble_log/Kconfig.in index bf31e5259b..fe1a1a58ec 100644 --- a/components/bt/common/ble_log/Kconfig.in +++ b/components/bt/common/ble_log/Kconfig.in @@ -33,12 +33,32 @@ if BLE_LOG_ENABLED try to use the LBM with spin lock protection. So the more LBMs with atomic lock protection are created, the more ISRs can nest. + config BLE_LOG_IS_ESP_CONTROLLER + bool "Current BLE Controller is ESP BLE Controller" + depends on BT_CONTROLLER_ENABLED + depends on SOC_ESP_NIMBLE_CONTROLLER + default y + select BT_LE_CONTROLLER_LOG_ENABLED + select BT_LE_CONTROLLER_LOG_MODE_BLE_LOG_V2 + select BLE_LOG_LL_ENABLED + help + Current BLE Controller is ESP BLE Controller + + config BLE_LOG_IS_ESP_LEGACY_CONTROLLER + bool "Current BLE Controller is ESP BLE Legacy Controller" + depends on BT_CONTROLLER_ENABLED + depends on !SOC_ESP_NIMBLE_CONTROLLER + depends on BT_CTRL_RUN_IN_FLASH_ONLY + default y + select BT_CTRL_LE_LOG_EN + select BLE_LOG_LL_ENABLED + help + Current BLE Controller is ESP BLE Legacy Controller + config BLE_LOG_LL_ENABLED bool "Enable BLE Log for Link Layer" depends on BT_CONTROLLER_ENABLED - default y - select BT_LE_CONTROLLER_LOG_ENABLED - select BT_LE_CONTROLLER_LOG_MODE_BLE_LOG + default n help Enable BLE Log for Link Layer @@ -96,11 +116,13 @@ if BLE_LOG_ENABLED config BLE_LOG_PRPH_SPI_MASTER_DMA bool "Utilize SPI master DMA driver as transport" + depends on SOC_GPSPI_SUPPORTED help Utilize SPI master DMA driver as transport config BLE_LOG_PRPH_UART_DMA bool "Utilize UART DMA driver as transport" + depends on SOC_UHCI_SUPPORTED help Utilize UART DMA driver as transport endchoice diff --git a/components/bt/common/ble_log/src/internal_include/ble_log_lbm.h b/components/bt/common/ble_log/src/internal_include/ble_log_lbm.h index 63d0172dbd..c3d79a6714 100644 --- a/components/bt/common/ble_log/src/internal_include/ble_log_lbm.h +++ b/components/bt/common/ble_log/src/internal_include/ble_log_lbm.h @@ -17,7 +17,6 @@ #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" -#include "freertos/portmacro.h" /* ------------------------- */ /* Log Frame Defines */ diff --git a/components/bt/common/ble_log/src/internal_include/ble_log_util.h b/components/bt/common/ble_log/src/internal_include/ble_log_util.h index 04c468ab0a..d0e7c460f0 100644 --- a/components/bt/common/ble_log/src/internal_include/ble_log_util.h +++ b/components/bt/common/ble_log/src/internal_include/ble_log_util.h @@ -17,11 +17,11 @@ #include #include "esp_bit_defs.h" +#include "freertos/FreeRTOS.h" #ifndef UNIT_TEST -#include "freertos/portmacro.h" #include "esp_heap_caps.h" -#include "esp_rom_serial_output.h" +#include "esp_rom_uart.h" #endif /* !UNIT_TEST */ /* MACRO */ @@ -47,18 +47,9 @@ #define BLE_LOG_MEMSET(ptr, value, len) memset(ptr, value, len) /* Critical section wrapper */ -#ifndef CONFIG_BLE_LOG_LL_ENABLED extern portMUX_TYPE ble_log_spin_lock; #define BLE_LOG_ENTER_CRITICAL() portENTER_CRITICAL_SAFE(&ble_log_spin_lock); #define BLE_LOG_EXIT_CRITICAL() portEXIT_CRITICAL_SAFE(&ble_log_spin_lock); -#else /* CONFIG_BLE_LOG_LL_ENABLED */ -/* Note - * It's mandatory to use the same spin lock with Link Layer in multi-core system */ -extern uint32_t npl_freertos_hw_enter_critical(void); -extern void npl_freertos_hw_exit_critical(uint32_t ctx); -#define BLE_LOG_ENTER_CRITICAL() npl_freertos_hw_enter_critical() -#define BLE_LOG_EXIT_CRITICAL() npl_freertos_hw_exit_critical(0) -#endif /* !CONFIG_BLE_LOG_LL_ENABLED */ #define BLE_LOG_ACQUIRE_SPIN_LOCK(spin_lock) portENTER_CRITICAL_SAFE(spin_lock) #define BLE_LOG_RELEASE_SPIN_LOCK(spin_lock) portEXIT_CRITICAL_SAFE(spin_lock) diff --git a/components/bt/common/ble_log/src/prph/ble_log_prph_uart_dma.c b/components/bt/common/ble_log/src/prph/ble_log_prph_uart_dma.c index c366c9b7ec..ea58b000e2 100644 --- a/components/bt/common/ble_log/src/prph/ble_log_prph_uart_dma.c +++ b/components/bt/common/ble_log/src/prph/ble_log_prph_uart_dma.c @@ -23,7 +23,7 @@ /* MACRO */ #define BLE_LOG_UART_MAX_TRANSFER_SIZE (10240) -#define BLE_LOG_UART_RX_BUF_SIZE (32) +#define BLE_LOG_UART_RX_BUF_SIZE (256) #define BLE_LOG_UART_DMA_BURST_SIZE (32) #if BLE_LOG_PRPH_UART_DMA_REDIR #define BLE_LOG_UART_REDIR_BUF_SIZE (512) @@ -95,8 +95,6 @@ bool ble_log_prph_init(size_t trans_cnt) .data_bits = UART_DATA_8_BITS, .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, - .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS, - .rx_flow_ctrl_thresh = 122, }; if ((uart_param_config(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT, &uart_config) != ESP_OK) || (uart_set_pin(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT,