From ca3c056ac9243f2de1ef081c3a11ae9810e0499f Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Tue, 15 Mar 2022 16:28:53 +0800 Subject: [PATCH] kconfig: replace deprecated options with new values --- .../bootloader_support/src/bootloader_console.c | 4 ++-- components/driver/test/test_spi_master.c | 4 ++-- components/esp_system/port/cpu_start.c | 4 ++-- components/esp_system/port/soc/esp32c2/clk.c | 8 ++++---- components/esp_system/port/soc/esp32c3/clk.c | 8 ++++---- components/esp_system/port/soc/esp32h2/clk.c | 8 ++++---- components/esp_system/port/soc/esp32s3/clk.c | 12 ++++++------ components/esp_system/test/test_sleep.c | 4 ++-- components/spi_flash/cache_utils.c | 8 ++++---- .../system/deep_sleep/main/deep_sleep_example_main.c | 8 ++++---- 10 files changed, 34 insertions(+), 34 deletions(-) diff --git a/components/bootloader_support/src/bootloader_console.c b/components/bootloader_support/src/bootloader_console.c index 6005c0fe8f..83cc7893a0 100644 --- a/components/bootloader_support/src/bootloader_console.c +++ b/components/bootloader_support/src/bootloader_console.c @@ -34,13 +34,13 @@ #include "esp_rom_sys.h" #include "esp_rom_caps.h" -#ifdef CONFIG_ESP_CONSOLE_UART_NONE +#ifdef CONFIG_ESP_CONSOLE_NONE void bootloader_console_init(void) { esp_rom_install_channel_putc(1, NULL); esp_rom_install_channel_putc(2, NULL); } -#endif // CONFIG_ESP_CONSOLE_UART_NONE +#endif // CONFIG_ESP_CONSOLE_NONE #ifdef CONFIG_ESP_CONSOLE_UART void bootloader_console_init(void) diff --git a/components/driver/test/test_spi_master.c b/components/driver/test/test_spi_master.c index 5a0b6d8ea1..3533fa6bc0 100644 --- a/components/driver/test/test_spi_master.c +++ b/components/driver/test/test_spi_master.c @@ -1300,7 +1300,7 @@ TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test", #endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494 //NOTE: Explained in IDF-1445 | MR !14996 -#if !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) +#if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) /******************************************************************************** * Test SPI transaction interval ********************************************************************************/ @@ -1457,4 +1457,4 @@ TEST_CASE("spi_speed", "[spi]") master_free_device_bus(spi); } #endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE -#endif // !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) +#endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index 1831133420..6265d4f667 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -156,10 +156,10 @@ void IRAM_ATTR call_start_cpu1(void) bootloader_init_mem(); -#if CONFIG_ESP_CONSOLE_UART_NONE +#if CONFIG_ESP_CONSOLE_NONE esp_rom_install_channel_putc(1, NULL); esp_rom_install_channel_putc(2, NULL); -#else // CONFIG_ESP_CONSOLE_UART_NONE +#else // CONFIG_ESP_CONSOLE_NONE esp_rom_install_uart_printf(); esp_rom_uart_set_as_console(CONFIG_ESP_CONSOLE_UART_NUM); #endif diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c index f136ae4b0f..0c8a9f40fb 100644 --- a/components/esp_system/port/soc/esp32c2/clk.c +++ b/components/esp_system/port/soc/esp32c2/clk.c @@ -210,10 +210,10 @@ __attribute__((weak)) void esp_perip_clk_init(void) wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG); } else { common_perip_clk = SYSTEM_SPI2_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif SYSTEM_LEDC_CLK_EN | @@ -230,10 +230,10 @@ __attribute__((weak)) void esp_perip_clk_init(void) //Reset the communication peripherals like I2C, SPI, UART and bring them to known state. common_perip_clk |= SYSTEM_SPI2_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif SYSTEM_I2C_EXT0_CLK_EN; diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c index 8c624106fd..b9bd4624f4 100644 --- a/components/esp_system/port/soc/esp32c3/clk.c +++ b/components/esp_system/port/soc/esp32c3/clk.c @@ -216,10 +216,10 @@ __attribute__((weak)) void esp_perip_clk_init(void) } else { common_perip_clk = SYSTEM_WDG_CLK_EN | SYSTEM_I2S0_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif SYSTEM_SPI2_CLK_EN | @@ -247,10 +247,10 @@ __attribute__((weak)) void esp_perip_clk_init(void) //Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state. common_perip_clk |= SYSTEM_I2S0_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif SYSTEM_SPI2_CLK_EN | diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c index 528ad9b7d3..5f97155860 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h2/clk.c @@ -213,10 +213,10 @@ __attribute__((weak)) void esp_perip_clk_init(void) } else { common_perip_clk = SYSTEM_WDG_CLK_EN | SYSTEM_I2S0_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif SYSTEM_SPI2_CLK_EN | @@ -240,10 +240,10 @@ __attribute__((weak)) void esp_perip_clk_init(void) //Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state. common_perip_clk |= SYSTEM_I2S0_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif SYSTEM_SPI2_CLK_EN | diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c index 436aa32f9c..7d739834b0 100644 --- a/components/esp_system/port/soc/esp32s3/clk.c +++ b/components/esp_system/port/soc/esp32s3/clk.c @@ -232,13 +232,13 @@ __attribute__((weak)) void esp_perip_clk_init(void) } else { common_perip_clk = SYSTEM_WDG_CLK_EN | SYSTEM_I2S0_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 2 +#if CONFIG_ESP_CONSOLE_UART_NUM != 2 SYSTEM_UART2_CLK_EN | #endif SYSTEM_USB_CLK_EN | @@ -272,13 +272,13 @@ __attribute__((weak)) void esp_perip_clk_init(void) //Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state. common_perip_clk |= SYSTEM_I2S0_CLK_EN | -#if CONFIG_CONSOLE_UART_NUM != 0 +#if CONFIG_ESP_CONSOLE_UART_NUM != 0 SYSTEM_UART_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 1 +#if CONFIG_ESP_CONSOLE_UART_NUM != 1 SYSTEM_UART1_CLK_EN | #endif -#if CONFIG_CONSOLE_UART_NUM != 2 +#if CONFIG_ESP_CONSOLE_UART_NUM != 2 SYSTEM_UART2_CLK_EN | #endif SYSTEM_USB_CLK_EN | diff --git a/components/esp_system/test/test_sleep.c b/components/esp_system/test/test_sleep.c index f7cbdea4c4..e1a51d0eec 100644 --- a/components/esp_system/test/test_sleep.c +++ b/components/esp_system/test/test_sleep.c @@ -83,7 +83,7 @@ TEST_CASE("wake up from light sleep using timer", "[deepsleep]") } //NOTE: Explained in IDF-1445 | MR !14996 -#if !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) +#if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) static void test_light_sleep(void* arg) { vTaskDelay(2); @@ -139,7 +139,7 @@ TEST_CASE("light sleep stress test with periodic esp_timer", "[deepsleep]") esp_timer_stop(timer); esp_timer_delete(timer); } -#endif // !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) +#endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) #if defined(CONFIG_ESP_SYSTEM_RTC_EXT_XTAL) #define MAX_SLEEP_TIME_ERROR_US 200 diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c index a584e9dcef..00c74b5d15 100644 --- a/components/spi_flash/cache_utils.c +++ b/components/spi_flash/cache_utils.c @@ -622,7 +622,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable return ESP_FAIL; } -#ifdef CONFIG_FLASHMODE_QIO +#ifdef CONFIG_ESPTOOLPY_FLASHMODE_QIO flash_support_wrap = true; extern bool spi_flash_support_wrap_size(uint32_t wrap_size); if (!spi_flash_support_wrap_size(flash_wrap_size)) { @@ -876,7 +876,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable return ESP_FAIL; } -#ifdef CONFIG_FLASHMODE_QIO +#ifdef CONFIG_ESPTOOLPY_FLASHMODE_QIO flash_support_wrap = true; extern bool spi_flash_support_wrap_size(uint32_t wrap_size); if (!spi_flash_support_wrap_size(flash_wrap_size)) { @@ -944,7 +944,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable) flash_wrap_size = 32; } -#ifdef CONFIG_FLASHMODE_QIO +#ifdef CONFIG_ESPTOOLPY_FLASHMODE_QIO flash_support_wrap = true; extern bool spi_flash_support_wrap_size(uint32_t wrap_size); if (!spi_flash_support_wrap_size(flash_wrap_size)) { @@ -953,7 +953,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable) } #else ESP_EARLY_LOGW(TAG, "Flash is not in QIO mode, do not support wrap."); -#endif // CONFIG_FLASHMODE_QIO +#endif // CONFIG_ESPTOOLPY_FLASHMODE_QIO extern esp_err_t spi_flash_enable_wrap(uint32_t wrap_size); if (flash_support_wrap && flash_wrap_size > 0) { diff --git a/examples/system/deep_sleep/main/deep_sleep_example_main.c b/examples/system/deep_sleep/main/deep_sleep_example_main.c index b2973e647e..bc05d4348f 100644 --- a/examples/system/deep_sleep/main/deep_sleep_example_main.c +++ b/examples/system/deep_sleep/main/deep_sleep_example_main.c @@ -48,13 +48,13 @@ static RTC_DATA_ATTR struct timeval sleep_enter_time; /* * Offset (in 32-bit words) in RTC Slow memory where the data is placed * by the ULP coprocessor. It can be chosen to be any value greater or equal - * to ULP program size, and less than the CONFIG_ESP32_ULP_COPROC_RESERVE_MEM/4 - 6, + * to ULP program size, and less than the CONFIG_ULP_COPROC_RESERVE_MEM/4 - 6, * where 6 is the number of words used by the ULP coprocessor. */ #define ULP_DATA_OFFSET 36 -_Static_assert(ULP_DATA_OFFSET < CONFIG_ESP32_ULP_COPROC_RESERVE_MEM/4 - 6, - "ULP_DATA_OFFSET is set too high, or CONFIG_ESP32_ULP_COPROC_RESERVE_MEM is not sufficient"); +_Static_assert(ULP_DATA_OFFSET < CONFIG_ULP_COPROC_RESERVE_MEM/4 - 6, + "ULP_DATA_OFFSET is set too high, or CONFIG_ULP_COPROC_RESERVE_MEM is not sufficient"); /** * @brief Start ULP temperature monitoring program @@ -344,7 +344,7 @@ static void start_ulp_temperature_monitoring(void) CLEAR_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_POWER_UP_FORCE); // Clear the part of RTC_SLOW_MEM reserved for the ULP. Makes debugging easier. - memset(RTC_SLOW_MEM, 0, CONFIG_ESP32_ULP_COPROC_RESERVE_MEM); + memset(RTC_SLOW_MEM, 0, CONFIG_ULP_COPROC_RESERVE_MEM); // The first word of memory (at data offset) is used to store the initial temperature (T0) // Zero it out here, then ULP will update it on the first run.