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fix(console): enable to select UART1 port for console output
This feature was only enabled for esp32, esp32s2, esp32s3 previously. Now, enabling this feature for all targets.
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@@ -315,34 +315,6 @@ static inline void uart_ll_reset_register(uart_port_t uart_num)
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// HP_SYS_CLKRST.hp_rst_en1 is a shared register, so this function must be used in an atomic way
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#define uart_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; uart_ll_reset_register(__VA_ARGS__)
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/**
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* @brief Configure the UART core reset.
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*
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* @param hw Beginning address of the peripheral registers.
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* @param core_rst_en True to enable the core reset, otherwise set it false.
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*
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* @return None.
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*/
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FORCE_INLINE_ATTR void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en)
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{
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if ((hw) == &UART0) {
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_uart0_core = core_rst_en;
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} else if ((hw) == &UART1) {
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_uart1_core = core_rst_en;
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} else if ((hw) == &UART2) {
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_uart2_core = core_rst_en;
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} else if ((hw) == &UART3) {
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_uart3_core = core_rst_en;
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} else if ((hw) == &UART4) {
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_uart4_core = core_rst_en;
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} else {
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// Not going to implement LP_UART reset in this function, it will have its own LL function
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abort();
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}
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}
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// HP_SYS_CLKRST.hp_rst_en1 is a shared register, so this function must be used in an atomic way
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#define uart_ll_set_reset_core(...) (void)__DECLARE_RCC_ATOMIC_ENV; uart_ll_set_reset_core(__VA_ARGS__)
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/**
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* @brief Enable the UART clock.
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*
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