From 4800e9b3c4668f3f0efa48ffae60682a3e62c3ef Mon Sep 17 00:00:00 2001 From: Laukik Hase Date: Mon, 3 Jan 2022 18:17:43 +0530 Subject: [PATCH] ci: Fix for `ETSTimers arm & disarm run from IRAM` UT - For ESP32 | SPIRAM_MALLOC_ALWAYSINTERNAL=0 - Forced `esp_timer_create` to allocate resource from the internal memory - WiFi/BT coexistence will sometimes arm/disarm timers from an ISR where flash may be disabled. This can lead to a cache-based exception as the timer instance will be located in the PSRAM. --- components/esp_timer/src/esp_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_timer/src/esp_timer.c b/components/esp_timer/src/esp_timer.c index 60ea868cd9..13c0adcb66 100644 --- a/components/esp_timer/src/esp_timer.c +++ b/components/esp_timer/src/esp_timer.c @@ -121,7 +121,7 @@ esp_err_t esp_timer_create(const esp_timer_create_args_t* args, args->dispatch_method < 0 || args->dispatch_method >= ESP_TIMER_MAX) { return ESP_ERR_INVALID_ARG; } - esp_timer_handle_t result = (esp_timer_handle_t) calloc(1, sizeof(*result)); + esp_timer_handle_t result = (esp_timer_handle_t) heap_caps_calloc(1, sizeof(*result), MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL); if (result == NULL) { return ESP_ERR_NO_MEM; }