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feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe

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This commit is contained in:
wuzhenghui
2023-09-25 11:29:15 +08:00
committed by Gao Xu
parent b183b88463
commit 49013a0560
8 changed files with 64 additions and 78 deletions
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42
components/esp_hw_support/modem_clock.c
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@@ -21,7 +21,8 @@
// Please define the frequently called modules in the low bit, // Please define the frequently called modules in the low bit,
// which will improve the execution efficiency // which will improve the execution efficiency
typedef enum { typedef enum {
MODEM_CLOCK_FE, MODEM_CLOCK_MODEM_ADC_COMMON_FE,
MODEM_CLOCK_MODEM_PRIVATE_FE,
MODEM_CLOCK_COEXIST, MODEM_CLOCK_COEXIST,
MODEM_CLOCK_I2C_MASTER, MODEM_CLOCK_I2C_MASTER,
#if SOC_WIFI_SUPPORTED #if SOC_WIFI_SUPPORTED
@@ -53,9 +54,6 @@ typedef struct modem_clock_context {
modem_clock_lpclk_src_t lpclk_src[PERIPH_MODEM_MODULE_NUM]; modem_clock_lpclk_src_t lpclk_src[PERIPH_MODEM_MODULE_NUM];
} modem_clock_context_t; } modem_clock_context_t;
extern portMUX_TYPE rtc_spinlock;
static int modem_clock_apb_80m_cnt;
#if SOC_WIFI_SUPPORTED #if SOC_WIFI_SUPPORTED
static void IRAM_ATTR modem_clock_wifi_mac_configure(modem_clock_context_t *ctx, bool enable) static void IRAM_ATTR modem_clock_wifi_mac_configure(modem_clock_context_t *ctx, bool enable)
@@ -102,34 +100,15 @@ static void IRAM_ATTR modem_clock_coex_configure(modem_clock_context_t *ctx, boo
modem_lpcon_ll_enable_coex_clock(ctx->hal->lpcon_dev, enable); modem_lpcon_ll_enable_coex_clock(ctx->hal->lpcon_dev, enable);
} }
static void IRAM_ATTR modem_clock_fe_configure(modem_clock_context_t *ctx, bool enable) static void IRAM_ATTR modem_clock_modem_adc_common_fe_configure(modem_clock_context_t *ctx, bool enable)
{ {
modem_clock_hal_enable_fe_clock(ctx->hal, enable); modem_clock_hal_enable_modem_adc_common_fe_clock(ctx->hal, enable);
modem_clock_shared_enable(enable);
} }
#if SOC_MODEM_CLOCK_IS_INDEPENDENT static void IRAM_ATTR modem_clock_modem_private_fe_configure(modem_clock_context_t *ctx, bool enable)
void modem_clock_shared_enable(bool enable)
{ {
if(enable) { modem_clock_hal_enable_modem_private_fe_clock(ctx->hal, enable);
portENTER_CRITICAL_SAFE(&rtc_spinlock);
modem_clock_apb_80m_cnt++;
if (modem_clock_apb_80m_cnt == 1) {
modem_clock_hal_enable_shared_clock(true);
}
portEXIT_CRITICAL_SAFE(&rtc_spinlock);
} else {
portENTER_CRITICAL_SAFE(&rtc_spinlock);
modem_clock_apb_80m_cnt--;
if (modem_clock_apb_80m_cnt == 0) {
modem_clock_hal_enable_shared_clock(false);
} else if (modem_clock_apb_80m_cnt < 0) {
abort();
}
portEXIT_CRITICAL_SAFE(&rtc_spinlock);
}
} }
#endif // SOC_MODEM_CLOCK_IS_INDEPENDENT
static void IRAM_ATTR modem_clock_i2c_master_configure(modem_clock_context_t *ctx, bool enable) static void IRAM_ATTR modem_clock_i2c_master_configure(modem_clock_context_t *ctx, bool enable)
{ {
@@ -154,7 +133,8 @@ modem_clock_context_t * __attribute__((weak)) IRAM_ATTR MODEM_CLOCK_instance(voi
static DRAM_ATTR modem_clock_context_t modem_clock_context = { static DRAM_ATTR modem_clock_context_t modem_clock_context = {
.hal = &modem_clock_hal, .lock = portMUX_INITIALIZER_UNLOCKED, .hal = &modem_clock_hal, .lock = portMUX_INITIALIZER_UNLOCKED,
.dev = { .dev = {
[MODEM_CLOCK_FE] = { .refs = 0, .configure = modem_clock_fe_configure }, [MODEM_CLOCK_MODEM_ADC_COMMON_FE] = { .refs = 0, .configure = modem_clock_modem_adc_common_fe_configure },
[MODEM_CLOCK_MODEM_PRIVATE_FE] = { .refs = 0, .configure = modem_clock_modem_private_fe_configure },
[MODEM_CLOCK_COEXIST] = { .refs = 0, .configure = modem_clock_coex_configure }, [MODEM_CLOCK_COEXIST] = { .refs = 0, .configure = modem_clock_coex_configure },
[MODEM_CLOCK_I2C_MASTER] = { .refs = 0, .configure = modem_clock_i2c_master_configure }, [MODEM_CLOCK_I2C_MASTER] = { .refs = 0, .configure = modem_clock_i2c_master_configure },
#if SOC_WIFI_SUPPORTED #if SOC_WIFI_SUPPORTED
@@ -190,7 +170,7 @@ static void IRAM_ATTR modem_clock_domain_power_state_icg_map_init(modem_clock_co
[MODEM_CLOCK_DOMAIN_MODEM_PERIPH] = ICG_NOGATING_ACTIVE, [MODEM_CLOCK_DOMAIN_MODEM_PERIPH] = ICG_NOGATING_ACTIVE,
[MODEM_CLOCK_DOMAIN_WIFI] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_WIFI] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_BT] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_BT] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_FE] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_LP_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_LP_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_I2C_MASTER] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_I2C_MASTER] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
@@ -306,9 +286,10 @@ void IRAM_ATTR modem_clock_module_mac_reset(periph_module_t module)
#define BLE_CLOCK_DEPS (BIT(MODEM_CLOCK_BLE_MAC) | BIT(MODEM_CLOCK_BLE_BB) | BIT(MODEM_CLOCK_ETM) | BIT(MODEM_CLOCK_COEXIST)) #define BLE_CLOCK_DEPS (BIT(MODEM_CLOCK_BLE_MAC) | BIT(MODEM_CLOCK_BLE_BB) | BIT(MODEM_CLOCK_ETM) | BIT(MODEM_CLOCK_COEXIST))
#define IEEE802154_CLOCK_DEPS (BIT(MODEM_CLOCK_802154_MAC) | BIT(MODEM_CLOCK_BLE_BB) | BIT(MODEM_CLOCK_ETM) | BIT(MODEM_CLOCK_COEXIST)) #define IEEE802154_CLOCK_DEPS (BIT(MODEM_CLOCK_802154_MAC) | BIT(MODEM_CLOCK_BLE_BB) | BIT(MODEM_CLOCK_ETM) | BIT(MODEM_CLOCK_COEXIST))
#define COEXIST_CLOCK_DEPS (BIT(MODEM_CLOCK_COEXIST)) #define COEXIST_CLOCK_DEPS (BIT(MODEM_CLOCK_COEXIST))
#define PHY_CLOCK_DEPS (BIT(MODEM_CLOCK_I2C_MASTER) | BIT(MODEM_CLOCK_FE)) #define PHY_CLOCK_DEPS (BIT(MODEM_CLOCK_I2C_MASTER) | BIT(MODEM_CLOCK_MODEM_ADC_COMMON_FE) | BIT(MODEM_CLOCK_MODEM_PRIVATE_FE))
#define I2C_ANA_MST_CLOCK_DEPS (BIT(MODEM_CLOCK_I2C_MASTER)) #define I2C_ANA_MST_CLOCK_DEPS (BIT(MODEM_CLOCK_I2C_MASTER))
#define MODEM_ETM_CLOCK_DEPS (BIT(MODEM_CLOCK_ETM)) #define MODEM_ETM_CLOCK_DEPS (BIT(MODEM_CLOCK_ETM))
#define MODEM_ADC_COMMON_FE_CLOCK_DEPS (BIT(MODEM_CLOCK_MODEM_ADC_COMMON_FE))
static IRAM_ATTR uint32_t modem_clock_get_module_deps(periph_module_t module) static IRAM_ATTR uint32_t modem_clock_get_module_deps(periph_module_t module)
{ {
@@ -316,6 +297,7 @@ static IRAM_ATTR uint32_t modem_clock_get_module_deps(periph_module_t module)
switch (module) { switch (module) {
case PERIPH_ANA_I2C_MASTER_MODULE: deps = I2C_ANA_MST_CLOCK_DEPS; break; case PERIPH_ANA_I2C_MASTER_MODULE: deps = I2C_ANA_MST_CLOCK_DEPS; break;
case PERIPH_PHY_MODULE: deps = PHY_CLOCK_DEPS; break; case PERIPH_PHY_MODULE: deps = PHY_CLOCK_DEPS; break;
case PERIPH_MODEM_ADC_COMMON_FE_MODULE: deps = MODEM_ADC_COMMON_FE_CLOCK_DEPS; break;
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED #if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
case PERIPH_COEX_MODULE: deps = COEXIST_CLOCK_DEPS; break; case PERIPH_COEX_MODULE: deps = COEXIST_CLOCK_DEPS; break;
#endif #endif

4
components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c
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@@ -56,7 +56,7 @@ static int s_pwdet_power_on_cnt;
static void s_sar_power_acquire(void) static void s_sar_power_acquire(void)
{ {
modem_clock_shared_enable(true); modem_clock_module_enable(PERIPH_MODEM_ADC_COMMON_FE_MODULE);
portENTER_CRITICAL_SAFE(&rtc_spinlock); portENTER_CRITICAL_SAFE(&rtc_spinlock);
s_pwdet_power_on_cnt++; s_pwdet_power_on_cnt++;
if (s_pwdet_power_on_cnt == 1) { if (s_pwdet_power_on_cnt == 1) {
@@ -77,7 +77,7 @@ static void s_sar_power_release(void)
sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM); sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
} }
portEXIT_CRITICAL_SAFE(&rtc_spinlock); portEXIT_CRITICAL_SAFE(&rtc_spinlock);
modem_clock_shared_enable(false); modem_clock_module_disable(PERIPH_MODEM_ADC_COMMON_FE_MODULE);
} }

20
components/hal/esp32c6/modem_clock_hal.c
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@@ -36,7 +36,7 @@ void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal,
case MODEM_CLOCK_DOMAIN_BT: case MODEM_CLOCK_DOMAIN_BT:
modem_syscon_ll_set_bt_icg_bitmap(hal->syscon_dev, bitmap); modem_syscon_ll_set_bt_icg_bitmap(hal->syscon_dev, bitmap);
break; break;
case MODEM_CLOCK_DOMAIN_FE: case MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE:
modem_syscon_ll_set_fe_icg_bitmap(hal->syscon_dev, bitmap); modem_syscon_ll_set_fe_icg_bitmap(hal->syscon_dev, bitmap);
break; break;
case MODEM_CLOCK_DOMAIN_IEEE802154: case MODEM_CLOCK_DOMAIN_IEEE802154:
@@ -77,7 +77,7 @@ uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *
case MODEM_CLOCK_DOMAIN_BT: case MODEM_CLOCK_DOMAIN_BT:
bitmap = modem_syscon_ll_get_bt_icg_bitmap(hal->syscon_dev); bitmap = modem_syscon_ll_get_bt_icg_bitmap(hal->syscon_dev);
break; break;
case MODEM_CLOCK_DOMAIN_FE: case MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE:
bitmap = modem_syscon_ll_get_fe_icg_bitmap(hal->syscon_dev); bitmap = modem_syscon_ll_get_fe_icg_bitmap(hal->syscon_dev);
break; break;
case MODEM_CLOCK_DOMAIN_IEEE802154: case MODEM_CLOCK_DOMAIN_IEEE802154:
@@ -101,7 +101,15 @@ uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *
return bitmap; return bitmap;
} }
void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable) void IRAM_ATTR modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_context_t *hal, bool enable)
{
if (enable) {
modem_syscon_ll_enable_fe_apb_clock(hal->syscon_dev, enable);
modem_syscon_ll_enable_fe_80m_clock(hal->syscon_dev, enable);
}
}
void IRAM_ATTR modem_clock_hal_enable_modem_private_fe_clock(modem_clock_hal_context_t *hal, bool enable)
{ {
if (enable) { if (enable) {
modem_syscon_ll_enable_fe_cal_160m_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_cal_160m_clock(hal->syscon_dev, enable);
@@ -109,12 +117,6 @@ void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable
} }
} }
void IRAM_ATTR modem_clock_hal_enable_shared_clock(bool enable)
{
modem_syscon_ll_enable_fe_apb_clock(&MODEM_SYSCON, enable);
modem_syscon_ll_enable_fe_80m_clock(&MODEM_SYSCON, enable);
}
void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider) void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider)
{ {
modem_lpcon_ll_set_ble_rtc_timer_divisor_value(hal->lpcon_dev, divider); modem_lpcon_ll_set_ble_rtc_timer_divisor_value(hal->lpcon_dev, divider);

12
components/hal/esp32h2/modem_clock_hal.c
View File

@@ -19,7 +19,12 @@ typedef enum {
MODEM_CLOCK_EXT32K_CODE = 2 MODEM_CLOCK_EXT32K_CODE = 2
} modem_clock_32k_clk_src_code_t; } modem_clock_32k_clk_src_code_t;
void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable) void IRAM_ATTR modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_context_t *hal, bool enable)
{
modem_syscon_ll_enable_fe_apb_clock(hal->syscon_dev, enable);
}
void IRAM_ATTR modem_clock_hal_enable_modem_private_fe_clock(modem_clock_hal_context_t *hal, bool enable)
{ {
modem_lpcon_ll_enable_fe_mem_clock(hal->lpcon_dev, enable); modem_lpcon_ll_enable_fe_mem_clock(hal->lpcon_dev, enable);
modem_syscon_ll_enable_fe_sdm_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_sdm_clock(hal->syscon_dev, enable);
@@ -28,11 +33,6 @@ void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable
modem_syscon_ll_enable_fe_16m_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_16m_clock(hal->syscon_dev, enable);
} }
void IRAM_ATTR modem_clock_hal_enable_shared_clock(bool enable)
{
modem_syscon_ll_enable_fe_apb_clock(&MODEM_SYSCON, enable);
}
void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider) void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider)
{ {
lp_clkrst_ll_set_ble_rtc_timer_divisor_value(&LP_CLKRST, divider); lp_clkrst_ll_set_ble_rtc_timer_divisor_value(&LP_CLKRST, divider);

4
components/hal/include/hal/modem_clock_hal.h
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@@ -27,8 +27,8 @@ void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal,
uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain); uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain);
#endif #endif
void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable); void modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_context_t *hal, bool enable);
void modem_clock_hal_enable_shared_clock(bool enable); void modem_clock_hal_enable_modem_private_fe_clock(modem_clock_hal_context_t *hal, bool enable);
#if SOC_BT_SUPPORTED #if SOC_BT_SUPPORTED
void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider); void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider);

4
components/hal/include/hal/modem_clock_types.h
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@@ -15,13 +15,13 @@ typedef enum {
MODEM_CLOCK_DOMAIN_MODEM_PERIPH, MODEM_CLOCK_DOMAIN_MODEM_PERIPH,
MODEM_CLOCK_DOMAIN_WIFI, MODEM_CLOCK_DOMAIN_WIFI,
MODEM_CLOCK_DOMAIN_BT, MODEM_CLOCK_DOMAIN_BT,
MODEM_CLOCK_DOMAIN_FE, MODEM_CLOCK_DOMAIN_MODEM_ADC_COMMON_FE,
MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE,
MODEM_CLOCK_DOMAIN_IEEE802154, MODEM_CLOCK_DOMAIN_IEEE802154,
MODEM_CLOCK_DOMAIN_LP_APB, MODEM_CLOCK_DOMAIN_LP_APB,
MODEM_CLOCK_DOMAIN_I2C_MASTER, MODEM_CLOCK_DOMAIN_I2C_MASTER,
MODEM_CLOCK_DOMAIN_COEX, MODEM_CLOCK_DOMAIN_COEX,
MODEM_CLOCK_DOMAIN_WIFIPWR, MODEM_CLOCK_DOMAIN_WIFIPWR,
MODEM_CLOCK_DOMAIN_MAX MODEM_CLOCK_DOMAIN_MAX
} modem_clock_domain_t; } modem_clock_domain_t;

3
components/soc/esp32c6/include/soc/periph_defs.h
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@@ -51,12 +51,13 @@ typedef enum {
PERIPH_PHY_MODULE, PERIPH_PHY_MODULE,
PERIPH_ANA_I2C_MASTER_MODULE, PERIPH_ANA_I2C_MASTER_MODULE,
PERIPH_MODEM_ETM_MODULE, PERIPH_MODEM_ETM_MODULE,
PERIPH_MODEM_ADC_COMMON_FE_MODULE,
PERIPH_MODULE_MAX PERIPH_MODULE_MAX
/* !!! Don't append soc modules here !!! */ /* !!! Don't append soc modules here !!! */
} periph_module_t; } periph_module_t;
#define PERIPH_MODEM_MODULE_MIN PERIPH_WIFI_MODULE #define PERIPH_MODEM_MODULE_MIN PERIPH_WIFI_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ETM_MODULE #define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
#define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1) #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
#define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX)) #define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))

3
components/soc/esp32h2/include/soc/periph_defs.h
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@@ -49,12 +49,13 @@ typedef enum {
PERIPH_PHY_MODULE, PERIPH_PHY_MODULE,
PERIPH_ANA_I2C_MASTER_MODULE, PERIPH_ANA_I2C_MASTER_MODULE,
PERIPH_MODEM_ETM_MODULE, PERIPH_MODEM_ETM_MODULE,
PERIPH_MODEM_ADC_COMMON_FE_MODULE,
PERIPH_MODULE_MAX PERIPH_MODULE_MAX
/* !!! Don't append soc modules here !!! */ /* !!! Don't append soc modules here !!! */
} periph_module_t; } periph_module_t;
#define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE #define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ETM_MODULE #define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
#define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1) #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
#define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX)) #define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))