From 4a1c291389cff8c049d8c003e2d5ab027b2c6592 Mon Sep 17 00:00:00 2001 From: wanlei Date: Thu, 6 Jul 2023 19:17:38 +0800 Subject: [PATCH] fix(all): update documentaion for spi slave hd protocols --- docs/docs_not_updated/esp32c6.txt | 1 - docs/docs_not_updated/esp32h2.txt | 1 - .../peripherals/spi_slave_hd.rst | 3 ++ .../protocols/esp_spi_slave_protocol.rst | 30 +++++++++---------- 4 files changed, 18 insertions(+), 17 deletions(-) diff --git a/docs/docs_not_updated/esp32c6.txt b/docs/docs_not_updated/esp32c6.txt index 229f43d477..26c446c4fb 100644 --- a/docs/docs_not_updated/esp32c6.txt +++ b/docs/docs_not_updated/esp32c6.txt @@ -2,4 +2,3 @@ api-guides/openthread api-reference/network api-reference/network/esp_openthread api-reference/network/index -api-reference/protocols/esp_spi_slave_protocol diff --git a/docs/docs_not_updated/esp32h2.txt b/docs/docs_not_updated/esp32h2.txt index 2bed4cd360..06f9384bc3 100644 --- a/docs/docs_not_updated/esp32h2.txt +++ b/docs/docs_not_updated/esp32h2.txt @@ -49,7 +49,6 @@ api-reference/system/inc/power_management_esp32 api-reference/system/inc/power_management_esp32s2_and_later api-reference/protocols/esp_serial_slave_link api-reference/protocols/esp_sdio_slave_protocol -api-reference/protocols/esp_spi_slave_protocol api-reference/protocols/modbus api-reference/protocols/index about diff --git a/docs/en/api-reference/peripherals/spi_slave_hd.rst b/docs/en/api-reference/peripherals/spi_slave_hd.rst index da802c4bbf..2f353ea2a1 100644 --- a/docs/en/api-reference/peripherals/spi_slave_hd.rst +++ b/docs/en/api-reference/peripherals/spi_slave_hd.rst @@ -8,6 +8,9 @@ The half duplex (HD) mode is a special mode provided by ESP SPI Slave peripheral There are several different types of transactions, determined by the *command* phase of the transaction. Each transaction may consist of the following phases: command, address, dummy, data. The command phase is mandatory, while the other fields may be determined by the command field. During the command, address, dummy phases, the bus is always controlled by the master, while the direction of the data phase depends on the command. The data phase can be either an in phase, for the master to write data to the slave; or an out phase, for the master to read data from the slave. +Protocol +^^^^^^^^ + About the details of how master should communicate with the SPI Slave, see :doc:`/api-reference/protocols/esp_spi_slave_protocol`. By these different transactions, the slave provide these services to the master: diff --git a/docs/en/api-reference/protocols/esp_spi_slave_protocol.rst b/docs/en/api-reference/protocols/esp_spi_slave_protocol.rst index b3f2d047d4..a5ba687557 100644 --- a/docs/en/api-reference/protocols/esp_spi_slave_protocol.rst +++ b/docs/en/api-reference/protocols/esp_spi_slave_protocol.rst @@ -11,21 +11,21 @@ ESP SPI Slave HD (Half Duplex) Mode Protocol SPI Slave Capabilities of Espressif chips ----------------------------------------- -+--------------------+-------+----------+----------+ -| | ESP32 | ESP32-S2 | ESP32-C3 | -+====================+=======+==========+==========+ -| SPI Slave HD | N | Y (v2) | Y (v2) | -+--------------------+-------+----------+----------+ -| Tohost intr | | N | N | -+--------------------+-------+----------+----------+ -| Frhost intr | | 2 \* | 2 \* | -+--------------------+-------+----------+----------+ -| TX DMA | | Y | Y | -+--------------------+-------+----------+----------+ -| RX DMA | | Y | Y | -+--------------------+-------+----------+----------+ -| Shared registers | | 72 | 64 | -+--------------------+-------+----------+----------+ ++------------------+-------+----------+----------+----------+----------+----------+----------+ +| | ESP32 | ESP32-S2 | ESP32-C3 | ESP32-S3 | ESP32-C2 | ESP32-C6 | ESP32-H2 | ++------------------+-------+----------+----------+----------+----------+----------+----------+ +| SPI Slave HD | N | Y (v2) | Y (v2) | Y (v2) | Y (v2) | Y (v2) | Y (v2) | ++------------------+-------+----------+----------+----------+----------+----------+----------+ +| Tohost intr | | N | N | N | N | N | N | ++------------------+-------+----------+----------+----------+----------+----------+----------+ +| Frhost intr | | 2 \* | 2 \* | 2 \* | 2 \* | 2 \* | 2 \* | ++------------------+-------+----------+----------+----------+----------+----------+----------+ +| TX DMA | | Y | Y | Y | Y | Y | Y | ++------------------+-------+----------+----------+----------+----------+----------+----------+ +| RX DMA | | Y | Y | Y | Y | Y | Y | ++------------------+-------+----------+----------+----------+----------+----------+----------+ +| Shared registers | | 72 | 64 | 64 | 64 | 64 | 64 | ++------------------+-------+----------+----------+----------+----------+----------+----------+ Introduction ------------