Merge branch 'feature/ble_lib_update_h2_c6_v5.1' into 'release/v5.1'

ble: update h2 c6 libble to 5d7af429

See merge request espressif/esp-idf!25692

components/bt/controller/esp32c2/bt.c

@@ -246,10 +246,10 @@ static void IRAM_ATTR esp_reset_rpa_moudle(void)
 static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
                                          uint32_t param1, uint32_t param2)
 {
+    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
 #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     esp_ble_controller_log_dump_all(true);
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
     assert(0);
 }
 

components/bt/controller/esp32c6/Kconfig.in

@@ -523,3 +523,7 @@ config BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD
         add new device information.
         2. When the refresh period is up, the controller will clear all device information and start filtering
         again.
+
+config BT_LE_MSYS_INIT_IN_CONTROLLER
+    bool
+    default y

components/bt/controller/esp32c6/bt.c

@@ -40,9 +40,13 @@
 #include "hci_uart.h"
 #include "bt_osi_mem.h"
 
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if SOC_PM_RETENTION_HAS_CLOCK_BUG
 #include "esp_private/sleep_retention.h"
-#endif
+#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
+
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#include "esp_private/sleep_modem.h"
+#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
 
 #ifdef CONFIG_BT_BLUEDROID_ENABLED
 #include "hci/hci_hal.h"
@@ -55,7 +59,7 @@
 #include "esp_sleep.h"
 
 #include "hal/efuse_hal.h"
-
+#include "soc/rtc.h"
 /* Macro definition
  ************************************************************************
  */
@@ -73,7 +77,6 @@
 #define ACL_DATA_MBUF_LEADINGSPCAE    4
 #endif // CONFIG_BT_BLUEDROID_ENABLED
 
-
 /* Types definition
  ************************************************************************
  */
@@ -133,17 +136,18 @@ extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
 extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
 extern void esp_unregister_npl_funcs (void);
 extern void npl_freertos_mempool_deinit(void);
-extern int os_msys_buf_alloc(void);
 extern uint32_t r_os_cputime_get32(void);
 extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
 extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
                                         void *w_arg, uint32_t us_to_enabled);
 extern void r_ble_rtc_wake_up_state_clr(void);
+extern int os_msys_init(void);
+extern void os_msys_deinit(void);
 #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
+extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
-extern int os_msys_init(void);
+extern void esp_ble_change_rtc_freq(uint32_t freq);
-extern void os_msys_buf_free(void);
 extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
                                 const uint8_t *peer_pub_key_y,
                                 const uint8_t *our_priv_key, uint8_t *out_dhkey);
@@ -247,10 +251,10 @@ static void IRAM_ATTR esp_reset_rpa_moudle(void)
 static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
                                          uint32_t param1, uint32_t param2)
 {
+    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
 #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     esp_ble_controller_log_dump_all(true);
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
     assert(0);
 }
 
@@ -456,6 +460,39 @@ static int esp_intr_free_wrapper(void **ret_handle)
     return rc;
 }
 
+void esp_bt_rtc_slow_clk_select(uint8_t slow_clk_src)
+{
+    /* Select slow clock source for BT momdule */
+    switch (slow_clk_src) {
+        case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
+            uint32_t chip_version = efuse_hal_chip_revision();
+            if (chip_version == 0) {
+                modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (400 - 1));
+            } else{
+                modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (5 - 1));
+            }
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (5 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_XTAL32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_RC32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_EXT32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        default:
+    }
+}
+
 IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
 {
     if (!s_ble_active) {
@@ -506,8 +543,14 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
 {
     sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_MAC);
 }
+
+void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
+{
+    esp_ble_set_wakeup_overhead(overhead);
+}
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
 
+
 esp_err_t controller_sleep_init(void)
 {
     esp_err_t rc = 0;
@@ -534,6 +577,11 @@ esp_err_t controller_sleep_init(void)
     assert(rc == 0);
     esp_sleep_enable_bt_wakeup();
     ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
+
+    rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+    if (rc != ESP_OK) {
+        goto error;
+    }
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
     return rc;
 
@@ -541,6 +589,7 @@ error:
 
 #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
     esp_sleep_disable_bt_wakeup();
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
     /*lock should release first and then delete*/
     if (s_pm_lock != NULL) {
@@ -558,6 +607,7 @@ void controller_sleep_deinit(void)
     r_ble_rtc_wake_up_state_clr();
     esp_sleep_disable_bt_wakeup();
     sleep_modem_ble_mac_modem_state_deinit();
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
 #ifdef CONFIG_PM_ENABLE
     /* lock should be released first */
@@ -642,6 +692,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
     uint8_t mac[6];
     esp_err_t ret = ESP_OK;
     ble_npl_count_info_t npl_info;
+    uint32_t slow_clk_freq = 0;
 
     memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
 
@@ -683,15 +734,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
         goto free_mem;
     }
 
-    /* Initialize the global memory pool */
-    ret = os_msys_buf_alloc();
-    if (ret != ESP_OK) {
-        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
-        goto free_mem;
-    }
-
-    os_msys_init();
-
 #if CONFIG_BT_NIMBLE_ENABLED
     /* ble_npl_eventq_init() needs to use npl functions in rom and
      * must be called after esp_bt_controller_init().
@@ -703,26 +745,27 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 
     /* Select slow clock source for BT momdule */
 #if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
+   esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
-    uint32_t chip_version = efuse_hal_chip_revision();
+   slow_clk_freq = 100000;
-    if (chip_version == 0) {
-        modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (400 - 1));
-    } else{
-        modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (5 - 1));
-    }
 #else
 #if CONFIG_RTC_CLK_SRC_INT_RC
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC_SLOW, (5 - 1));
+    slow_clk_freq = 30000;
 #elif CONFIG_RTC_CLK_SRC_EXT_CRYS
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
+    if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_XTAL32K, (1 - 1));
+        esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K);
+        slow_clk_freq = 32768;
+    } else {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
+        esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
+        slow_clk_freq = 100000;
+    }
 #elif CONFIG_RTC_CLK_SRC_INT_RC32K
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC32K, (1 - 1));
+    slow_clk_freq = 32000;
 #elif CONFIG_RTC_CLK_SRC_EXT_OSC
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_EXT32K, (1 - 1));
+    slow_clk_freq = 32000;
 #else
     ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
     assert(0);
@@ -746,6 +789,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
         goto modem_deint;
     }
 
+    esp_ble_change_rtc_freq(slow_clk_freq);
 #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     interface_func_t bt_controller_log_interface;
     bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -762,6 +806,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 
     ble_controller_scan_duplicate_config();
 
+    ret = os_msys_init();
+    if (ret != ESP_OK) {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "msys_init failed %d", ret);
+        goto free_controller;
+    }
+
     ret = controller_sleep_init();
     if (ret != ESP_OK) {
         ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
@@ -783,6 +833,7 @@ free_controller:
 controller_init_err:
     ble_log_deinit_async();
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    os_msys_deinit();
     ble_controller_deinit();
 modem_deint:
     esp_phy_modem_deinit();
@@ -792,7 +843,6 @@ modem_deint:
     ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED
 free_mem:
-    os_msys_buf_free();
     npl_freertos_mempool_deinit();
     esp_unregister_npl_funcs();
     npl_freertos_funcs_deinit();
@@ -810,6 +860,8 @@ esp_err_t esp_bt_controller_deinit(void)
 
     controller_sleep_deinit();
 
+    os_msys_deinit();
+
     esp_phy_modem_deinit();
     modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
     modem_clock_module_disable(PERIPH_BT_MODULE);
@@ -824,8 +876,6 @@ esp_err_t esp_bt_controller_deinit(void)
     ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED
 
-    os_msys_buf_free();
-
     esp_unregister_npl_funcs();
 
     esp_unregister_ext_funcs();

components/bt/controller/esp32c6/esp_bt_cfg.h

@@ -196,17 +196,7 @@ extern "C" {
 
 #define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N     (3000)
 
-#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
-#define RTC_FREQ_N                          (100000) /* in Hz */
-#else
-#if CONFIG_RTC_CLK_SRC_INT_RC
-#define RTC_FREQ_N                          (30000) /* in Hz */
-#elif CONFIG_RTC_CLK_SRC_EXT_CRYS
 #define RTC_FREQ_N                          (32768) /* in Hz */
-#else
-#define RTC_FREQ_N                          (32000) /* in Hz */
-#endif
-#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
 
 #define BLE_LL_TX_PWR_DBM_N                 (9)
 

components/bt/controller/esp32h2/Kconfig.in

@@ -525,3 +525,7 @@ config BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD
         add new device information.
         2. When the refresh period is up, the controller will clear all device information and start filtering
         again.
+
+config BT_LE_MSYS_INIT_IN_CONTROLLER
+    bool
+    default y

components/bt/controller/esp32h2/bt.c

@@ -42,7 +42,11 @@
 
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG
 #include "esp_private/sleep_retention.h"
-#endif
+#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
+
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#include "esp_private/sleep_modem.h"
+#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
 
 #ifdef CONFIG_BT_BLUEDROID_ENABLED
 #include "hci/hci_hal.h"
@@ -53,6 +57,7 @@
 
 #include "esp_private/periph_ctrl.h"
 #include "esp_sleep.h"
+#include "soc/rtc.h"
 /* Macro definition
  ************************************************************************
  */
@@ -70,7 +75,6 @@
 #define ACL_DATA_MBUF_LEADINGSPCAE    4
 #endif // CONFIG_BT_BLUEDROID_ENABLED
 
-
 /* Types definition
  ************************************************************************
  */
@@ -129,17 +133,18 @@ extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
 extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
 extern void esp_unregister_npl_funcs (void);
 extern void npl_freertos_mempool_deinit(void);
-extern int os_msys_buf_alloc(void);
 extern uint32_t r_os_cputime_get32(void);
 extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
 #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
+extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+extern void esp_ble_change_rtc_freq(uint32_t freq);
 extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
                                         void *w_arg, uint32_t us_to_enabled);
 extern void r_ble_rtc_wake_up_state_clr(void);
 extern int os_msys_init(void);
-extern void os_msys_buf_free(void);
+extern void os_msys_deinit(void);
 extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
                                 const uint8_t *peer_pub_key_y,
                                 const uint8_t *our_priv_key, uint8_t *out_dhkey);
@@ -243,10 +248,10 @@ static void IRAM_ATTR esp_reset_rpa_moudle(void)
 static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
                                          uint32_t param1, uint32_t param2)
 {
+    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
 #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     esp_ble_controller_log_dump_all(true);
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
     assert(0);
 }
 
@@ -452,6 +457,33 @@ static int esp_intr_free_wrapper(void **ret_handle)
     return rc;
 }
 
+void esp_bt_rtc_slow_clk_select(uint8_t slow_clk_src)
+{
+    /* Select slow clock source for BT momdule */
+    switch (slow_clk_src) {
+        case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (320 - 1));
+        case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (5 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_XTAL32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_RC32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_EXT32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        default:
+    }
+}
+
 IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
 {
     if (!s_ble_active) {
@@ -503,6 +535,10 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
     sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_MAC);
 }
 
+void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
+{
+    esp_ble_set_wakeup_overhead(overhead);
+}
 #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
 
 esp_err_t controller_sleep_init(void)
@@ -531,6 +567,11 @@ esp_err_t controller_sleep_init(void)
     assert(rc == 0);
     esp_sleep_enable_bt_wakeup();
     ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
+
+    rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+    if (rc != ESP_OK) {
+        goto error;
+    }
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
     return rc;
 
@@ -538,6 +579,7 @@ error:
 
 #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
     esp_sleep_disable_bt_wakeup();
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
     /*lock should release first and then delete*/
     if (s_pm_lock != NULL) {
@@ -555,6 +597,7 @@ void controller_sleep_deinit(void)
     r_ble_rtc_wake_up_state_clr();
     esp_sleep_disable_bt_wakeup();
     sleep_modem_ble_mac_modem_state_deinit();
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
 #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
 #ifdef CONFIG_PM_ENABLE
     /* lock should be released first */
@@ -639,6 +682,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
     uint8_t mac[6];
     esp_err_t ret = ESP_OK;
     ble_npl_count_info_t npl_info;
+    uint32_t slow_clk_freq = 0;
 
     memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
     if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
@@ -679,15 +723,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
         goto free_mem;
     }
 
-    /* Initialize the global memory pool */
-    ret = os_msys_buf_alloc();
-    if (ret != ESP_OK) {
-        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
-        goto free_mem;
-    }
-
-    os_msys_init();
-
 #if CONFIG_BT_NIMBLE_ENABLED
     /* ble_npl_eventq_init() needs to use npl functions in rom and
      * must be called after esp_bt_controller_init().
@@ -698,21 +733,27 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
     /* Enable BT-related clocks */
     modem_clock_module_enable(PERIPH_BT_MODULE);
 #if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
+   esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (320 - 1));
+   slow_clk_freq = 100000;
 #else
 #if CONFIG_RTC_CLK_SRC_INT_RC
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC_SLOW, (5 - 1));
+    slow_clk_freq = 30000;
 #elif CONFIG_RTC_CLK_SRC_EXT_CRYS
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
+    if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_XTAL32K, (1 - 1));
+        esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K);
+        slow_clk_freq = 32768;
+    } else {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
+        esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
+        slow_clk_freq = 100000;
+    }
 #elif CONFIG_RTC_CLK_SRC_INT_RC32K
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC32K, (1 - 1));
+    slow_clk_freq = 32000;
 #elif CONFIG_RTC_CLK_SRC_EXT_OSC
-    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_EXT32K, (1 - 1));
+    slow_clk_freq = 32000;
 #else
     ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
     assert(0);
@@ -735,6 +776,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
         goto modem_deint;
     }
 
+    esp_ble_change_rtc_freq(slow_clk_freq);
 #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     interface_func_t bt_controller_log_interface;
     bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -751,6 +793,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 
     ble_controller_scan_duplicate_config();
 
+    ret = os_msys_init();
+    if (ret != ESP_OK) {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "msys_init failed %d", ret);
+        goto free_controller;
+    }
+
     ret = controller_sleep_init();
     if (ret != ESP_OK) {
         ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
@@ -773,6 +821,7 @@ free_controller:
 controller_init_err:
     ble_log_deinit_async();
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    os_msys_deinit();
     ble_controller_deinit();
 modem_deint:
     modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
@@ -781,7 +830,6 @@ modem_deint:
     ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED
 free_mem:
-    os_msys_buf_free();
     npl_freertos_mempool_deinit();
     esp_unregister_npl_funcs();
     npl_freertos_funcs_deinit();
@@ -799,6 +847,8 @@ esp_err_t esp_bt_controller_deinit(void)
 
     controller_sleep_deinit();
 
+    os_msys_deinit();
+
     modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
     modem_clock_module_disable(PERIPH_BT_MODULE);
 
@@ -812,8 +862,6 @@ esp_err_t esp_bt_controller_deinit(void)
     ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED
 
-    os_msys_buf_free();
-
     esp_unregister_npl_funcs();
 
     esp_unregister_ext_funcs();

components/bt/controller/esp32h2/esp_bt_cfg.h

@@ -196,17 +196,7 @@ extern "C" {
 
 #define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N     (3000)
 
-#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
-#define RTC_FREQ_N                          (100000) /* in Hz */
-#else
-#if CONFIG_RTC_CLK_SRC_INT_RC
-#define RTC_FREQ_N                          (30000) /* in Hz */
-#elif CONFIG_RTC_CLK_SRC_EXT_CRYS
 #define RTC_FREQ_N                          (32768) /* in Hz */
-#else
-#define RTC_FREQ_N                          (32000) /* in Hz */
-#endif
-#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
 
 #define BLE_LL_TX_PWR_DBM_N                 (9)
 

components/bt/porting/nimble/src/os_msys_init.c

@@ -48,9 +48,12 @@ static STAILQ_HEAD(, os_mbuf_pool) g_msys_pool_list =
 #define SYSINIT_MSYS_1_MEMPOOL_SIZE                 \
     OS_MEMPOOL_SIZE(OS_MSYS_1_BLOCK_COUNT,  \
                     SYSINIT_MSYS_1_MEMBLOCK_SIZE)
+
+#if !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
 static os_membuf_t *os_msys_init_1_data;
 static struct os_mbuf_pool os_msys_init_1_mbuf_pool;
 static struct os_mempool os_msys_init_1_mempool;
+#endif // !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
 #endif
 
 #if OS_MSYS_2_BLOCK_COUNT > 0
@@ -59,18 +62,32 @@ static struct os_mempool os_msys_init_1_mempool;
 #define SYSINIT_MSYS_2_MEMPOOL_SIZE                 \
     OS_MEMPOOL_SIZE(OS_MSYS_2_BLOCK_COUNT,  \
                     SYSINIT_MSYS_2_MEMBLOCK_SIZE)
+
+#if !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
 static os_membuf_t *os_msys_init_2_data;
 static struct os_mbuf_pool os_msys_init_2_mbuf_pool;
 static struct os_mempool os_msys_init_2_mempool;
+#endif // !CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
 #endif
 
-#define OS_MSYS_SANITY_ENABLED                  \
+#if CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
-    (OS_MSYS_1_SANITY_MIN_COUNT > 0 || \
+extern int  esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2);
-     OS_MSYS_2_SANITY_MIN_COUNT > 0)
+extern void esp_ble_msys_deinit(void);
 
-#if OS_MSYS_SANITY_ENABLED
+int os_msys_init(void)
-static struct os_sanity_check os_msys_sc;
+{
-#endif
+    return esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
+                             SYSINIT_MSYS_2_MEMBLOCK_SIZE,
+                             OS_MSYS_1_BLOCK_COUNT,
+                             OS_MSYS_2_BLOCK_COUNT);
+}
+
+void os_msys_deinit(void)
+{
+    esp_ble_msys_deinit();
+}
+
+#else // CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
 
 #if OS_MSYS_SANITY_ENABLED
 
@@ -208,3 +225,4 @@ void os_msys_init(void)
     SYSINIT_PANIC_ASSERT(rc == 0);
 #endif
 }
+#endif // CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER

components/esp_hw_support/sleep_modem.c

@@ -337,7 +337,7 @@ esp_err_t sleep_modem_configure(int max_freq_mhz, int min_freq_mhz, bool light_s
     return ESP_OK;
 }
 
-#define PERIPH_INFORM_OUT_LIGHT_SLEEP_OVERHEAD_NO 1
+#define PERIPH_INFORM_OUT_LIGHT_SLEEP_OVERHEAD_NO 2
 
 /* Inform peripherals of light sleep wakeup overhead time */
 static inform_out_light_sleep_overhead_cb_t s_periph_inform_out_light_sleep_overhead_cb[PERIPH_INFORM_OUT_LIGHT_SLEEP_OVERHEAD_NO];

examples/bluetooth/nimble/power_save/README.md

@@ -20,6 +20,7 @@ This example contains some build configurations. For each configuration, a few c
 - `sdkconfig.40m.esp32s3`: ESP32S3 uses main XTAL as low power clock in light sleep enabled.
 - `sdkconfig.defaults.esp32h2`: ESP32H2 uses 32kHz XTAL as low power clock in light sleep enabled.
 - `sdkconfig.32m.esp32h2`: ESP32H2 uses main XTAL as low power clock in light sleep enabled.
+- `sdkconfig.defaults.esp32c2`: ESP32C2 uses main XTAL as low power clock in light sleep enabled.
 ## How to use example
 
 ### Hardware Required
@@ -61,14 +62,21 @@ idf.py menuconfig
      - `[*] Enable BLE sleep`
 5. Configure bluetooth low power clock:
    - `Component config > Bluetooth > Controller Options > BLE low power clock source`
-   - Use main XTAL as low power clock source during light sleep:
-     - `(X) Use main XTAL as RTC clock source`
    - Use RTC clock source as low power clock sourceduring light sleep:
      - `(X) Use system RTC slow clock source`
 6. Power down flash during light sleep:
    - `Component config > Hardware Settings > Sleep Config`
      - `[*] Power down flash in light sleep when there is no SPIRAM`
 
+#### For Chip ESP32-C2
+
+4. Enable bluetooth modem sleep:
+   - `Component config > Bluetooth > Controller Options`
+     - `[*] Enable BLE sleep`
+5. Power down flash during light sleep:
+   - `Component config > Hardware Settings > Sleep Config`
+     - `[*] Power down flash in light sleep when there is no SPIRAM`
+
 ### Build and Flash
 
 ```
@@ -130,8 +138,10 @@ I (463) NimBLE:
 | ESP32S3                                     | 240 mA      | 17.9 mA     | 3.3 mA                  | 230 uA                   |
 | ESP32H2                                     | 82 mA       | 16.0 mA     | 4.0 mA                  | 24 uA                    |
 | ESP32C6                                     | 240 mA      | 22 mA       | 3.3 mA                  | 34  uA                   |
+| ESP32C2                                     | 130 mA      | 18.0 mA     | 2.5 mA                  | X                        |
 X: This feature is currently not supported.
 
 ## Example Breakdown
 
-- ESP32 does not support the use of main XTAL in light sleep mode, so an external 32kHz crystal is required.
+- ESP32 does not support the use of main XTAL in light sleep mode, so an external 32kHz crystal is required.
+- ESP32C2 does not support the use of 32KHz XTAL in light sleep mode, the XTAL frequency is set to 26MHz in default.

examples/bluetooth/nimble/power_save/main/Kconfig.projbuild

@@ -2,8 +2,9 @@ menu "Example Configuration"
 
     choice EXAMPLE_MAX_CPU_FREQ
         prompt "Maximum CPU frequency"
-        default EXAMPLE_MAX_CPU_FREQ_160 if !IDF_TARGET_ESP32H2
+        default EXAMPLE_MAX_CPU_FREQ_160 if !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2
         default EXAMPLE_MAX_CPU_FREQ_96 if IDF_TARGET_ESP32H2
+        default EXAMPLE_MAX_CPU_FREQ_120 if IDF_TARGET_ESP32C2
         depends on PM_ENABLE
         help
             Maximum CPU frequency to use for dynamic frequency scaling.
@@ -15,6 +16,9 @@ menu "Example Configuration"
             depends on IDF_TARGET_ESP32H2
         config EXAMPLE_MAX_CPU_FREQ_160
             bool "160 MHz"
+        config EXAMPLE_MAX_CPU_FREQ_120
+            bool "120 MHz"
+            depends on IDF_TARGET_ESP32C2
         config EXAMPLE_MAX_CPU_FREQ_240
             bool "240 MHz"
             depends on IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3
@@ -24,13 +28,15 @@ menu "Example Configuration"
         int
         default 80 if EXAMPLE_MAX_CPU_FREQ_80
         default 96 if EXAMPLE_MAX_CPU_FREQ_96
+        default 120 if EXAMPLE_MAX_CPU_FREQ_120
         default 160 if EXAMPLE_MAX_CPU_FREQ_160
         default 240 if EXAMPLE_MAX_CPU_FREQ_240
 
     choice EXAMPLE_MIN_CPU_FREQ
         prompt "Minimum CPU frequency"
-        default EXAMPLE_MIN_CPU_FREQ_40M if !IDF_TARGET_ESP32H2
+        default EXAMPLE_MIN_CPU_FREQ_40M if !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2
         default EXAMPLE_MIN_CPU_FREQ_32M if IDF_TARGET_ESP32H2
+        default EXAMPLE_MIN_CPU_FREQ_26M if IDF_TARGET_ESP32C2
         depends on PM_ENABLE
         help
             Minimum CPU frequency to use for dynamic frequency scaling.
@@ -52,6 +58,10 @@ menu "Example Configuration"
             bool "32 MHz (use with 32MHz XTAL)"
             depends on IDF_TARGET_ESP32H2
             depends on XTAL_FREQ_32 || XTAL_FREQ_AUTO
+        config EXAMPLE_MIN_CPU_FREQ_26M
+            bool "26 MHz (use with 26MHz XTAL)"
+            depends on IDF_TARGET_ESP32C2
+            depends on XTAL_FREQ_26 || XTAL_FREQ_AUTO
         config EXAMPLE_MIN_CPU_FREQ_20M
             bool "20 MHz (use with 40MHz XTAL)"
             depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO
@@ -65,6 +75,7 @@ menu "Example Configuration"
         default 80 if EXAMPLE_MIN_CPU_FREQ_80M
         default 40 if EXAMPLE_MIN_CPU_FREQ_40M
         default 32 if EXAMPLE_MIN_CPU_FREQ_32M
+        default 26 if EXAMPLE_MIN_CPU_FREQ_26M
         default 20 if EXAMPLE_MIN_CPU_FREQ_20M
         default 10 if EXAMPLE_MIN_CPU_FREQ_10M
 

examples/bluetooth/nimble/power_save/sdkconfig.defaults.esp32c2

@@ -0,0 +1,19 @@
+CONFIG_IDF_TARGET="esp32h2"
+
+# Bluetooth Low Power Config
+CONFIG_BT_LE_SLEEP_ENABLE=y
+
+#
+# Power Management
+#
+CONFIG_PM_ENABLE=y
+CONFIG_PM_DFS_INIT_AUTO=y
+
+# XTAL Freq Config
+CONFIG_XTAL_FREQ_26=y
+CONFIG_XTAL_FREQ=26
+
+#
+# Sleep Config
+#
+CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y