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gpio: Fix some gpio pin num errors on esp32s2

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This commit is contained in:
songruojing
2022-02-10 20:59:27 +08:00
committed by BOT
parent 680710df2f
commit 4c267ef0a6
4 changed files with 4 additions and 7 deletions
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4
components/driver/test/test_gpio.c
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@ -728,11 +728,11 @@ TEST_CASE("GPIO ISR service test", "[gpio][ignore]")
{ {
const int test_io18 = GPIO_NUM_18; const int test_io18 = GPIO_NUM_18;
const int test_io19 = GPIO_NUM_19; const int test_io19 = GPIO_NUM_19;
static gpio_isr_param_t io18_param = { gpio_isr_param_t io18_param = {
.gpio_num = GPIO_NUM_18, .gpio_num = GPIO_NUM_18,
.isr_cnt = 0, .isr_cnt = 0,
}; };
static gpio_isr_param_t io19_param = { gpio_isr_param_t io19_param = {
.gpio_num = GPIO_NUM_19, .gpio_num = GPIO_NUM_19,
.isr_cnt = 0, .isr_cnt = 0,
}; };

2
components/soc/soc/esp32s2/gpio_periph.c
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@ -62,7 +62,6 @@ const uint32_t GPIO_PIN_MUX_REG[GPIO_PIN_COUNT] = {
IO_MUX_GPIO44_REG, IO_MUX_GPIO44_REG,
IO_MUX_GPIO45_REG, IO_MUX_GPIO45_REG,
IO_MUX_GPIO46_REG, IO_MUX_GPIO46_REG,
0,
}; };
const uint32_t GPIO_HOLD_MASK[GPIO_PIN_COUNT] = { const uint32_t GPIO_HOLD_MASK[GPIO_PIN_COUNT] = {
@ -113,5 +112,4 @@ const uint32_t GPIO_HOLD_MASK[GPIO_PIN_COUNT] = {
BIT(23), BIT(23),
BIT(24), BIT(24),
BIT(25), BIT(25),
BIT(26),
}; };

4
components/soc/soc/esp32s2/include/soc/gpio_caps.h
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@ -20,9 +20,9 @@ extern "C" {
// ESP32-S2 has 1 GPIO peripheral // ESP32-S2 has 1 GPIO peripheral
#define SOC_GPIO_PORT (1) #define SOC_GPIO_PORT (1)
#define GPIO_PIN_COUNT (48) #define GPIO_PIN_COUNT (47)
// On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. // On ESP32-S2 those PADs which have RTC functions must set pullup/down/capability via RTC register.
// On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. // On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
#define GPIO_SUPPORTS_RTC_INDEPENDENT (1) #define GPIO_SUPPORTS_RTC_INDEPENDENT (1)
// Force hold is a new function of ESP32-S2 // Force hold is a new function of ESP32-S2

1
components/soc/soc/esp32s2/rtc_io_periph.c
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@ -62,7 +62,6 @@ const int rtc_io_num_map[GPIO_PIN_COUNT] = {
-1,//GPIO44 -1,//GPIO44
-1,//GPIO45 -1,//GPIO45
-1,//GPIO46 -1,//GPIO46
-1,//GPIO47
}; };
//Reg,Mux,Fun,IE,Up,Down,Rtc_number //Reg,Mux,Fun,IE,Up,Down,Rtc_number