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fix(esp_system): Remove redundant crypto clock source selection

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harshal.patil
2025-07-19 13:09:44 +05:30
parent 94019776bd
commit 4fc9fd4891
1 changed files with 0 additions and 3 deletions
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components/esp_system/port/soc/esp32c5/clk.c
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@@ -155,9 +155,6 @@ __attribute__((weak)) void esp_clk_init(void)
// Re calculate the ccount to make time calculation correct. // Re calculate the ccount to make time calculation correct.
esp_cpu_set_cycle_count((uint64_t)esp_cpu_get_cycle_count() * new_freq_mhz / old_freq_mhz); esp_cpu_set_cycle_count((uint64_t)esp_cpu_get_cycle_count() * new_freq_mhz / old_freq_mhz);
// Set crypto clock (`clk_sec`) to use 480M SPLL clock
REG_SET_FIELD(PCR_SEC_CONF_REG, PCR_SEC_CLK_SEL, 0x2);
} }
static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)