espressif/esp-idf
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Update esp32h2 beta2 lib to master

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This commit is contained in:
GengYuchao
2022-07-05 15:15:41 +08:00
parent 271f4e4c40
commit 509ac4e748
4 changed files with 12 additions and 22 deletions
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10
components/bt/controller/esp32h2/bt.c
View File

@@ -58,13 +58,9 @@
#define OSI_COEX_VERSION 0x00010006 #define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
#define EXT_FUNC_VERSION 0x20220125 #define EXT_FUNC_VERSION 0x20220125
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5 #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
#define EXT_FUNC_VERSION 0xE0000001
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
#endif
/* Types definition /* Types definition
************************************************************************ ************************************************************************
*/ */
@@ -94,11 +90,9 @@ struct ext_funcs_t {
void (* _task_delete)(void *task_handle); void (* _task_delete)(void *task_handle);
void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2); void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
uint32_t (* _os_random)(void); uint32_t (* _os_random)(void);
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
int (* _ecc_gen_key_pair)(uint8_t *pub, uint8_t *priv); int (* _ecc_gen_key_pair)(uint8_t *pub, uint8_t *priv);
int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey); int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey);
int (* _esp_reset_rpa_moudle)(void); int (* _esp_reset_rpa_moudle)(void);
#endif
uint32_t magic; uint32_t magic;
}; };
@@ -214,11 +208,9 @@ struct ext_funcs_t ext_funcs_ro = {
._task_delete = task_delete_wrapper, ._task_delete = task_delete_wrapper,
._osi_assert = osi_assert_wrapper, ._osi_assert = osi_assert_wrapper,
._os_random = osi_random_wrapper, ._os_random = osi_random_wrapper,
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
._ecc_gen_key_pair = ble_sm_alg_gen_key_pair, ._ecc_gen_key_pair = ble_sm_alg_gen_key_pair,
._ecc_gen_dh_key = ble_sm_alg_gen_dhkey, ._ecc_gen_dh_key = ble_sm_alg_gen_dhkey,
._esp_reset_rpa_moudle = esp_reset_rpa_moudle, ._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
#endif
.magic = EXT_FUNC_MAGIC_VALUE, .magic = EXT_FUNC_MAGIC_VALUE,
}; };

2
components/bt/controller/lib_esp32h2/esp32h2-bt-lib

Submodule components/bt/controller/lib_esp32h2/esp32h2-bt-lib updated: 841644b836...8bf4c4c2cb

17
components/bt/include/esp32h2/include/esp_bt.h
View File

@@ -118,13 +118,9 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
*/ */
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type); esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type);
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 #define CONFIG_VERSION 0x20220409
#define CONFIG_VERSION 0x20220409 #define CONFIG_MAGIC 0x5A5AA5A5
#define CONFIG_MAGIC 0x5A5AA5A5
#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
#define CONFIG_VERSION 0x20211021
#define CONFIG_MAGIC 0x5A5AA5A5
#endif
/** /**
* @brief Controller config options, depend on config mask. * @brief Controller config options, depend on config mask.
* Config mask indicate which functions enabled, this means * Config mask indicate which functions enabled, this means
@@ -173,16 +169,12 @@ typedef struct {
uint8_t ble_hci_uart_uart_parity; uint8_t ble_hci_uart_uart_parity;
uint8_t enable_tx_cca; uint8_t enable_tx_cca;
uint8_t cca_rssi_thresh; uint8_t cca_rssi_thresh;
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
uint8_t cca_drop_mode; uint8_t cca_drop_mode;
int8_t cca_low_tx_pwr; int8_t cca_low_tx_pwr;
#endif
uint8_t sleep_en; uint8_t sleep_en;
uint8_t coex_phy_coded_tx_rx_time_limit; uint8_t coex_phy_coded_tx_rx_time_limit;
uint8_t dis_scan_backoff; uint8_t dis_scan_backoff;
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
uint8_t scan_classify_filter_enable; uint8_t scan_classify_filter_enable;
#endif
uint32_t config_magic; uint32_t config_magic;
} esp_bt_controller_config_t; } esp_bt_controller_config_t;
@@ -229,8 +221,11 @@ typedef struct {
.ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ .ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \
.enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \ .enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \
.cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \ .cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \
.cca_drop_mode = 0, \
.cca_low_tx_pwr = 0, \
.sleep_en = NIMBLE_SLEEP_ENABLE, \ .sleep_en = NIMBLE_SLEEP_ENABLE, \
.coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \ .coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
.scan_classify_filter_enable = false, \
.config_magic = CONFIG_MAGIC, \ .config_magic = CONFIG_MAGIC, \
}; };

5
components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.ld
View File

@@ -614,6 +614,7 @@ ets_secure_boot_revoke_public_key_digest = 0x40000994;
***************************************/ ***************************************/
/* Functions */ /* Functions */
/*
ble_controller_rom_data_init = 0x40000b08; ble_controller_rom_data_init = 0x40000b08;
ble_osi_coex_funcs_register = 0x40000b0c; ble_osi_coex_funcs_register = 0x40000b0c;
bt_rf_coex_cfg_get_default = 0x40000b10; bt_rf_coex_cfg_get_default = 0x40000b10;
@@ -1605,7 +1606,9 @@ r_sec_phy_valid = 0x40001a74;
r_sub24 = 0x40001a78; r_sub24 = 0x40001a78;
r_swap_buf = 0x40001a7c; r_swap_buf = 0x40001a7c;
r_swap_in_place = 0x40001a80; r_swap_in_place = 0x40001a80;
*/
/* Data (.data, .bss, .rodata) */ /* Data (.data, .bss, .rodata) */
/*
ble_hci_uart_reset_cmd = 0x3ff1ffe0; ble_hci_uart_reset_cmd = 0x3ff1ffe0;
ble_hci_trans_env_p = 0x3fcdffc4; ble_hci_trans_env_p = 0x3fcdffc4;
ble_hci_trans_mode = 0x3fcdfebc; ble_hci_trans_mode = 0x3fcdfebc;
@@ -1673,7 +1676,7 @@ sync_dynamic_param_rom = 0x3ff1fbe4;
g_ble_plf_log_level = 0x3fcdfe60; g_ble_plf_log_level = 0x3fcdfe60;
g_msys_pool_list = 0x3fcdfe58; g_msys_pool_list = 0x3fcdfe58;
g_os_mempool_list = 0x3fcdfe50; g_os_mempool_list = 0x3fcdfe50;
*/
/*************************************** /***************************************
Group rom_phy Group rom_phy