From 5115e3117575f2eca77c68815377c8a3c43fc168 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Fri, 8 Jul 2022 17:09:16 +0800 Subject: [PATCH] driver: Minor update for esp32c6 Leave TODO for esp_adc and legacy adc driver HAL/SOC update for spi and i2s --- .../deprecated/driver/adc_types_legacy.h | 4 +-- components/esp_adc/CMakeLists.txt | 9 ++++++ .../esp32c6/include/adc_cali_schemes.h | 15 ++++++++++ components/hal/esp32c6/include/hal/i2s_ll.h | 28 +++++++++---------- components/hal/esp32c6/include/hal/timer_ll.h | 3 -- .../esp32c6/include/soc/Kconfig.soc_caps.in | 8 +++--- .../soc/esp32c6/include/soc/clk_tree_defs.h | 2 ++ components/soc/esp32c6/include/soc/soc_caps.h | 2 +- components/soc/esp32c6/spi_periph.c | 2 +- 9 files changed, 48 insertions(+), 25 deletions(-) create mode 100644 components/esp_adc/esp32c6/include/adc_cali_schemes.h diff --git a/components/driver/deprecated/driver/adc_types_legacy.h b/components/driver/deprecated/driver/adc_types_legacy.h index ec2a9fa1e3..8336bff9ba 100644 --- a/components/driver/deprecated/driver/adc_types_legacy.h +++ b/components/driver/deprecated/driver/adc_types_legacy.h @@ -61,7 +61,7 @@ typedef enum { ADC1_CHANNEL_9, /*!< ADC1 channel 9 is GPIO10 */ ADC1_CHANNEL_MAX, } adc1_channel_t; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6 // TODO: IDF-5310 typedef enum { ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */ ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO1 */ @@ -86,7 +86,7 @@ typedef enum { ADC2_CHANNEL_9, /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */ ADC2_CHANNEL_MAX, } adc2_channel_t; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6 // TODO: IDF-5310 typedef enum { ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */ ADC2_CHANNEL_MAX, diff --git a/components/esp_adc/CMakeLists.txt b/components/esp_adc/CMakeLists.txt index 35d5a68737..b52dffa1d0 100644 --- a/components/esp_adc/CMakeLists.txt +++ b/components/esp_adc/CMakeLists.txt @@ -27,6 +27,15 @@ if(EXISTS "${CMAKE_CURRENT_SOURCE_DIR}/deprecated/${target}/esp_adc_cal_legacy.c list(APPEND srcs "deprecated/${target}/esp_adc_cal_legacy.c") endif() +# ESP32C6-TODO +if(CONFIG_IDF_TARGET_ESP32C6) + list(REMOVE_ITEM srcs + "adc_cali_curve_fitting.c" # TODO: IDF-5312 + "adc_oneshot.c" # TODO: IDF-5310 + "adc_common.c" + ) +endif() + idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${includes} PRIV_REQUIRES driver efuse diff --git a/components/esp_adc/esp32c6/include/adc_cali_schemes.h b/components/esp_adc/esp32c6/include/adc_cali_schemes.h new file mode 100644 index 0000000000..cfdd5ad0d5 --- /dev/null +++ b/components/esp_adc/esp32c6/include/adc_cali_schemes.h @@ -0,0 +1,15 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file adc_cali_schemes.h + * + * @brief Supported calibration schemes + */ + +//Now no scheme supported diff --git a/components/hal/esp32c6/include/hal/i2s_ll.h b/components/hal/esp32c6/include/hal/i2s_ll.h index 0d8786eae4..aac0bcbddd 100644 --- a/components/hal/esp32c6/include/hal/i2s_ll.h +++ b/components/hal/esp32c6/include/hal/i2s_ll.h @@ -48,7 +48,7 @@ typedef struct { static inline void i2s_ll_enable_clock(i2s_dev_t *hw) { // The clock gate enabling is moved to `periph_module_enable` - (void *)hw; + (void)hw; } /** @@ -59,7 +59,7 @@ static inline void i2s_ll_enable_clock(i2s_dev_t *hw) static inline void i2s_ll_disable_clock(i2s_dev_t *hw) { // The clock gate disabling is moved to `periph_module_disable` - (void *)hw; + (void)hw; } /** @@ -69,7 +69,7 @@ static inline void i2s_ll_disable_clock(i2s_dev_t *hw) */ static inline void i2s_ll_tx_enable_clock(i2s_dev_t *hw) { - (void *)hw; + (void)hw; PCR.i2s_tx_clkm_conf.i2s_tx_clkm_en = 1; } @@ -80,7 +80,7 @@ static inline void i2s_ll_tx_enable_clock(i2s_dev_t *hw) */ static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw) { - (void *)hw; + (void)hw; PCR.i2s_rx_clkm_conf.i2s_rx_clkm_en = 1; } @@ -91,7 +91,7 @@ static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw) */ static inline void i2s_ll_tx_disable_clock(i2s_dev_t *hw) { - (void *)hw; + (void)hw; PCR.i2s_tx_clkm_conf.i2s_tx_clkm_en = 0; } @@ -102,7 +102,7 @@ static inline void i2s_ll_tx_disable_clock(i2s_dev_t *hw) */ static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw) { - (void *)hw; + (void)hw; PCR.i2s_rx_clkm_conf.i2s_rx_clkm_en = 0; } @@ -113,7 +113,7 @@ static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw) */ static inline void i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw) { - (void *)hw; + (void)hw; PCR.i2s_rx_clkm_conf.i2s_mclk_sel = 0; } @@ -124,7 +124,7 @@ static inline void i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw) */ static inline void i2s_ll_mclk_bind_to_rx_clk(i2s_dev_t *hw) { - (void *)hw; + (void)hw; PCR.i2s_rx_clkm_conf.i2s_mclk_sel = 1; } @@ -202,7 +202,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) */ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { - (void *)hw; + (void)hw; switch (src) { case I2S_CLK_SRC_XTAL: @@ -225,7 +225,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) */ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { - (void *)hw; + (void)hw; switch (src) { case I2S_CLK_SRC_XTAL: @@ -262,7 +262,7 @@ static inline void i2s_ll_tx_set_bck_div_num(i2s_dev_t *hw, uint32_t val) */ static inline void i2s_ll_tx_set_raw_clk_div(i2s_dev_t *hw, uint32_t x, uint32_t y, uint32_t z, uint32_t yn1) { - (void *)hw; + (void)hw; PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_x = x; PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_y = y; PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_z = z; @@ -280,7 +280,7 @@ static inline void i2s_ll_tx_set_raw_clk_div(i2s_dev_t *hw, uint32_t x, uint32_t */ static inline void i2s_ll_rx_set_raw_clk_div(i2s_dev_t *hw, uint32_t x, uint32_t y, uint32_t z, uint32_t yn1) { - (void *)hw; + (void)hw; PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_x = x; PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_y = y; PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_z = z; @@ -297,7 +297,7 @@ static inline void i2s_ll_rx_set_raw_clk_div(i2s_dev_t *hw, uint32_t x, uint32_t */ static inline void i2s_ll_tx_set_mclk(i2s_dev_t *hw, uint32_t sclk, uint32_t mclk, uint32_t mclk_div) { - (void *)hw; + (void)hw; int ma = 0; int mb = 0; int denominator = 1; @@ -372,7 +372,7 @@ static inline void i2s_ll_rx_set_bck_div_num(i2s_dev_t *hw, uint32_t val) */ static inline void i2s_ll_rx_set_mclk(i2s_dev_t *hw, uint32_t sclk, uint32_t mclk, uint32_t mclk_div) { - (void *)hw; + (void)hw; int ma = 0; int mb = 0; int denominator = 1; diff --git a/components/hal/esp32c6/include/hal/timer_ll.h b/components/hal/esp32c6/include/hal/timer_ll.h index 1b4eb005b7..96c5490a57 100644 --- a/components/hal/esp32c6/include/hal/timer_ll.h +++ b/components/hal/esp32c6/include/hal/timer_ll.h @@ -41,9 +41,6 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, case GPTIMER_CLK_SRC_APB: clk_id = 1; break; - case GPTIMER_CLK_SRC_RC_FAST: - clk_id = 2; - break; default: HAL_ASSERT(false); break; diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index af30553da9..35b5fd7c98 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -183,10 +183,6 @@ config SOC_CPU_HAS_FLEXIBLE_INTC bool default y -config SOC_RV32A_SUPPORTED - bool - default y - config SOC_INT_PLIC_SUPPORTED bool default y @@ -495,6 +491,10 @@ config SOC_SPI_PERIPH_NUM int default 2 +config SOC_SPI_MAX_CS_NUM + int + default 6 + config SOC_SPI_MAXIMUM_BUFFER_SIZE int default 64 diff --git a/components/soc/esp32c6/include/soc/clk_tree_defs.h b/components/soc/esp32c6/include/soc/clk_tree_defs.h index 220706dc38..1343a8cddd 100644 --- a/components/soc/esp32c6/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c6/include/soc/clk_tree_defs.h @@ -5,6 +5,8 @@ */ #pragma once +#include "sdkconfig.h" // TODO: IDF-5973 + #ifdef __cplusplus extern "C" { #endif diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 53de8f529a..f13f0044a6 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -112,7 +112,6 @@ #define SOC_CPU_CORES_NUM (1U) #define SOC_CPU_INTR_NUM 32 #define SOC_CPU_HAS_FLEXIBLE_INTC 1 -#define SOC_RV32A_SUPPORTED 1 #define SOC_INT_PLIC_SUPPORTED 1 //riscv platform-level interrupt controller #define SOC_CPU_BREAKPOINTS_NUM 4 @@ -276,6 +275,7 @@ /*-------------------------- SPI CAPS ----------------------------------------*/ #define SOC_SPI_PERIPH_NUM 2 #define SOC_SPI_PERIPH_CS_NUM(i) 6 +#define SOC_SPI_MAX_CS_NUM 6 #define SOC_SPI_MAXIMUM_BUFFER_SIZE 64 diff --git a/components/soc/esp32c6/spi_periph.c b/components/soc/esp32c6/spi_periph.c index c4f4b08e40..2f292bfdeb 100644 --- a/components/soc/esp32c6/spi_periph.c +++ b/components/soc/esp32c6/spi_periph.c @@ -36,7 +36,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = { .spiq_in = FSPIQ_IN_IDX, .spiwp_in = FSPIWP_IN_IDX, .spihd_in = FSPIHD_IN_IDX, - .spics_out = {FSPICS0_OUT_IDX}, + .spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX}, .spics_in = FSPICS0_IN_IDX, .spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK, .spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,