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Merge branch 'bugfix/ensure_rmii_clock_before_phy_reset' into 'release/v3.3'

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ethernet: ensure RMII clock before PHY reset

See merge request espressif/esp-idf!13714
This commit is contained in:
David Čermák
2021-05-31 06:53:37 +00:00
parent 6aaddf972c fc60e09295
commit 5198a7a46b
1 changed files with 6 additions and 6 deletions
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12
components/ethernet/emac_main.c
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@@ -1109,8 +1109,6 @@ esp_err_t esp_eth_init_internal(eth_config_t *config)
goto _verify_err; goto _verify_err;
} }
emac_config.emac_phy_power_enable(true);
//before set emac reg must enable clk //before set emac reg must enable clk
periph_module_enable(PERIPH_EMAC_MODULE); periph_module_enable(PERIPH_EMAC_MODULE);
@@ -1145,10 +1143,6 @@ esp_err_t esp_eth_init_internal(eth_config_t *config)
} }
} }
emac_enable_clk(true);
REG_SET_FIELD(EMAC_EX_PHYINF_CONF_REG, EMAC_EX_PHY_INTF_SEL, EMAC_EX_PHY_INTF_RMII);
emac_dma_init();
if (emac_config.clock_mode == ETH_CLOCK_GPIO0_IN) { if (emac_config.clock_mode == ETH_CLOCK_GPIO0_IN) {
// external clock on GPIO0 // external clock on GPIO0
REG_SET_BIT(EMAC_EX_CLK_CTRL_REG, EMAC_EX_EXT_OSC_EN); REG_SET_BIT(EMAC_EX_CLK_CTRL_REG, EMAC_EX_EXT_OSC_EN);
@@ -1166,6 +1160,12 @@ esp_err_t esp_eth_init_internal(eth_config_t *config)
REG_CLR_BIT(EMAC_EX_OSCCLK_CONF_REG, EMAC_EX_OSC_CLK_SEL); REG_CLR_BIT(EMAC_EX_OSCCLK_CONF_REG, EMAC_EX_OSC_CLK_SEL);
} }
emac_config.emac_phy_power_enable(true);
emac_enable_clk(true);
REG_SET_FIELD(EMAC_EX_PHYINF_CONF_REG, EMAC_EX_PHY_INTF_SEL, EMAC_EX_PHY_INTF_RMII);
emac_dma_init();
emac_config.emac_gpio_config(); emac_config.emac_gpio_config();
emac_hw_init(); emac_hw_init();