From f23c9d94ae8dc89d9d978a56f63955ecc53dd916 Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Mon, 12 Apr 2021 18:49:17 +1000 Subject: [PATCH] bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip Closes https://github.com/espressif/esp-idf/issues/6191 --- .../bootloader_support/src/bootloader_flash_config_esp32.c | 2 +- components/soc/soc/esp32/include/soc/efuse_reg.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32.c b/components/bootloader_support/src/bootloader_flash_config_esp32.c index 3877fea235..c715379245 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32.c @@ -178,9 +178,9 @@ int bootloader_flash_get_wp_pin(void) uint8_t chip_ver; uint32_t pkg_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG); switch(pkg_ver) { + case EFUSE_RD_CHIP_VER_PKG_ESP32U4WDH: case EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5: return ESP32_D2WD_WP_GPIO; - case EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2: case EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4: /* Same package IDs are used for ESP32-PICO-V3 and ESP32-PICO-D4, silicon version differentiates */ chip_ver = bootloader_common_get_chip_revision(); diff --git a/components/soc/soc/esp32/include/soc/efuse_reg.h b/components/soc/soc/esp32/include/soc/efuse_reg.h index 8aa78999b3..b82ac9e981 100644 --- a/components/soc/soc/esp32/include/soc/efuse_reg.h +++ b/components/soc/soc/esp32/include/soc/efuse_reg.h @@ -112,7 +112,8 @@ #define EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ6 0 #define EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ5 1 #define EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 2 -#define EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 4 +#define EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 4 /* Deprecated: this chip was never mass produced */ +#define EFUSE_RD_CHIP_VER_PKG_ESP32U4WDH 4 #define EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 5 #define EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302 6 /* EFUSE_RD_SPI_PAD_CONFIG_HD : RO ;bitpos:[8:4] ;default: 5'b0 ; */