Merge branch 'bugfix/spiram_80m_clk_config' into 'master'

clk: fix regression in clock setting for SPIRAM with 80MHz config

See merge request idf/esp-idf!3724

.gitlab-ci.yml

@@ -1347,6 +1347,20 @@ UT_004_13:
     - UT_T1_1
     - psram
 
+UT_004_14:
+  <<: *unit_test_template
+  tags:
+    - ESP32_IDF
+    - UT_T1_1
+    - psram
+
+UT_004_15:
+  <<: *unit_test_template
+  tags:
+    - ESP32_IDF
+    - UT_T1_1
+    - psram
+
 UT_005_01:
   <<: *unit_test_template
   tags:

components/esp32/clk.c

@@ -297,10 +297,10 @@ void esp_perip_clk_init(void)
 //a weird mode where clock to the peripheral is disabled but reset is also disabled, it 'hangs'
 //in a state where it outputs a continuous 80MHz signal. Mask its bit here because we should
 //not modify that state, regardless of what we calculated earlier.
-    if (!spicommon_periph_in_use(HSPI_HOST)) {
+    if (spicommon_periph_in_use(HSPI_HOST)) {
         common_perip_clk &= ~DPORT_SPI2_CLK_EN;
     }
-    if (!spicommon_periph_in_use(VSPI_HOST)) {
+    if (spicommon_periph_in_use(VSPI_HOST)) {
         common_perip_clk &= ~DPORT_SPI3_CLK_EN;
     }
 #endif

components/esp32/test/test_spiram_cache_flush.c

@@ -24,11 +24,15 @@ This code tests the interaction between PSRAM and SPI flash routines.
 #include "esp_partition.h"
 #include "test_utils.h"
 
+#if CONFIG_SPIRAM_SUPPORT
 
-#if CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MEMMAP
+#if CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC
+#define USE_CAPS_ALLOC 1
+#endif // CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC
 
 #define TSTSZ (16*1024)
 
+#if !CONFIG_FREERTOS_UNICORE
 
 volatile static int res[2], err[2];
 
@@ -51,11 +55,11 @@ void tstMem(void *arg) {
 }
 
 
-TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
+TEST_CASE("Spiram cache flush on mmap", "[spiram]")
 {
     void *mem[2];
     res[0]=0; res[1]=0;
-#if CONFIG_SPIRAM_USE_CAPS_ALLOC
+#if USE_CAPS_ALLOC
     printf("Allocating SPI RAM chunk...\n");
     mem[0]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
     mem[1]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
@@ -71,7 +75,6 @@ TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
     xTaskCreatePinnedToCore(tstMem  , "tskone"  , 2048, mem[0], 3, &th[0], 0);
     xTaskCreatePinnedToCore(tstMem  , "tsktwo"  , 2048, mem[1], 3, &th[1], 1);
 
-    const esp_partition_t* part = get_test_data_partition();
     for (int l=0; l<10; l++) {
         for (int p=0; p<4096*1024; p+=65536) {
             const void *out;
@@ -79,14 +82,13 @@ TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
             spi_flash_mmap(p, 65536, SPI_FLASH_MMAP_DATA, &out, &h);
             spi_flash_munmap(h);
         }
-        printf("%d/10\n", l);
     }
 
     printf("Checked memory %d and %d times. Errors: %d and %d\n", res[0], res[1], err[0], err[1]);
 
     vTaskDelete(th[0]);
     vTaskDelete(th[1]);
-#if CONFIG_SPIRAM_USE_CAPS_ALLOC
+#if USE_CAPS_ALLOC
     free(mem[0]);
     free(mem[1]);
 #endif
@@ -97,11 +99,11 @@ TEST_CASE("Spiram cache flush on mmap", "[spiram][ignore]")
 
 #define CYCLES 1024
 
-TEST_CASE("Spiram cache flush on write/read", "[spiram][ignore]")
+TEST_CASE("Spiram cache flush on write/read", "[spiram]")
 {
     void *mem[2];
     res[0]=0; res[1]=0;
-#if CONFIG_SPIRAM_USE_CAPS_ALLOC
+#if USE_CAPS_ALLOC
     printf("Allocating SPI RAM chunk...\n");
     mem[0]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
     mem[1]=heap_caps_malloc(TSTSZ, MALLOC_CAP_SPIRAM);
@@ -127,7 +129,6 @@ TEST_CASE("Spiram cache flush on write/read", "[spiram][ignore]")
     spi_flash_mmap_handle_t handle;
     esp_partition_mmap(part, 0, 512, SPI_FLASH_MMAP_DATA, &out, &handle);
     for (int i=0; i<CYCLES; i++) {
-        printf("%d/%d\n", i, CYCLES);
         esp_partition_write(part, 0, buf, 512);
         esp_partition_read(part, 0, buf, 512);
         vTaskDelay(1);
@@ -138,15 +139,16 @@ TEST_CASE("Spiram cache flush on write/read", "[spiram][ignore]")
 
     vTaskDelete(th[0]);
     vTaskDelete(th[1]);
-#if CONFIG_SPIRAM_USE_CAPS_ALLOC
+#if USE_CAPS_ALLOC
     free(mem[0]);
     free(mem[1]);
 #endif
 }
+#endif // !CONFIG_FREERTOS_UNICORE
 
-IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram][ignore]") {
+IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram]") {
     char *mem1=malloc(0x10000);
-#if CONFIG_SPIRAM_USE_CAPS_ALLOC
+#if USE_CAPS_ALLOC
     char *mem2=heap_caps_malloc(0x10000, MALLOC_CAP_SPIRAM);
 #else
     char *mem2=(void*)0x3f800000;
@@ -173,11 +175,11 @@ IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram][ignore]") {
             }
         }
     }
+
+    free(mem1);
+#if USE_CAPS_ALLOC
+    free(mem2);
+#endif
 }
 
-
+#endif // CONFIG_SPIRAM_SUPPORT
-#endif  //CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MEMMAP
-
-
-
-

tools/unit-test-app/configs/psram

@@ -1,3 +1,2 @@
 TEST_EXCLUDE_COMPONENTS=libsodium bt app_update driver esp32 spi_flash
 CONFIG_SPIRAM_SUPPORT=y
-CONFIG_SPIRAM_BANKSWITCH_ENABLE=n

tools/unit-test-app/configs/psram_2

@@ -1,3 +1,2 @@
 TEST_COMPONENTS=driver esp32 spi_flash
 CONFIG_SPIRAM_SUPPORT=y
-CONFIG_SPIRAM_BANKSWITCH_ENABLE=n

tools/unit-test-app/sdkconfig.defaults

@@ -27,4 +27,5 @@ CONFIG_SUPPORT_STATIC_ALLOCATION=y
 CONFIG_ESP_TIMER_PROFILING=y
 CONFIG_ADC2_DISABLE_DAC=n
 CONFIG_WARN_WRITE_STRINGS=y
-CONFIG_SPI_MASTER_IN_IRAM=y
+CONFIG_SPI_MASTER_IN_IRAM=y
+CONFIG_SPIRAM_BANKSWITCH_ENABLE=n