From 5e15adfae9603187162b563ad6f803f993f3fa98 Mon Sep 17 00:00:00 2001 From: "harshal.patil" Date: Mon, 5 May 2025 10:49:04 +0530 Subject: [PATCH] fix(esp_psram): Add XIP PSRAM alignment gaps in heap only if PSRAM protection is enabled --- components/esp_psram/esp_psram.c | 5 +++++ components/esp_system/ld/esp32p4/sections.ld.in | 16 ++++++++++------ 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/components/esp_psram/esp_psram.c b/components/esp_psram/esp_psram.c index 7a1a7948e5..3a55c8da28 100644 --- a/components/esp_psram/esp_psram.c +++ b/components/esp_psram/esp_psram.c @@ -411,6 +411,9 @@ esp_err_t esp_psram_extram_add_to_heap_allocator(void) ESP_EARLY_LOGI(TAG, "Adding pool of %dK of PSRAM memory to heap allocator", (s_psram_ctx.regions_to_heap[PSRAM_MEM_8BIT_ALIGNED].size + s_psram_ctx.regions_to_heap[PSRAM_MEM_32BIT_ALIGNED].size) / 1024); + // To allow using the page alignment gaps created while mapping the flash segments, + // the alignment gaps must be configured with correct memory protection configurations. +#if CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION // Here, SOC_MMU_DI_VADDR_SHARED is necessary because, for the targets that have separate data and instruction virtual address spaces, // the SPIRAM gap created due to the alignment needed while placing the instruction segment in the instruction virtual address space // cannot be added in heap because the region cannot be configured with write permissions. @@ -436,6 +439,8 @@ esp_err_t esp_psram_extram_add_to_heap_allocator(void) } } #endif /* CONFIG_SPIRAM_RODATA */ +#endif /* CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION */ + return ESP_OK; } diff --git a/components/esp_system/ld/esp32p4/sections.ld.in b/components/esp_system/ld/esp32p4/sections.ld.in index 9a9bbc437c..79962be575 100644 --- a/components/esp_system/ld/esp32p4/sections.ld.in +++ b/components/esp_system/ld/esp32p4/sections.ld.in @@ -295,10 +295,12 @@ SECTIONS */ . += _esp_flash_mmap_prefetch_pad_size; -#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS - /* Align the end of flash text region as per PMP granularity */ +#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION + /* Align the end of flash text region as per PMP granularity to allow using the + * page alignment gap created while mapping the flash region into the PSRAM memory. + */ . = ALIGN(_esp_pmp_align_size); -#endif // CONFIG_SPIRAM_FETCH_INSTRUCTIONS +#endif // CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION _text_end = ABSOLUTE(.); /** @@ -450,10 +452,12 @@ SECTIONS . = ALIGN(ALIGNOF(.flash.tbss)); -#if CONFIG_SPIRAM_RODATA - /* Align the end of flash rodata region as per PMP granularity */ +#if CONFIG_SPIRAM_RODATA && CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION + /* Align the end of flash rodata region as per PMP granularity to allow using the + * page alignment gap created while mapping the flash region into the PSRAM memory. + */ . = ALIGN(_esp_pmp_align_size); -#endif // CONFIG_SPIRAM_RODATA +#endif // CONFIG_SPIRAM_RODATA && CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION _thread_local_data_end = ABSOLUTE(.); } > rodata_seg_low