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fix(pmu): enable all func clock icg during retention

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This should only increase a tiny amount of the power consumption in the retention process,
but save debug time since some module register read/write relies not only APB but also func clock.
This commit is contained in:
Song Ruo Jing
2024-10-16 19:27:59 +08:00
committed by wuzhenghui
parent 7147d7b366
commit 5ed33be402
9 changed files with 23 additions and 138 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
components/esp_hw_support/port/esp32c5/pmu_param.c
View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -285,17 +285,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2active_backup_en = 0, \ .hp_sleep2active_backup_en = 0, \
.hp_modem2active_backup_en = 0, \ .hp_modem2active_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_TG0) | \
BIT(PMU_ICG_FUNC_ENA_TG1) | \
BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
BIT(PMU_ICG_FUNC_ENA_MSPI) | \
BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
BIT(PMU_ICG_FUNC_ENA_SPI2) | \
BIT(PMU_ICG_FUNC_ENA_UART0) | \
BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
) \
} }
#define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \
@@ -307,17 +297,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
.hp_sleep2modem_backup_en = 0, \ .hp_sleep2modem_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_TG0) | \
BIT(PMU_ICG_FUNC_ENA_TG1) | \
BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
BIT(PMU_ICG_FUNC_ENA_MSPI) | \
BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
BIT(PMU_ICG_FUNC_ENA_SPI2) | \
BIT(PMU_ICG_FUNC_ENA_UART0) | \
BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
) \
} }
#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
@@ -334,17 +314,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_modem2sleep_backup_en = 0, \ .hp_modem2sleep_backup_en = 0, \
.hp_active2sleep_backup_en = 0, \ .hp_active2sleep_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_TG0) | \
BIT(PMU_ICG_FUNC_ENA_TG1) | \
BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
BIT(PMU_ICG_FUNC_ENA_MSPI) | \
BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
BIT(PMU_ICG_FUNC_ENA_SPI2) | \
BIT(PMU_ICG_FUNC_ENA_UART0) | \
BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
) \
} }
const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode) const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)

8
components/esp_hw_support/port/esp32c5/private_include/pmu_param.h
View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -84,7 +84,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
typedef struct { typedef struct {
pmu_hp_backup_reg_t retention; pmu_hp_backup_reg_t retention;
uint32_t backup_clk; uint32_t backup_clk; // icg_func
} pmu_hp_system_retention_param_t; } pmu_hp_system_retention_param_t;
const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode); const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);
@@ -412,7 +412,7 @@ typedef struct {
typedef struct pmu_sleep_machine_constant { typedef struct pmu_sleep_machine_constant {
struct { struct {
uint16_t min_slp_time_us; /* Mininum sleep protection time (unit: microsecond) */ uint16_t min_slp_time_us; /* Minimum sleep protection time (unit: microsecond) */
uint8_t wakeup_wait_cycle; /* Modem wakeup signal (WiFi MAC and BEACON wakeup) waits for the slow & fast clock domain synchronization and the wakeup signal triggers the PMU FSM switching wait cycle (unit: slow clock cycle) */ uint8_t wakeup_wait_cycle; /* Modem wakeup signal (WiFi MAC and BEACON wakeup) waits for the slow & fast clock domain synchronization and the wakeup signal triggers the PMU FSM switching wait cycle (unit: slow clock cycle) */
uint8_t reserved0; uint8_t reserved0;
uint16_t reserved1; uint16_t reserved1;
@@ -424,7 +424,7 @@ typedef struct pmu_sleep_machine_constant {
uint16_t power_up_wait_time_us; /* (unit: microsecond) */ uint16_t power_up_wait_time_us; /* (unit: microsecond) */
} lp; } lp;
struct { struct {
uint16_t min_slp_time_us; /* Mininum sleep protection time (unit: microsecond) */ uint16_t min_slp_time_us; /* Minimum sleep protection time (unit: microsecond) */
uint16_t clock_domain_sync_time_us; /* The Slow OSC clock domain synchronizes time with the Fast OSC domain, at least 4 slow clock cycles (unit: microsecond) */ uint16_t clock_domain_sync_time_us; /* The Slow OSC clock domain synchronizes time with the Fast OSC domain, at least 4 slow clock cycles (unit: microsecond) */
uint16_t system_dfs_up_work_time_us; /* System DFS up scaling work time (unit: microsecond) */ uint16_t system_dfs_up_work_time_us; /* System DFS up scaling work time (unit: microsecond) */
uint16_t analog_wait_time_us; /* HP LDO power up wait time (unit: microsecond) */ uint16_t analog_wait_time_us; /* HP LDO power up wait time (unit: microsecond) */

40
components/esp_hw_support/port/esp32c6/pmu_param.c
View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -290,18 +290,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2active_backup_en = 0, \ .hp_sleep2active_backup_en = 0, \
.hp_modem2active_backup_en = 0, \ .hp_modem2active_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_GDMA) | \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_TG0) | \
BIT(PMU_ICG_FUNC_ENA_TG1) | \
BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
BIT(PMU_ICG_FUNC_ENA_MSPI) | \
BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
BIT(PMU_ICG_FUNC_ENA_SPI2) | \
BIT(PMU_ICG_FUNC_ENA_UART0) | \
BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
) \
} }
#define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \
@@ -313,17 +302,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
.hp_sleep2modem_backup_en = 0, \ .hp_sleep2modem_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_TG0) | \
BIT(PMU_ICG_FUNC_ENA_TG1) | \
BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
BIT(PMU_ICG_FUNC_ENA_MSPI) | \
BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
BIT(PMU_ICG_FUNC_ENA_SPI2) | \
BIT(PMU_ICG_FUNC_ENA_UART0) | \
BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
) \
} }
#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
@@ -340,18 +319,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_modem2sleep_backup_en = 0, \ .hp_modem2sleep_backup_en = 0, \
.hp_active2sleep_backup_en = 0, \ .hp_active2sleep_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_GDMA) | \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_TG0) | \
BIT(PMU_ICG_FUNC_ENA_TG1) | \
BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
BIT(PMU_ICG_FUNC_ENA_MSPI) | \
BIT(PMU_ICG_FUNC_ENA_IOMUX) | \
BIT(PMU_ICG_FUNC_ENA_SPI2) | \
BIT(PMU_ICG_FUNC_ENA_UART0) | \
BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
) \
} }
const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode) const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)

2
components/esp_hw_support/port/esp32c6/private_include/pmu_param.h
View File

@@ -92,7 +92,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
typedef struct { typedef struct {
pmu_hp_backup_reg_t retention; pmu_hp_backup_reg_t retention;
uint32_t backup_clk; uint32_t backup_clk; // icg_func
} pmu_hp_system_retention_param_t; } pmu_hp_system_retention_param_t;
const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode); const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);

2
components/esp_hw_support/port/esp32c61/private_include/pmu_param.h
View File

@@ -93,7 +93,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
typedef struct { typedef struct {
pmu_hp_backup_reg_t retention; pmu_hp_backup_reg_t retention;
uint32_t backup_clk; uint32_t backup_clk; // icg_func
} pmu_hp_system_retention_param_t; } pmu_hp_system_retention_param_t;
const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode); const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);

39
components/esp_hw_support/port/esp32h2/pmu_param.c
View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -290,18 +290,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2active_backup_en = 0, \ .hp_sleep2active_backup_en = 0, \
.hp_modem2active_backup_en = 0, \ .hp_modem2active_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_GDMA) \
| BIT(PMU_ICG_FUNC_ENA_REGDMA) \
| BIT(PMU_ICG_FUNC_ENA_TG0) \
| BIT(PMU_ICG_FUNC_ENA_HPBUS) \
| BIT(PMU_ICG_FUNC_ENA_MSPI) \
| BIT(PMU_ICG_FUNC_ENA_IOMUX) \
| BIT(PMU_ICG_FUNC_ENA_SPI2) \
| BIT(PMU_ICG_FUNC_ENA_SEC) \
| BIT(PMU_ICG_FUNC_ENA_PWM) \
| BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
| BIT(PMU_ICG_FUNC_ENA_UART0)), \
} }
#define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_MODEM_RETENTION_CONFIG_DEFAULT() { \
@@ -313,16 +302,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
.hp_sleep2modem_backup_en = 0, \ .hp_sleep2modem_backup_en = 0, \
}, \ }, \
.backup_clk = (BIT(PMU_ICG_FUNC_ENA_REGDMA) \ .backup_clk = 0xffffffff, \
| BIT(PMU_ICG_FUNC_ENA_TG0) \
| BIT(PMU_ICG_FUNC_ENA_HPBUS) \
| BIT(PMU_ICG_FUNC_ENA_MSPI) \
| BIT(PMU_ICG_FUNC_ENA_IOMUX) \
| BIT(PMU_ICG_FUNC_ENA_SPI2) \
| BIT(PMU_ICG_FUNC_ENA_SEC) \
| BIT(PMU_ICG_FUNC_ENA_PWM) \
| BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
| BIT(PMU_ICG_FUNC_ENA_UART0)), \
} }
#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
@@ -339,18 +319,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_modem2sleep_backup_en = 0, \ .hp_modem2sleep_backup_en = 0, \
.hp_active2sleep_backup_en = 0, \ .hp_active2sleep_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_GDMA) \
| BIT(PMU_ICG_FUNC_ENA_REGDMA) \
| BIT(PMU_ICG_FUNC_ENA_TG0) \
| BIT(PMU_ICG_FUNC_ENA_HPBUS) \
| BIT(PMU_ICG_FUNC_ENA_MSPI) \
| BIT(PMU_ICG_FUNC_ENA_IOMUX) \
| BIT(PMU_ICG_FUNC_ENA_SPI2) \
| BIT(PMU_ICG_FUNC_ENA_SEC) \
| BIT(PMU_ICG_FUNC_ENA_PWM) \
| BIT(PMU_ICG_FUNC_ENA_SYSTIMER) \
| BIT(PMU_ICG_FUNC_ENA_UART0)), \
} }
const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode) const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)

2
components/esp_hw_support/port/esp32h2/private_include/pmu_param.h
View File

@@ -85,7 +85,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
typedef struct { typedef struct {
pmu_hp_backup_reg_t retention; pmu_hp_backup_reg_t retention;
uint32_t backup_clk; uint32_t backup_clk; // icg_func
} pmu_hp_system_retention_param_t; } pmu_hp_system_retention_param_t;
const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode); const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);

28
components/esp_hw_support/port/esp32p4/pmu_param.c
View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -207,18 +207,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2active_backup_en = 0, \ .hp_sleep2active_backup_en = 0, \
.hp_modem2active_backup_en = 0, \ .hp_modem2active_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_L2MEM_MEM) | \
BIT(PMU_ICG_FUNC_ENA_L2MEM_SYS) | \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_HP_CLKRST) | \
BIT(PMU_ICG_FUNC_ENA_SYSREG_APB) | \
BIT(PMU_ICG_FUNC_ENA_ICM_CPU) | \
BIT(PMU_ICG_FUNC_ENA_ICM_APB) | \
BIT(PMU_ICG_FUNC_ENA_ICM_SYS) | \
BIT(PMU_ICG_FUNC_ENA_ICM_MEM) | \
BIT(PMU_ICG_FUNC_ENA_INTRMTX_APB) \
) \
} }
#define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_SLEEP_RETENTION_CONFIG_DEFAULT() { \
@@ -235,18 +224,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_modem2sleep_backup_en = 0, \ .hp_modem2sleep_backup_en = 0, \
.hp_active2sleep_backup_en = 0, \ .hp_active2sleep_backup_en = 0, \
}, \ }, \
.backup_clk = ( \ .backup_clk = 0xffffffff, \
BIT(PMU_ICG_FUNC_ENA_L2MEM_MEM) | \
BIT(PMU_ICG_FUNC_ENA_L2MEM_SYS) | \
BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
BIT(PMU_ICG_FUNC_ENA_HP_CLKRST) | \
BIT(PMU_ICG_FUNC_ENA_SYSREG_APB) | \
BIT(PMU_ICG_FUNC_ENA_ICM_CPU) | \
BIT(PMU_ICG_FUNC_ENA_ICM_APB) | \
BIT(PMU_ICG_FUNC_ENA_ICM_SYS) | \
BIT(PMU_ICG_FUNC_ENA_ICM_MEM) | \
BIT(PMU_ICG_FUNC_ENA_INTRMTX_APB) \
) \
} }
const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode) const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pmu_hp_mode_t mode)

2
components/esp_hw_support/port/esp32p4/private_include/pmu_param.h
View File

@@ -86,7 +86,7 @@ const pmu_hp_system_analog_param_t* pmu_hp_system_analog_param_default(pmu_hp_mo
typedef struct { typedef struct {
pmu_hp_backup_reg_t retention; pmu_hp_backup_reg_t retention;
uint32_t backup_clk; uint32_t backup_clk; // icg_func
} pmu_hp_system_retention_param_t; } pmu_hp_system_retention_param_t;
const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode); const pmu_hp_system_retention_param_t* pmu_hp_system_retention_param_default(pmu_hp_mode_t mode);