diff --git a/components/driver/include/driver/mcpwm.h b/components/driver/include/driver/mcpwm.h
index 74a7aede8e..d79541cc0f 100644
--- a/components/driver/include/driver/mcpwm.h
+++ b/components/driver/include/driver/mcpwm.h
@@ -179,14 +179,14 @@ typedef enum {
  */
 typedef enum {
     MCPWM_DEADTIME_BYPASS = 0,          /*!<Bypass the deadtime*/
-    MCPWM_BYPASS_RED,                   /*!<MCPWMXA = no change, MCPWMXB = falling edge delay*/
-    MCPWM_BYPASS_FED,                   /*!<MCPWMXA = rising edge delay, MCPWMXB = no change*/
-    MCPWM_ACTIVE_HIGH_MODE,             /*!<MCPWMXA = rising edge delay,  MCPWMXB = falling edge delay*/
-    MCPWM_ACTIVE_LOW_MODE,              /*!<MCPWMXA = compliment of rising edge delay,  MCPWMXB = compliment of falling edge delay*/
-    MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE,  /*!<MCPWMXA = rising edge delay,  MCPWMXB = compliment of falling edge delay*/
-    MCPWM_ACTIVE_LOW_COMPLIMENT_MODE,   /*!<MCPWMXA = compliment of rising edge delay,  MCPWMXB = falling edge delay*/
-    MCPWM_ACTIVE_RED_FED_FROM_PWMXA,    /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXA*/
-    MCPWM_ACTIVE_RED_FED_FROM_PWMXB,    /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXB*/
+    MCPWM_BYPASS_RED,                   /*!<MCPWMXA Out = MCPWMXA In with no delay, MCPWMXB Out = MCPWMXA In with falling edge delay*/
+    MCPWM_BYPASS_FED,                   /*!<MCPWMXA Out = MCPWMXA In with rising edge delay, MCPWMXB Out = MCPWMXB In with no delay*/
+    MCPWM_ACTIVE_HIGH_MODE,             /*!<MCPWMXA Out = MCPWMXA In with rising edge delay,  MCPWMXB Out = MCPWMXA In with falling edge delay*/
+    MCPWM_ACTIVE_LOW_MODE,              /*!<MCPWMXA Out = MCPWMXA In with compliment of rising edge delay,  MCPWMXB Out = MCPWMXA In with compliment of falling edge delay*/
+    MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE,  /*!<MCPWMXA Out = MCPWMXA In with rising edge delay,  MCPWMXB = MCPWMXA In with compliment of falling edge delay*/
+    MCPWM_ACTIVE_LOW_COMPLIMENT_MODE,   /*!<MCPWMXA Out = MCPWMXA In with compliment of rising edge delay,  MCPWMXB Out = MCPWMXA In with falling edge delay*/
+    MCPWM_ACTIVE_RED_FED_FROM_PWMXA,    /*!<MCPWMXA Out = MCPWMXB Out = MCPWMXA In with rising edge delay as well as falling edge delay*/
+    MCPWM_ACTIVE_RED_FED_FROM_PWMXB,    /*!<MCPWMXA Out = MCPWMXB Out = MCPWMXB In with rising edge delay as well as falling edge delay*/
     MCPWM_DEADTIME_TYPE_MAX,            /*!<Maximum number of supported dead time modes*/
 } mcpwm_deadtime_type_t;
 
diff --git a/components/driver/mcpwm.c b/components/driver/mcpwm.c
index 4eb884b647..c501375c34 100644
--- a/components/driver/mcpwm.c
+++ b/components/driver/mcpwm.c
@@ -548,68 +548,68 @@ esp_err_t mcpwm_deadtime_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num,
     mcpwm_ll_deadtime_set_falling_delay(hal->dev, op, fed + 1);
     switch (dt_mode) {
     case MCPWM_BYPASS_RED:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, true);     // S1
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4
-        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1);  // S5
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0=0
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, true);     // S1=1
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4=0
+        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0);  // S5=0
         break;
     case MCPWM_BYPASS_FED:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, true);     // S0
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4
-        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0);  // S5
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, true);     // S0=1
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4=0
+        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0);  // S5=0
         break;
     case MCPWM_ACTIVE_HIGH_MODE:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4
-        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1);  // S5
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0=0
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4=0
+        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0);  // S5=0
         break;
     case MCPWM_ACTIVE_LOW_MODE:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);   // S0
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);   // S1
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true); // S2
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true); // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4
-        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1); // S5
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);   // S0=0
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);   // S1=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true); // S2=1
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true); // S3=1
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
+        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5=0
         break;
     case MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true);  // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4
-        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1);  // S5
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0=0
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true);  // S3=1
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4=0
+        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0);  // S5=0
         break;
     case MCPWM_ACTIVE_LOW_COMPLIMENT_MODE:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true);  // S2
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 1);  // S4
-        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0);  // S5
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0=0
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false);    // S1=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true);  // S2=1
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4=0
+        mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0);  // S5=0
         break;
     case MCPWM_ACTIVE_RED_FED_FROM_PWMXA:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 1);  // S4
-        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true);   // S6
-        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false);  // S7
-        mcpwm_ll_deadtime_enable_deb(hal->dev, op, true);         // S8
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4=0
+        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true);   // S6=1
+        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false);  // S7=0
+        mcpwm_ll_deadtime_enable_deb(hal->dev, op, true);         // S8=1
         break;
     case MCPWM_ACTIVE_RED_FED_FROM_PWMXB:
-        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0
-        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
-        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0);  // S4
-        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true);   // S6
-        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false);  // S7
-        mcpwm_ll_deadtime_enable_deb(hal->dev, op, true);         // S8
+        mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false);    // S0=0
+        mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
+        mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 1);  // S4=1
+        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true);   // S6=1
+        mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false);  // S7=0
+        mcpwm_ll_deadtime_enable_deb(hal->dev, op, true);         // S8=1
         break;
     default :
         break;