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Merge branch 'feature/support_i2s_on_h2' into 'master'

Browse Source 
i2s: support i2s on esp32h2

Closes IDF-6219 and IDF-6700

See merge request espressif/esp-idf!21948
This commit is contained in:
Kevin (Lao Kaiyao)
2023-01-19 10:47:33 +08:00
parent 8f82c5cdee c79187fdeb
commit 668e125dd4
36 changed files with 1315 additions and 63 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
components/driver/.build-test-rules.yml
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@@ -27,10 +27,6 @@ components/driver/test_apps/i2s_test_apps/legacy_i2s_adc_dac:
components/driver/test_apps/i2s_test_apps/legacy_i2s_driver: components/driver/test_apps/i2s_test_apps/legacy_i2s_driver:
disable: disable:
- if: SOC_I2S_SUPPORTED != 1 - if: SOC_I2S_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32c6"
temporary: true
reason: target esp32c6 is not supported yet
components/driver/test_apps/ledc: components/driver/test_apps/ledc:
disable: disable:

5
components/driver/i2s/i2s_common.c
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@@ -497,6 +497,11 @@ uint32_t i2s_get_source_clk_freq(i2s_clock_src_t clk_src, uint32_t mclk_freq_hz)
case I2S_CLK_SRC_PLL_96M: case I2S_CLK_SRC_PLL_96M:
(void)mclk_freq_hz; (void)mclk_freq_hz;
return I2S_LL_PLL_F96M_CLK_FREQ; return I2S_LL_PLL_F96M_CLK_FREQ;
#endif
#if SOC_I2S_SUPPORTS_PLL_F64M
case I2S_CLK_SRC_PLL_64M:
(void)mclk_freq_hz;
return I2S_LL_PLL_F64M_CLK_FREQ;
#endif #endif
default: default:
// Invalid clock source // Invalid clock source

4
components/driver/test_apps/i2s_test_apps/i2s/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

15
components/driver/test_apps/i2s_test_apps/i2s/main/test_i2s.c
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@@ -748,16 +748,21 @@ static void i2s_test_common_sample_rate(i2s_chan_handle_t rx_chan, i2s_std_clk_c
/* Test common sample rate /* Test common sample rate
* Workaround: set 12000 as 12001 to bypass the unknown failure, TODO: IDF-6705 */ * Workaround: set 12000 as 12001 to bypass the unknown failure, TODO: IDF-6705 */
uint32_t test_freq[] = {8000, 10000, 11025, 12001, 16000, 22050, 24000, const uint32_t test_freq[] = {
32000, 44100, 48000, 64000, 88200, 96000, 8000, 10000, 11025, 12001, 16000, 22050,
128000, 144000, 196000}; 24000, 32000, 44100, 48000, 64000, 88200,
96000, 128000,144000,196000};
int real_pulse = 0; int real_pulse = 0;
int case_cnt = sizeof(test_freq) / sizeof(uint32_t); int case_cnt = sizeof(test_freq) / sizeof(uint32_t);
#if SOC_I2S_HW_VERSION_2 #if SOC_I2S_SUPPORTS_XTAL
// Can't support a very high sample rate while using XTAL as clock source // Can't support a very high sample rate while using XTAL as clock source
if (clk_cfg->clk_src == I2S_CLK_SRC_XTAL) { if (clk_cfg->clk_src == I2S_CLK_SRC_XTAL) {
case_cnt = 10; case_cnt = 10;
} }
#endif
#if CONFIG_IDF_ENV_FPGA
// Limit the test sample rate on FPGA platform due to the low frequency it supports.
case_cnt = 10;
#endif #endif
for (int i = 0; i < case_cnt; i++) { for (int i = 0; i < case_cnt; i++) {
int expt_pulse = (int)((float)test_freq[i] * (TEST_I2S_PERIOD_MS / 1000.0)); int expt_pulse = (int)((float)test_freq[i] * (TEST_I2S_PERIOD_MS / 1000.0));
@@ -797,7 +802,7 @@ TEST_CASE("I2S_default_PLL_clock_test", "[i2s]")
TEST_ESP_OK(i2s_channel_init_std_mode(rx_handle, &std_cfg)); TEST_ESP_OK(i2s_channel_init_std_mode(rx_handle, &std_cfg));
i2s_test_common_sample_rate(rx_handle, &std_cfg.clk_cfg); i2s_test_common_sample_rate(rx_handle, &std_cfg.clk_cfg);
#if SOC_I2S_HW_VERSION_2 #if SOC_I2S_SUPPORTS_XTAL
std_cfg.clk_cfg.clk_src = I2S_CLK_SRC_XTAL; std_cfg.clk_cfg.clk_src = I2S_CLK_SRC_XTAL;
i2s_test_common_sample_rate(rx_handle, &std_cfg.clk_cfg); i2s_test_common_sample_rate(rx_handle, &std_cfg.clk_cfg);
#endif #endif

3
components/driver/test_apps/i2s_test_apps/i2s/pytest_i2s.py
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@@ -1,4 +1,4 @@
# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD # SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
import pytest import pytest
@@ -10,6 +10,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
@pytest.mark.parametrize( @pytest.mark.parametrize(
'config', 'config',

4
components/driver/test_apps/i2s_test_apps/i2s_tdm/README.md
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@@ -1,3 +1,3 @@
| Supported Targets | ESP32-C3 | ESP32-C6 | ESP32-S3 | | Supported Targets | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | | ----------------- | -------- | -------- | -------- | -------- |

3
components/driver/test_apps/i2s_test_apps/i2s_tdm/pytest_i2s_tdm_full_duplex.py
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@@ -1,4 +1,4 @@
# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD # SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Unlicense OR CC0-1.0 # SPDX-License-Identifier: Unlicense OR CC0-1.0
import pytest import pytest
@@ -6,6 +6,7 @@ import pytest
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic_multi_device @pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [ @pytest.mark.parametrize('count', [
2, 2,

4
components/driver/test_apps/i2s_test_apps/legacy_i2s_driver/README.md
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

14
components/driver/test_apps/i2s_test_apps/legacy_i2s_driver/main/test_legacy_i2s.c
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@@ -876,11 +876,17 @@ static void i2s_test_common_sample_rate(i2s_port_t id)
/* Test common sample rate /* Test common sample rate
* Workaround: set 12000 as 12001 to bypass the unknown failure, TODO: IDF-6705 */ * Workaround: set 12000 as 12001 to bypass the unknown failure, TODO: IDF-6705 */
uint32_t test_freq[] = {8000, 10000, 11025, 12001, 16000, 22050, 24000, const uint32_t test_freq[] = {
32000, 44100, 48000, 64000, 88200, 96000, 8000, 10000, 11025, 12001, 16000, 22050,
128000, 144000, 196000}; 24000, 32000, 44100, 48000, 64000, 88200,
int case_cnt = sizeof(test_freq) / sizeof(uint32_t); 96000, 128000, 144000,196000};
int real_pulse = 0; int real_pulse = 0;
#if CONFIG_IDF_ENV_FPGA
// Limit the test sample rate on FPGA platform due to the low frequency it supports.
int case_cnt = 10;
#else
int case_cnt = sizeof(test_freq) / sizeof(uint32_t);
#endif
// Acquire the PM lock incase Dynamic Frequency Scaling(DFS) lower the frequency // Acquire the PM lock incase Dynamic Frequency Scaling(DFS) lower the frequency
#ifdef CONFIG_PM_ENABLE #ifdef CONFIG_PM_ENABLE

4
components/driver/test_apps/i2s_test_apps/legacy_i2s_driver/pytest_legacy_i2s.py
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@@ -1,4 +1,4 @@
# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD # SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
import pytest import pytest
@@ -9,6 +9,8 @@ from pytest_embedded import Dut
@pytest.mark.esp32s2 @pytest.mark.esp32s2
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
@pytest.mark.parametrize( @pytest.mark.parametrize(
'config', 'config',

2
components/hal/esp32c3/include/hal/i2s_ll.h
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@@ -936,6 +936,8 @@ static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
*/ */
static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable) static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
{ {
// Due to the lack of `PDM to PCM` module on ESP32-C3, PDM RX is not available
HAL_ASSERT(!pdm_enable);
hw->rx_conf.rx_pdm_en = 0; hw->rx_conf.rx_pdm_en = 0;
hw->rx_conf.rx_tdm_en = 1; hw->rx_conf.rx_tdm_en = 1;
} }

2
components/hal/esp32c6/include/hal/i2s_ll.h
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@@ -951,6 +951,8 @@ static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
*/ */
static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable) static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
{ {
// Due to the lack of `PDM to PCM` module on ESP32-C6, PDM RX is not available
HAL_ASSERT(!pdm_enable);
hw->rx_conf.rx_pdm_en = 0; hw->rx_conf.rx_pdm_en = 0;
hw->rx_conf.rx_tdm_en = 1; hw->rx_conf.rx_tdm_en = 1;
} }

1190
components/hal/esp32h2/include/hal/i2s_ll.h Normal file
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File diff suppressed because it is too large Load Diff

2
components/hal/esp32h4/include/hal/i2s_ll.h
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@@ -936,6 +936,8 @@ static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
*/ */
static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable) static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
{ {
// Due to the lack of `PDM to PCM` module on ESP32-H4, PDM RX is not available
HAL_ASSERT(!pdm_enable);
hw->rx_conf.rx_pdm_en = pdm_enable; hw->rx_conf.rx_pdm_en = pdm_enable;
hw->rx_conf.rx_tdm_en = !pdm_enable; hw->rx_conf.rx_tdm_en = !pdm_enable;
} }

4
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
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@@ -376,8 +376,8 @@ config SOC_I2C_SUPPORT_RTC
default y default y
config SOC_I2S_NUM config SOC_I2S_NUM
bool int
default y default 1
config SOC_I2S_HW_VERSION_2 config SOC_I2S_HW_VERSION_2
bool bool

2
components/soc/esp32c3/include/soc/soc_caps.h
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@@ -185,7 +185,7 @@
#define SOC_I2C_SUPPORT_RTC (1) #define SOC_I2C_SUPPORT_RTC (1)
/*-------------------------- I2S CAPS ----------------------------------------*/ /*-------------------------- I2S CAPS ----------------------------------------*/
#define SOC_I2S_NUM (1) #define SOC_I2S_NUM (1U)
#define SOC_I2S_HW_VERSION_2 (1) #define SOC_I2S_HW_VERSION_2 (1)
#define SOC_I2S_SUPPORTS_XTAL (1) #define SOC_I2S_SUPPORTS_XTAL (1)
#define SOC_I2S_SUPPORTS_PLL_F160M (1) #define SOC_I2S_SUPPORTS_PLL_F160M (1)

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
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@@ -428,8 +428,8 @@ config SOC_I2C_SUPPORT_RTC
default y default y
config SOC_I2S_NUM config SOC_I2S_NUM
bool int
default y default 1
config SOC_I2S_HW_VERSION_2 config SOC_I2S_HW_VERSION_2
bool bool

2
components/soc/esp32c6/include/soc/soc_caps.h
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@@ -212,7 +212,7 @@
#define SOC_I2C_SUPPORT_RTC (1) #define SOC_I2C_SUPPORT_RTC (1)
/*-------------------------- I2S CAPS ----------------------------------------*/ /*-------------------------- I2S CAPS ----------------------------------------*/
#define SOC_I2S_NUM (1) #define SOC_I2S_NUM (1U)
#define SOC_I2S_HW_VERSION_2 (1) #define SOC_I2S_HW_VERSION_2 (1)
#define SOC_I2S_SUPPORTS_XTAL (1) #define SOC_I2S_SUPPORTS_XTAL (1)
#define SOC_I2S_SUPPORTS_PLL_F160M (1) #define SOC_I2S_SUPPORTS_PLL_F160M (1)

1
components/soc/esp32h2/CMakeLists.txt
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@@ -21,7 +21,6 @@ list(REMOVE_ITEM srcs
"adc_periph.c" "adc_periph.c"
"dedic_gpio_periph.c" "dedic_gpio_periph.c"
"ledc_periph.c" "ledc_periph.c"
"i2s_periph.c"
"i2c_periph.c" "i2c_periph.c"
"temperature_sensor_periph.c" "temperature_sensor_periph.c"
"adc_periph.c" "adc_periph.c"

28
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@@ -39,6 +39,10 @@ config SOC_RTC_MEM_SUPPORTED
bool bool
default y default y
config SOC_I2S_SUPPORTED
bool
default y
config SOC_SDM_SUPPORTED config SOC_SDM_SUPPORTED
bool bool
default y default y
@@ -272,8 +276,8 @@ config SOC_I2C_SUPPORT_RTC
default y default y
config SOC_I2S_NUM config SOC_I2S_NUM
bool int
default y default 1
config SOC_I2S_HW_VERSION_2 config SOC_I2S_HW_VERSION_2
bool bool
@@ -283,10 +287,22 @@ config SOC_I2S_SUPPORTS_XTAL
bool bool
default y default y
config SOC_I2S_SUPPORTS_PLL_F96M
bool
default y
config SOC_I2S_SUPPORTS_PLL_F64M
bool
default y
config SOC_I2S_SUPPORTS_PCM config SOC_I2S_SUPPORTS_PCM
bool bool
default y default y
config SOC_I2S_SUPPORTS_PDM
bool
default y
config SOC_I2S_SUPPORTS_PDM_TX config SOC_I2S_SUPPORTS_PDM_TX
bool bool
default y default y
@@ -295,6 +311,14 @@ config SOC_I2S_PDM_MAX_TX_LINES
int int
default 2 default 2
config SOC_I2S_SUPPORTS_TDM
bool
default y
config SOC_I2S_TDM_FULL_DATA_WIDTH
bool
default y
config SOC_LEDC_SUPPORT_PLL_DIV_CLOCK config SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
bool bool
default y default y

14
components/soc/esp32h2/include/soc/i2s_struct.h
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@@ -1,5 +1,5 @@
/** /**
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -448,7 +448,7 @@ typedef union {
uint32_t val; uint32_t val;
} i2s_rx_tdm_ctrl_reg_t; } i2s_rx_tdm_ctrl_reg_t;
/** Type of rxeof_num register /** Type of rx_eof_num register
* I2S RX data number control register. * I2S RX data number control register.
*/ */
typedef union { typedef union {
@@ -461,7 +461,7 @@ typedef union {
uint32_t reserved_12:20; uint32_t reserved_12:20;
}; };
uint32_t val; uint32_t val;
} i2s_rxeof_num_reg_t; } i2s_rx_eof_num_reg_t;
/** Group: TX Control and configuration registers */ /** Group: TX Control and configuration registers */
@@ -912,7 +912,7 @@ typedef union {
uint32_t val; uint32_t val;
} i2s_lc_hung_conf_reg_t; } i2s_lc_hung_conf_reg_t;
/** Type of conf_sigle_data register /** Type of conf_single_data register
* I2S signal data register * I2S signal data register
*/ */
typedef union { typedef union {
@@ -923,7 +923,7 @@ typedef union {
uint32_t single_data:32; uint32_t single_data:32;
}; };
uint32_t val; uint32_t val;
} i2s_conf_sigle_data_reg_t; } i2s_conf_single_data_reg_t;
/** Group: TX status registers */ /** Group: TX status registers */
@@ -1003,8 +1003,8 @@ typedef struct {
volatile i2s_rx_timing_reg_t rx_timing; volatile i2s_rx_timing_reg_t rx_timing;
volatile i2s_tx_timing_reg_t tx_timing; volatile i2s_tx_timing_reg_t tx_timing;
volatile i2s_lc_hung_conf_reg_t lc_hung_conf; volatile i2s_lc_hung_conf_reg_t lc_hung_conf;
volatile i2s_rxeof_num_reg_t rxeof_num; volatile i2s_rx_eof_num_reg_t rx_eof_num;
volatile i2s_conf_sigle_data_reg_t conf_sigle_data; volatile i2s_conf_single_data_reg_t conf_single_data;
volatile i2s_state_reg_t state; volatile i2s_state_reg_t state;
volatile i2s_etm_conf_reg_t etm_conf; volatile i2s_etm_conf_reg_t etm_conf;
uint32_t reserved_074[3]; uint32_t reserved_074[3];

12
components/soc/esp32h2/include/soc/soc_caps.h
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@@ -44,7 +44,7 @@
#define SOC_EFUSE_HAS_EFUSE_RST_BUG 1 #define SOC_EFUSE_HAS_EFUSE_RST_BUG 1
#define SOC_RTC_FAST_MEM_SUPPORTED 1 #define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_MEM_SUPPORTED 1 #define SOC_RTC_MEM_SUPPORTED 1
// #define SOC_I2S_SUPPORTED 1 // TODO: IDF-6219 #define SOC_I2S_SUPPORTED 1
#define SOC_SDM_SUPPORTED 1 #define SOC_SDM_SUPPORTED 1
#define SOC_RMT_SUPPORTED 1 #define SOC_RMT_SUPPORTED 1
// #define SOC_GPSPI_SUPPORTED 1 // TODO: IDF-6264 // #define SOC_GPSPI_SUPPORTED 1 // TODO: IDF-6264
@@ -183,16 +183,18 @@
#define SOC_I2C_SUPPORT_XTAL (1) #define SOC_I2C_SUPPORT_XTAL (1)
#define SOC_I2C_SUPPORT_RTC (1) #define SOC_I2C_SUPPORT_RTC (1)
// TODO: IDF-6219
/*-------------------------- I2S CAPS ----------------------------------------*/ /*-------------------------- I2S CAPS ----------------------------------------*/
#define SOC_I2S_NUM (1) #define SOC_I2S_NUM (1U)
#define SOC_I2S_HW_VERSION_2 (1) #define SOC_I2S_HW_VERSION_2 (1)
#define SOC_I2S_SUPPORTS_XTAL (1) #define SOC_I2S_SUPPORTS_XTAL (1)
#define SOC_I2S_SUPPORTS_PLL_F96M (1)
#define SOC_I2S_SUPPORTS_PLL_F64M (1)
#define SOC_I2S_SUPPORTS_PCM (1) #define SOC_I2S_SUPPORTS_PCM (1)
// #define SOC_I2S_SUPPORTS_PDM (1) #define SOC_I2S_SUPPORTS_PDM (1)
#define SOC_I2S_SUPPORTS_PDM_TX (1) #define SOC_I2S_SUPPORTS_PDM_TX (1)
#define SOC_I2S_PDM_MAX_TX_LINES (2) #define SOC_I2S_PDM_MAX_TX_LINES (2)
// #define SOC_I2S_SUPPORTS_TDM (1) #define SOC_I2S_SUPPORTS_TDM (1)
#define SOC_I2S_TDM_FULL_DATA_WIDTH (1) /*!< No limitation to data bit width when using multiple slots */
// TODO: IDF-6235 (Copy from esp32c6, need check) // TODO: IDF-6235 (Copy from esp32c6, need check)
/*-------------------------- LEDC CAPS ---------------------------------------*/ /*-------------------------- LEDC CAPS ---------------------------------------*/

4
components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
View File

@@ -356,8 +356,8 @@ config SOC_I2C_SUPPORT_RTC
default y default y
config SOC_I2S_NUM config SOC_I2S_NUM
bool int
default y default 1
config SOC_I2S_HW_VERSION_2 config SOC_I2S_HW_VERSION_2
bool bool

2
components/soc/esp32h4/include/soc/soc_caps.h
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@@ -193,7 +193,7 @@
#define SOC_I2C_SUPPORT_RTC (1) #define SOC_I2C_SUPPORT_RTC (1)
/*-------------------------- I2S CAPS ----------------------------------------*/ /*-------------------------- I2S CAPS ----------------------------------------*/
#define SOC_I2S_NUM (1) #define SOC_I2S_NUM (1U)
#define SOC_I2S_HW_VERSION_2 (1) #define SOC_I2S_HW_VERSION_2 (1)
#define SOC_I2S_SUPPORTS_XTAL (1) #define SOC_I2S_SUPPORTS_XTAL (1)
#define SOC_I2S_SUPPORTS_PLL_F96M (1) #define SOC_I2S_SUPPORTS_PLL_F96M (1)

2
components/soc/esp32s3/include/soc/soc_caps.h
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@@ -187,7 +187,7 @@
#define SOC_I2C_SUPPORT_RTC (1) #define SOC_I2C_SUPPORT_RTC (1)
/*-------------------------- I2S CAPS ----------------------------------------*/ /*-------------------------- I2S CAPS ----------------------------------------*/
#define SOC_I2S_NUM (2) #define SOC_I2S_NUM (2U)
#define SOC_I2S_HW_VERSION_2 (1) #define SOC_I2S_HW_VERSION_2 (1)
#define SOC_I2S_SUPPORTS_XTAL (1) #define SOC_I2S_SUPPORTS_XTAL (1)
#define SOC_I2S_SUPPORTS_PLL_F160M (1) #define SOC_I2S_SUPPORTS_PLL_F160M (1)

10
docs/en/api-reference/peripherals/i2s.rst
View File

@@ -160,7 +160,15 @@ Standard mode always has left and right two sound channels which are called 'slo
TDM Mode TDM Mode
^^^^^^^^ ^^^^^^^^
TDM(Time Division Multiplexing) mode supports upto 16 slots, these slots can be enabled by :cpp:member:`i2s_tdm_slot_config_t::slot_mask`. But due to the hardware limitation, only upto 4 slots are supported while the slot is set to 32 bit-width, and 8 slots for 16 bit-width, 16 slots for 8 bit-width. The slot communication format of TDM is almost same as standard mode, but there are some small differences between them. TDM(Time Division Multiplexing) mode supports up to 16 slots, these slots can be enabled by :cpp:member:`i2s_tdm_slot_config_t::slot_mask`.
.. only:: SOC_I2S_TDM_FULL_DATA_WIDTH
Any data bit-width is supported no matter how many slots are enabled, that means there can be up to ``32 bit-width * 16 slots = 512 bit`` in one frame.
.. only:: not SOC_I2S_TDM_FULL_DATA_WIDTH
But due to the hardware limitation, only up to 4 slots are supported while the slot is set to 32 bit-width, and 8 slots for 16 bit-width, 16 slots for 8 bit-width. The slot communication format of TDM is almost same as standard mode, but there are some small differences between them.
- **Philips Format**: Data signal have one bit shift comparing to the WS(word select) signal. And no matter how many slots are contained in one frame, the duty of WS signal will always keep 50%. - **Philips Format**: Data signal have one bit shift comparing to the WS(word select) signal. And no matter how many slots are contained in one frame, the duty of WS signal will always keep 50%.

10
examples/peripherals/.build-test-rules.yml
View File

@@ -41,10 +41,6 @@ examples/peripherals/i2s/i2s_adc_dac:
examples/peripherals/i2s/i2s_basic/i2s_pdm: examples/peripherals/i2s/i2s_basic/i2s_pdm:
disable: disable:
- if: SOC_I2S_SUPPORTS_PDM != 1 - if: SOC_I2S_SUPPORTS_PDM != 1
disable_test:
- if: IDF_TARGET == "esp32c6"
temporary: true
reason: target esp32c6 is not supported yet
examples/peripherals/i2s/i2s_basic/i2s_std: examples/peripherals/i2s/i2s_basic/i2s_std:
disable: disable:
@@ -56,11 +52,13 @@ examples/peripherals/i2s/i2s_basic/i2s_tdm:
examples/peripherals/i2s/i2s_codec/i2s_es7210_tdm: examples/peripherals/i2s/i2s_codec/i2s_es7210_tdm:
disable: disable:
- if: SOC_I2S_SUPPORTS_TDM != 1 - if: SOC_I2S_SUPPORTS_TDM != 1 or SOC_I2C_SUPPORTED != 1
reason: rely on I2S TDM mode and I2C support
examples/peripherals/i2s/i2s_codec/i2s_es8311: examples/peripherals/i2s/i2s_codec/i2s_es8311:
disable: disable:
- if: SOC_I2S_SUPPORTED != 1 - if: SOC_I2S_SUPPORTED != 1 or SOC_I2C_SUPPORTED != 1
reason: rely on I2S STD mode and I2C support
examples/peripherals/i2s/i2s_recorder: examples/peripherals/i2s/i2s_recorder:
enable: enable:

4
examples/peripherals/i2s/i2s_basic/i2s_pdm/README.md
View File

@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- |
# I2S Basic PDM Mode Example # I2S Basic PDM Mode Example

2
examples/peripherals/i2s/i2s_basic/i2s_pdm/pytest_i2s_pdm.py
View File

@@ -8,6 +8,8 @@ from pytest_embedded import Dut
@pytest.mark.esp32 @pytest.mark.esp32
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
@pytest.mark.parametrize( @pytest.mark.parametrize(
'config', 'config',

4
examples/peripherals/i2s/i2s_basic/i2s_std/README.md
View File

@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# I2S Basic Standard Mode Example # I2S Basic Standard Mode Example

1
examples/peripherals/i2s/i2s_basic/i2s_std/pytest_i2s_std.py
View File

@@ -10,6 +10,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
def test_i2s_basic_example(dut: Dut) -> None: def test_i2s_basic_example(dut: Dut) -> None:

4
examples/peripherals/i2s/i2s_basic/i2s_tdm/README.md
View File

@@ -1,5 +1,5 @@
| Supported Targets | ESP32-C3 | ESP32-C6 | ESP32-S3 | | Supported Targets | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | | ----------------- | -------- | -------- | -------- | -------- |
# I2S Basic TDM Mode Example # I2S Basic TDM Mode Example

7
examples/peripherals/i2s/i2s_basic/i2s_tdm/main/i2s_tdm_example_main.c
View File

@@ -102,9 +102,12 @@ static void i2s_example_init_tdm_duplex(void)
* They can help to specify the slot and clock configurations for initialization or re-configuring */ * They can help to specify the slot and clock configurations for initialization or re-configuring */
i2s_tdm_config_t tdm_cfg = { i2s_tdm_config_t tdm_cfg = {
.clk_cfg = I2S_TDM_CLK_DEFAULT_CONFIG(16000), .clk_cfg = I2S_TDM_CLK_DEFAULT_CONFIG(16000),
/* Limited by the hardware, the number of bit clock can't exceed 128 in one frame, /* For the target that not support full data bit-width in multiple slots (e.g. ESP32C3, ESP32S3, ESP32C6)
* The maximum bits in one frame is limited by the hardware, the number of bit clock can't exceed 128 in one frame,
* which is to say, TDM mode can only support 32 bit-width data upto 4 slots, * which is to say, TDM mode can only support 32 bit-width data upto 4 slots,
* 16 bit-width data upto 8 slots and 8 bit-width data upto 16 slots */ * 16 bit-width data upto 8 slots and 8 bit-width data upto 16 slots
* But for the target that support full data bit-width in multiple slots (e.g. ESP32H2)
* There is no such limitation, it can support up to 32 bit-width with 16 slots */
.slot_cfg = I2S_TDM_MSB_SLOT_DEFAULT_CONFIG(I2S_DATA_BIT_WIDTH_32BIT, I2S_SLOT_MODE_STEREO, .slot_cfg = I2S_TDM_MSB_SLOT_DEFAULT_CONFIG(I2S_DATA_BIT_WIDTH_32BIT, I2S_SLOT_MODE_STEREO,
I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3), I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3),
.gpio_cfg = { .gpio_cfg = {

1
examples/peripherals/i2s/i2s_basic/i2s_tdm/pytest_i2s_tdm.py
View File

@@ -8,6 +8,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
def test_i2s_tdm_example(dut: Dut) -> None: def test_i2s_tdm_example(dut: Dut) -> None:

3
examples/peripherals/i2s/i2s_codec/i2s_es7210_tdm/pytest_i2s_es7210_tdm.py
View File

@@ -1,4 +1,4 @@
# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD # SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Unlicense OR CC0-1.0 # SPDX-License-Identifier: Unlicense OR CC0-1.0
import pytest import pytest
from pytest_embedded import Dut from pytest_embedded import Dut
@@ -7,6 +7,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
def test_i2s_es7210_tdm_example(dut: Dut) -> None: def test_i2s_es7210_tdm_example(dut: Dut) -> None:
dut.expect_exact('example: Create I2S receive channel') dut.expect_exact('example: Create I2S receive channel')

1
examples/peripherals/i2s/i2s_codec/i2s_es8311/pytest_i2s_es8311.py
View File

@@ -10,6 +10,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3 @pytest.mark.esp32s3
@pytest.mark.esp32c3 @pytest.mark.esp32c3
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
def test_i2s_es8311_example_generic(dut: Dut) -> None: def test_i2s_es8311_example_generic(dut: Dut) -> None:
dut.expect('i2s es8311 codec example start') dut.expect('i2s es8311 codec example start')