From 7cf32b4387b92b636602bfa7ae5214049ea98d83 Mon Sep 17 00:00:00 2001 From: chaijie Date: Tue, 21 Jul 2020 16:11:50 +0800 Subject: [PATCH] esp32s2: Fix wakeup fail issue when pd peripheral in lightsleep. esp32s2: fix wrong deepsleep configuration issue. 1. if RTC_CK8M_ENABLE_WAIT_DEFAULT set to 1, rtc peripherals will not poweron successfully if pd peripherals in light_sleep, the minimum RTC_CK8M_ENABLE_WAIT_DEFAULT is RTC_POWERUP_CYCLES + RTC_WAIT_CYCLES + 2; 2. when goto deepsleep after lightsleep waking up, rtc regulator should not force pu. --- components/esp_hw_support/port/esp32s2/rtc_sleep.c | 1 + components/soc/esp32s2/include/soc/rtc.h | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/components/esp_hw_support/port/esp32s2/rtc_sleep.c b/components/esp_hw_support/port/esp32s2/rtc_sleep.c index be21291b05..cde6c2eca4 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32s2/rtc_sleep.c @@ -103,6 +103,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg) REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_MONITOR, RTC_CNTL_PD_CUR_MONITOR_DEFAULT); REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP, RTC_CNTL_PD_CUR_SLEEP_DEFAULT); if (cfg.deep_slp) { + CLEAR_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU); REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULT); SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN); CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, diff --git a/components/soc/esp32s2/include/soc/rtc.h b/components/soc/esp32s2/include/soc/rtc.h index 115f0b4121..a52ca4bcb3 100644 --- a/components/soc/esp32s2/include/soc/rtc.h +++ b/components/soc/esp32s2/include/soc/rtc.h @@ -102,7 +102,7 @@ extern "C" { #define RTC_CNTL_PLL_BUF_WAIT_DEFAULT 20 #define RTC_CNTL_XTL_BUF_WAIT_DEFAULT 100 #define RTC_CNTL_CK8M_WAIT_DEFAULT 20 -#define RTC_CK8M_ENABLE_WAIT_DEFAULT 1 +#define RTC_CK8M_ENABLE_WAIT_DEFAULT 5 /* Various delays to be programmed into power control state machines */ #define RTC_CNTL_PLL_BUF_WAIT_SLP_CYCLES (1)