diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index de4858f7e1..8861f70abb 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -69,6 +69,16 @@ if(target STREQUAL "linux") else() target_linker_script(${COMPONENT_LIB} INTERFACE "${target}/${ld_folder}/${target}.rom.ld") rom_linker_script("api") + + # esp32c6.rom.api.ld has been split to several lds by components + if(target STREQUAL "esp32c6") + rom_linker_script("phy") + rom_linker_script("coexist") + rom_linker_script("net80211") + rom_linker_script("pp") + # rom_linker_script("spiflash") # TODO: IDF-5632 (Supports more rom components) + endif() + if(CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB) rom_linker_script("libgcc") else() @@ -104,6 +114,9 @@ if(BOOTLOADER_BUILD) elseif(target STREQUAL "esp32c2") rom_linker_script("newlib") rom_linker_script("mbedtls") + + elseif(target STREQUAL "esp32c6") + rom_linker_script("newlib") endif() else() # Regular app build @@ -217,17 +230,21 @@ else() # Regular app build endif() endif() - if(CONFIG_HEAP_TLSF_USE_ROM_IMPL) - # After registering the component, set the tlsf_set_rom_patches symbol as undefined - # to force the linker to integrate the whole `esp_rom_tlsf.c` object file inside the - # final binary. This is necessary because tlsf_set_rom_patches is a constructor, thus, - # there as no explicit reference/call to it in IDF. - if(CONFIG_ESP_ROM_TLSF_CHECK_PATCH) - target_link_libraries(${COMPONENT_LIB} PRIVATE "-u tlsf_set_rom_patches") - endif() + elseif(target STREQUAL "esp32c6") + rom_linker_script("newlib") + rom_linker_script("version") + endif() - rom_linker_script("heap") + if(CONFIG_HEAP_TLSF_USE_ROM_IMPL) + # After registering the component, set the tlsf_set_rom_patches symbol as undefined + # to force the linker to integrate the whole `esp_rom_tlsf.c` object file inside the + # final binary. This is necessary because tlsf_set_rom_patches is a constructor, thus, + # there as no explicit reference/call to it in IDF. + if(CONFIG_ESP_ROM_TLSF_CHECK_PATCH) + target_link_libraries(${COMPONENT_LIB} PRIVATE "-u tlsf_set_rom_patches") endif() + + rom_linker_script("heap") endif() if(CONFIG_IDF_TARGET_ARCH_XTENSA) diff --git a/components/esp_rom/esp32c2/Kconfig.soc_caps.in b/components/esp_rom/esp32c2/Kconfig.soc_caps.in index d676d6ce03..295c811d1c 100644 --- a/components/esp_rom/esp32c2/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c2/Kconfig.soc_caps.in @@ -42,3 +42,11 @@ config ESP_ROM_HAS_HEAP_TLSF config ESP_ROM_TLSF_CHECK_PATCH bool default y + +config ESP_ROM_HAS_LAYOUT_TABLE + bool + default y + +config ESP_ROM_HAS_SPI_FLASH + bool + default y diff --git a/components/esp_rom/esp32c2/esp_rom_caps.h b/components/esp_rom/esp32c2/esp_rom_caps.h index 60706ac706..39db7a94f6 100644 --- a/components/esp_rom/esp32c2/esp_rom_caps.h +++ b/components/esp_rom/esp32c2/esp_rom_caps.h @@ -16,3 +16,5 @@ #define ESP_ROM_HAS_HAL_SYSTIMER (1) // ROM has the implementation of Systimer HAL driver #define ESP_ROM_HAS_HEAP_TLSF (1) // ROM has the implementation of the tlsf and multi-heap library #define ESP_ROM_TLSF_CHECK_PATCH (1) // ROM does not contain the patch of tlsf_check() +#define ESP_ROM_HAS_LAYOUT_TABLE (1) // ROM has the layout table +#define ESP_ROM_HAS_SPI_FLASH (1) // ROM has the implementation of SPI Flash driver diff --git a/components/esp_rom/esp32c3/Kconfig.soc_caps.in b/components/esp_rom/esp32c3/Kconfig.soc_caps.in index 5d8515d9f0..7c5297eaae 100644 --- a/components/esp_rom/esp32c3/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c3/Kconfig.soc_caps.in @@ -38,3 +38,11 @@ config ESP_ROM_GET_CLK_FREQ config ESP_ROM_NEEDS_SWSETUP_WORKAROUND bool default y + +config ESP_ROM_HAS_LAYOUT_TABLE + bool + default y + +config ESP_ROM_HAS_SPI_FLASH + bool + default y diff --git a/components/esp_rom/esp32c3/esp_rom_caps.h b/components/esp_rom/esp32c3/esp_rom_caps.h index d95eae7478..e8b86ff7e5 100644 --- a/components/esp_rom/esp32c3/esp_rom_caps.h +++ b/components/esp_rom/esp32c3/esp_rom_caps.h @@ -15,3 +15,5 @@ #define ESP_ROM_HAS_ERASE_0_REGION_BUG (1) // ROM has esp_flash_erase_region(size=0) bug #define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency` #define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing +#define ESP_ROM_HAS_LAYOUT_TABLE (1) // ROM has the layout table +#define ESP_ROM_HAS_SPI_FLASH (1) // ROM has the implementation of SPI Flash driver diff --git a/components/esp_rom/esp32c6/Kconfig.soc_caps.in b/components/esp_rom/esp32c6/Kconfig.soc_caps.in index 157ee04b80..abb7f8fe10 100644 --- a/components/esp_rom/esp32c6/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c6/Kconfig.soc_caps.in @@ -30,3 +30,19 @@ config ESP_ROM_HAS_RETARGETABLE_LOCKING config ESP_ROM_GET_CLK_FREQ bool default y + +config ESP_ROM_HAS_HEAP_TLSF + bool + default y + +config ESP_ROM_HAS_LAYOUT_TABLE + bool + default y + +config ESP_ROM_HAS_RVFPLIB + bool + default y + +config ESP_ROM_HAS_SPI_FLASH + bool + default y diff --git a/components/esp_rom/esp32c6/esp_rom_caps.h b/components/esp_rom/esp32c6/esp_rom_caps.h index 76073921ec..4305caa9a0 100644 --- a/components/esp_rom/esp32c6/esp_rom_caps.h +++ b/components/esp_rom/esp32c6/esp_rom_caps.h @@ -13,3 +13,7 @@ #define ESP_ROM_USB_SERIAL_DEVICE_NUM (3) // UART uses USB_SERIAL_JTAG port in ROM. #define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking #define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency` +#define ESP_ROM_HAS_HEAP_TLSF (1) // ROM has the implementation of the tlsf and multi-heap library +#define ESP_ROM_HAS_LAYOUT_TABLE (1) // ROM has the layout table +#define ESP_ROM_HAS_RVFPLIB (1) // ROM has the rvfplib +#define ESP_ROM_HAS_SPI_FLASH (1) // ROM has the implementation of SPI Flash driver diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.coexist.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.coexist.ld new file mode 100644 index 0000000000..74e084416e --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.coexist.ld @@ -0,0 +1,47 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.coexist.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group rom_coexist + ***************************************/ + +/* Functions */ +esp_coex_rom_version_get = 0x40000afc; +coex_bt_release = 0x40000b00; +coex_bt_request = 0x40000b04; +coex_core_ble_conn_dyn_prio_get = 0x40000b08; +coex_core_event_duration_get = 0x40000b0c; +coex_core_pti_get = 0x40000b10; +coex_core_release = 0x40000b14; +coex_core_request = 0x40000b18; +coex_core_status_get = 0x40000b1c; +coex_core_timer_idx_get = 0x40000b20; +coex_event_duration_get = 0x40000b24; +coex_hw_timer_disable = 0x40000b28; +coex_hw_timer_enable = 0x40000b2c; +coex_hw_timer_set = 0x40000b30; +coex_schm_interval_set = 0x40000b34; +coex_schm_lock = 0x40000b38; +coex_schm_unlock = 0x40000b3c; +coex_status_get = 0x40000b40; +coex_wifi_release = 0x40000b44; +esp_coex_ble_conn_dynamic_prio_get = 0x40000b48; +/* Data (.data, .bss, .rodata) */ +coex_env_ptr = 0x4087ffc4; +coex_pti_tab_ptr = 0x4087ffc0; +coex_schm_env_ptr = 0x4087ffbc; +coexist_funcs = 0x4087ffb8; +g_coa_funcs_p = 0x4087ffb4; +g_coex_param_ptr = 0x4087ffb0; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.eco3.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.eco3.ld new file mode 100644 index 0000000000..c7f10134f2 --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.eco3.ld @@ -0,0 +1,138 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* +ESP32C6 ECO3 ROM address table +Version 3 API's imported from the ROM +*/ + +esf_buf_alloc_dynamic = 0x400015c0; +esf_buf_recycle = 0x400015c4; +/*lmacTxDone = 0x4000162c;*/ +/*ppMapTxQueue = 0x400016d8;*/ +rcGetSched = 0x40001764; +wDevCheckBlockError = 0x400017b4; +/*ppProcTxDone = 0x40001804;*/ +sta_input = rom_sta_input; + +/*************************************** + Group rom_phy + ***************************************/ + +/* Functions */ +rom_index_to_txbbgain = 0x40001964; +rom_pbus_xpd_tx_on = 0x400019b0; +rom_set_tx_dig_gain = 0x400019f0; +rom_set_txcap_reg = 0x400019f4; +rom_txbbgain_to_index = 0x40001a0c; +rom_agc_reg_init = 0x40001a54; +rom_bb_reg_init = 0x40001a58; +rom_set_pbus_reg = 0x40001a70; +rom_phy_xpd_rf = 0x40001a78; +rom_write_txrate_power_offset = 0x40001a8c; +rom_temp_to_power = 0x40001ab4; +rom_open_i2c_xpd = 0x40001af8; +rom_tsens_read_init = 0x40001b00; +rom_tsens_code_read = 0x40001b04; +rom_tsens_dac_cal = 0x40001b10; +rom_pll_vol_cal = 0x40001b28; + +/*************************************** + Group eco3_wifi + ***************************************/ + +/* Functions */ +wdev_is_data_in_rxlist = 0x40001b2c; +ppProcTxCallback = 0x40001b30; +ieee80211_gettid = 0x40001b34; + + +/*************************************** + Group eco3_bluetooth + ***************************************/ + +/* Functions */ +r_lld_legacy_adv_dynamic_pti_get = 0x40001b38; +r_lld_legacy_adv_dynamic_pti_process = 0x40001b3c; +r_lld_ext_adv_dynamic_pti_get = 0x40001b40; +r_lld_ext_adv_dynamic_aux_pti_process = 0x40001b44; +r_lld_ext_adv_dynamic_pti_process = 0x40001b48; +r_lld_adv_ext_pkt_prepare_set = 0x40001b4c; +r_lld_adv_ext_chain_none_construct = 0x40001b50; +r_lld_adv_ext_chain_connectable_construct = 0x40001b54; +r_lld_adv_ext_chain_scannable_construct = 0x40001b58; +r_lld_adv_pkt_rx_connect_post = 0x40001b5c; +r_lld_adv_start_init_evt_param = 0x40001b60; +r_lld_adv_start_set_cs = 0x40001b64; +r_lld_adv_start_update_filter_policy = 0x40001b68; +r_lld_adv_start_schedule_asap = 0x40001b6c; +r_lld_con_tx_prog_new_packet_coex = 0x40001b70; +r_lld_con_tx_prog_new_packet = 0x40001b74; +r_lld_per_adv_dynamic_pti_get = 0x40001b78; +r_lld_per_adv_evt_start_chm_upd = 0x40001b7c; +r_lld_ext_scan_dynamic_pti_get = 0x40001b80; +r_lld_scan_try_sched = 0x40001b84; +r_lld_sync_insert = 0x40001b88; +r_sch_prog_ble_push = 0x40001b8c; +r_sch_prog_bt_push = 0x40001b90; +r_lld_init_evt_end_type_set = 0x40001b94; +r_lld_init_evt_end_type_get = 0x40001b98; +r_lld_adv_direct_adv_use_rpa_addr_state_set = 0x40001b9c; +r_lld_adv_direct_adv_use_rpa_addr_state_get = 0x40001ba0; +r_lld_init_evt_end_type_check_state_set = 0x40001ba4; +r_lld_init_evt_end_type_check_state_get = 0x40001ba8; + + +/*************************************** + Group eco3_phy + ***************************************/ + +/* Functions */ +rom_wrtie_pll_cap = 0x40001bac; +rom_set_tx_gain_mem = 0x40001bb0; +rom_bt_tx_dig_gain = 0x40001bb4; +rom_bt_get_tx_gain = 0x40001bb8; +rom_get_chan_target_power = 0x40001bbc; +rom_get_tx_gain_value = 0x40001bc0; +rom_wifi_tx_dig_gain = 0x40001bc4; +rom_wifi_get_tx_gain = 0x40001bc8; +rom_fe_i2c_reg_renew = 0x40001bcc; +rom_wifi_agc_sat_gain = 0x40001bd0; +rom_i2c_master_reset = 0x40001bd4; +rom_bt_filter_reg = 0x40001bd8; +rom_phy_bbpll_cal = 0x40001bdc; +rom_i2c_sar2_init_code = 0x40001be0; +rom_phy_param_addr = 0x40001be4; +rom_phy_reg_init = 0x40001be8; +rom_set_chan_reg = 0x40001bec; +rom_phy_wakeup_init = 0x40001bf0; +rom_phy_i2c_init1 = 0x40001bf4; +rom_tsens_temp_read = 0x40001bf8; +rom_bt_track_pll_cap = 0x40001bfc; +rom_wifi_track_pll_cap = 0x40001c00; +rom_wifi_set_tx_gain = 0x40001c04; +rom_txpwr_cal_track = 0x40001c08; +rom_tx_pwctrl_background = 0x40001c0c; +rom_bt_set_tx_gain = 0x40001c10; +rom_noise_check_loop = 0x40001c14; +rom_phy_close_rf = 0x40001c18; +rom_phy_xpd_tsens = 0x40001c1c; +rom_phy_freq_mem_backup = 0x40001c20; +rom_phy_ant_init = 0x40001c24; +rom_bt_track_tx_power = 0x40001c28; +rom_wifi_track_tx_power = 0x40001c2c; +rom_phy_dig_reg_backup = 0x40001c30; +chip726_phyrom_version_num = 0x40001c34; +/* Data (.data, .bss, .rodata) */ +phy_param_rom = 0x3fcdf830; + +/*************************************** + Group eco3_esp_flash + ***************************************/ + +/* Functions */ +PROVIDE( esp_flash_read_chip_id = 0x40001c38 ); +PROVIDE( detect_spi_flash_chip = 0x40001c3c ); +PROVIDE( esp_rom_spiflash_write_disable = 0x40001c40 ); diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.heap.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.heap.ld new file mode 100644 index 0000000000..f230f9395f --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.heap.ld @@ -0,0 +1,80 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.heap.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group heap + ***************************************/ + +/* Functions */ +tlsf_create = 0x400003fc; +tlsf_create_with_pool = 0x40000400; +tlsf_get_pool = 0x40000404; +tlsf_add_pool = 0x40000408; +tlsf_remove_pool = 0x4000040c; +tlsf_malloc = 0x40000410; +tlsf_memalign = 0x40000414; +tlsf_memalign_offs = 0x40000418; +tlsf_realloc = 0x4000041c; +tlsf_free = 0x40000420; +tlsf_block_size = 0x40000424; +tlsf_size = 0x40000428; +tlsf_align_size = 0x4000042c; +tlsf_block_size_min = 0x40000430; +tlsf_block_size_max = 0x40000434; +tlsf_pool_overhead = 0x40000438; +tlsf_alloc_overhead = 0x4000043c; +tlsf_walk_pool = 0x40000440; +tlsf_check = 0x40000444; +tlsf_check_pool = 0x40000448; +tlsf_poison_fill_pfunc_set = 0x4000044c; +tlsf_poison_check_pfunc_set = 0x40000450; +multi_heap_get_block_address_impl = 0x40000454; +multi_heap_get_allocated_size_impl = 0x40000458; +multi_heap_register_impl = 0x4000045c; +multi_heap_set_lock = 0x40000460; +multi_heap_os_funcs_init = 0x40000464; +multi_heap_internal_lock = 0x40000468; +multi_heap_internal_unlock = 0x4000046c; +multi_heap_get_first_block = 0x40000470; +multi_heap_get_next_block = 0x40000474; +multi_heap_is_free = 0x40000478; +multi_heap_malloc_impl = 0x4000047c; +multi_heap_free_impl = 0x40000480; +multi_heap_realloc_impl = 0x40000484; +multi_heap_aligned_alloc_impl_offs = 0x40000488; +multi_heap_aligned_alloc_impl = 0x4000048c; +multi_heap_check = 0x40000490; +multi_heap_dump = 0x40000494; +multi_heap_free_size_impl = 0x40000498; +multi_heap_minimum_free_size_impl = 0x4000049c; +multi_heap_get_info_impl = 0x400004a0; +/* Data (.data, .bss, .rodata) */ +heap_tlsf_table_ptr = 0x4087ffd8; + +PROVIDE (multi_heap_malloc = multi_heap_malloc_impl); +PROVIDE (multi_heap_free = multi_heap_free_impl); +PROVIDE (multi_heap_realloc = multi_heap_realloc_impl); +PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl); +PROVIDE (multi_heap_register = multi_heap_register_impl); +PROVIDE (multi_heap_get_info = multi_heap_get_info_impl); +PROVIDE (multi_heap_free_size = multi_heap_free_size_impl); +PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl); +PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl); +PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl); +PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl); +PROVIDE (multi_heap_check = multi_heap_check); +PROVIDE (multi_heap_set_lock = multi_heap_set_lock); +PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock); +PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock); diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.ld new file mode 100644 index 0000000000..b2ef4bb339 --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.ld @@ -0,0 +1,476 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group common + ***************************************/ + +/* Functions */ +rtc_get_reset_reason = 0x40000018; +analog_super_wdt_reset_happened = 0x4000001c; +rtc_get_wakeup_cause = 0x40000020; +rtc_unhold_all_pads = 0x40000024; +ets_printf = 0x40000028; +ets_install_putc1 = 0x4000002c; +ets_install_putc2 = 0x40000030; +ets_install_uart_printf = 0x40000034; +ets_install_usb_printf = 0x40000038; +ets_get_printf_channel = 0x4000003c; +ets_delay_us = 0x40000040; +ets_get_cpu_frequency = 0x40000044; +ets_update_cpu_frequency = 0x40000048; +ets_install_lock = 0x4000004c; +UartRxString = 0x40000050; +UartGetCmdLn = 0x40000054; +uart_tx_one_char = 0x40000058; +uart_tx_one_char2 = 0x4000005c; +uart_rx_one_char = 0x40000060; +uart_rx_one_char_block = 0x40000064; +uart_rx_intr_handler = 0x40000068; +uart_rx_readbuff = 0x4000006c; +uartAttach = 0x40000070; +uart_tx_flush = 0x40000074; +uart_tx_wait_idle = 0x40000078; +uart_div_modify = 0x4000007c; +ets_write_char_uart = 0x40000080; +uart_tx_switch = 0x40000084; +roundup2 = 0x40000088; +multofup = 0x4000008c; +software_reset = 0x40000090; +software_reset_cpu = 0x40000094; +ets_clk_assist_debug_clock_enable = 0x40000098; +clear_super_wdt_reset_flag = 0x4000009c; +disable_default_watchdog = 0x400000a0; +esp_rom_set_rtc_wake_addr = 0x400000a4; +esp_rom_get_rtc_wake_addr = 0x400000a8; +send_packet = 0x400000ac; +recv_packet = 0x400000b0; +GetUartDevice = 0x400000b4; +UartDwnLdProc = 0x400000b8; +GetSecurityInfoProc = 0x400000bc; +Uart_Init = 0x400000c0; +ets_set_user_start = 0x400000c4; +/* Data (.data, .bss, .rodata) */ +ets_rom_layout_p = 0x4004fffc; +ets_ops_table_ptr = 0x4087fff8; +g_saved_pc = 0x4087fffc; + + +/*************************************** + Group miniz + ***************************************/ + +/* Functions */ +mz_adler32 = 0x400000c8; +mz_free = 0x400000cc; +tdefl_compress = 0x400000d0; +tdefl_compress_buffer = 0x400000d4; +tdefl_compress_mem_to_heap = 0x400000d8; +tdefl_compress_mem_to_mem = 0x400000dc; +tdefl_compress_mem_to_output = 0x400000e0; +tdefl_get_adler32 = 0x400000e4; +tdefl_get_prev_return_status = 0x400000e8; +tdefl_init = 0x400000ec; +tdefl_write_image_to_png_file_in_memory = 0x400000f0; +tdefl_write_image_to_png_file_in_memory_ex = 0x400000f4; +tinfl_decompress = 0x400000f8; +tinfl_decompress_mem_to_callback = 0x400000fc; +tinfl_decompress_mem_to_heap = 0x40000100; +tinfl_decompress_mem_to_mem = 0x40000104; + + +/*************************************** + Group tjpgd + ***************************************/ + +/* Functions */ +jd_prepare = 0x40000108; +jd_decomp = 0x4000010c; + + +/*************************************** + Group spiflash_legacy + ***************************************/ + +/* Functions */ +esp_rom_spiflash_wait_idle = 0x40000110; +esp_rom_spiflash_write_encrypted = 0x40000114; +esp_rom_spiflash_write_encrypted_dest = 0x40000118; +esp_rom_spiflash_write_encrypted_enable = 0x4000011c; +esp_rom_spiflash_write_encrypted_disable = 0x40000120; +esp_rom_spiflash_erase_chip = 0x40000124; +_esp_rom_spiflash_erase_sector = 0x40000128; +_esp_rom_spiflash_erase_block = 0x4000012c; +_esp_rom_spiflash_write = 0x40000130; +_esp_rom_spiflash_read = 0x40000134; +_esp_rom_spiflash_unlock = 0x40000138; +_SPIEraseArea = 0x4000013c; +_SPI_write_enable = 0x40000140; +esp_rom_spiflash_erase_sector = 0x40000144; +esp_rom_spiflash_erase_block = 0x40000148; +esp_rom_spiflash_write = 0x4000014c; +esp_rom_spiflash_read = 0x40000150; +esp_rom_spiflash_unlock = 0x40000154; +SPIEraseArea = 0x40000158; +SPI_write_enable = 0x4000015c; +esp_rom_spiflash_config_param = 0x40000160; +esp_rom_spiflash_read_user_cmd = 0x40000164; +esp_rom_spiflash_select_qio_pins = 0x40000168; +esp_rom_spi_flash_auto_sus_res = 0x4000016c; +esp_rom_spi_flash_send_resume = 0x40000170; +esp_rom_spi_flash_update_id = 0x40000174; +esp_rom_spiflash_config_clk = 0x40000178; +esp_rom_spiflash_config_readmode = 0x4000017c; +esp_rom_spiflash_read_status = 0x40000180; +esp_rom_spiflash_read_statushigh = 0x40000184; +esp_rom_spiflash_write_status = 0x40000188; +spi_cache_mode_switch = 0x4000018c; +spi_common_set_dummy_output = 0x40000190; +spi_common_set_flash_cs_timing = 0x40000194; +esp_rom_spi_set_address_bit_len = 0x40000198; +SPILock = 0x4000019c; +SPIMasterReadModeCnfig = 0x400001a0; +SPI_Common_Command = 0x400001a4; +SPI_WakeUp = 0x400001a8; +SPI_block_erase = 0x400001ac; +SPI_chip_erase = 0x400001b0; +SPI_init = 0x400001b4; +SPI_page_program = 0x400001b8; +SPI_read_data = 0x400001bc; +SPI_sector_erase = 0x400001c0; +SelectSpiFunction = 0x400001c4; +SetSpiDrvs = 0x400001c8; +Wait_SPI_Idle = 0x400001cc; +spi_dummy_len_fix = 0x400001d0; +Disable_QMode = 0x400001d4; +Enable_QMode = 0x400001d8; +spi_flash_attach = 0x400001dc; +spi_flash_get_chip_size = 0x400001e0; +spi_flash_guard_set = 0x400001e4; +spi_flash_guard_get = 0x400001e8; +spi_flash_read_encrypted = 0x400001ec; +/* Data (.data, .bss, .rodata) */ +rom_spiflash_legacy_funcs = 0x4087fff0; +rom_spiflash_legacy_data = 0x4087ffec; +g_flash_guard_ops = 0x4087fff4; + + +/*************************************** + Group hal_wdt + ***************************************/ + +/* Functions */ +wdt_hal_init = 0x40000394; +wdt_hal_deinit = 0x40000398; +wdt_hal_config_stage = 0x4000039c; +wdt_hal_write_protect_disable = 0x400003a0; +wdt_hal_write_protect_enable = 0x400003a4; +wdt_hal_enable = 0x400003a8; +wdt_hal_disable = 0x400003ac; +wdt_hal_handle_intr = 0x400003b0; +wdt_hal_feed = 0x400003b4; +wdt_hal_set_flashboot_en = 0x400003b8; +wdt_hal_is_enabled = 0x400003bc; + + +/*************************************** + Group hal_systimer + ***************************************/ + +/* Functions */ +systimer_hal_init = 0x400003c0; +systimer_hal_deinit = 0x400003c4; +systimer_hal_set_tick_rate_ops = 0x400003c8; +systimer_hal_get_counter_value = 0x400003cc; +systimer_hal_get_time = 0x400003d0; +systimer_hal_set_alarm_target = 0x400003d4; +systimer_hal_set_alarm_period = 0x400003d8; +systimer_hal_get_alarm_value = 0x400003dc; +systimer_hal_enable_alarm_int = 0x400003e0; +systimer_hal_on_apb_freq_update = 0x400003e4; +systimer_hal_counter_value_advance = 0x400003e8; +systimer_hal_enable_counter = 0x400003ec; +systimer_hal_select_alarm_mode = 0x400003f0; +systimer_hal_connect_alarm_counter = 0x400003f4; +systimer_hal_counter_can_stall_by_cpu = 0x400003f8; + + +/*************************************** + Group cache + ***************************************/ + +/* Functions */ +Cache_Get_ICache_Line_Size = 0x40000628; +Cache_Get_Mode = 0x4000062c; +Cache_Address_Through_Cache = 0x40000630; +ROM_Boot_Cache_Init = 0x40000634; +MMU_Set_Page_Mode = 0x40000638; +MMU_Get_Page_Mode = 0x4000063c; +Cache_Invalidate_ICache_Items = 0x40000640; +Cache_Op_Addr = 0x40000644; +Cache_Invalidate_Addr = 0x40000648; +Cache_Invalidate_ICache_All = 0x4000064c; +Cache_Mask_All = 0x40000650; +Cache_UnMask_Dram0 = 0x40000654; +Cache_Suspend_ICache_Autoload = 0x40000658; +Cache_Resume_ICache_Autoload = 0x4000065c; +Cache_Start_ICache_Preload = 0x40000660; +Cache_ICache_Preload_Done = 0x40000664; +Cache_End_ICache_Preload = 0x40000668; +Cache_Config_ICache_Autoload = 0x4000066c; +Cache_Enable_ICache_Autoload = 0x40000670; +Cache_Disable_ICache_Autoload = 0x40000674; +Cache_Enable_ICache_PreLock = 0x40000678; +Cache_Disable_ICache_PreLock = 0x4000067c; +Cache_Lock_ICache_Items = 0x40000680; +Cache_Unlock_ICache_Items = 0x40000684; +Cache_Lock_Addr = 0x40000688; +Cache_Unlock_Addr = 0x4000068c; +Cache_Disable_ICache = 0x40000690; +Cache_Enable_ICache = 0x40000694; +Cache_Suspend_ICache = 0x40000698; +Cache_Resume_ICache = 0x4000069c; +Cache_Freeze_ICache_Enable = 0x400006a0; +Cache_Freeze_ICache_Disable = 0x400006a4; +Cache_Set_IDROM_MMU_Size = 0x400006a8; +Cache_Get_IROM_MMU_End = 0x400006ac; +Cache_Get_DROM_MMU_End = 0x400006b0; +Cache_MMU_Init = 0x400006b4; +Cache_MSPI_MMU_Set = 0x400006b8; +Cache_Travel_Tag_Memory = 0x400006bc; +Cache_Get_Virtual_Addr = 0x400006c0; +/* Data (.data, .bss, .rodata) */ +rom_cache_op_cb = 0x4087ffcc; +rom_cache_internal_table_ptr = 0x4087ffc8; + + +/*************************************** + Group clock + ***************************************/ + +/* Functions */ +ets_clk_get_xtal_freq = 0x400006c4; +ets_clk_get_cpu_freq = 0x400006c8; +ets_clk_apb_wait_ready = 0x400006cc; +ets_clk_mspi_apb_wait_ready = 0x400006d0; + + +/*************************************** + Group gpio + ***************************************/ + +/* Functions */ +gpio_input_get = 0x400006d4; +gpio_matrix_in = 0x400006d8; +gpio_matrix_out = 0x400006dc; +gpio_output_disable = 0x400006e0; +gpio_output_enable = 0x400006e4; +gpio_output_set = 0x400006e8; +gpio_pad_hold = 0x400006ec; +gpio_pad_input_disable = 0x400006f0; +gpio_pad_input_enable = 0x400006f4; +gpio_pad_pulldown = 0x400006f8; +gpio_pad_pullup = 0x400006fc; +gpio_pad_select_gpio = 0x40000700; +gpio_pad_set_drv = 0x40000704; +gpio_pad_unhold = 0x40000708; +gpio_pin_wakeup_disable = 0x4000070c; +gpio_pin_wakeup_enable = 0x40000710; +gpio_bypass_matrix_in = 0x40000714; + + +/*************************************** + Group interrupts + ***************************************/ + +/* Functions */ +esprv_intc_int_set_priority = 0x40000718; +esprv_intc_int_set_threshold = 0x4000071c; +esprv_intc_int_enable = 0x40000720; +esprv_intc_int_disable = 0x40000724; +esprv_intc_int_set_type = 0x40000728; +PROVIDE( intr_handler_set = 0x4000072c ); +intr_matrix_set = 0x40000730; +ets_intr_lock = 0x40000734; +ets_intr_unlock = 0x40000738; +ets_isr_attach = 0x4000073c; +ets_isr_mask = 0x40000740; +ets_isr_unmask = 0x40000744; + + +/*************************************** + Group crypto + ***************************************/ + +/* Functions */ +md5_vector = 0x40000748; +MD5Init = 0x4000074c; +MD5Update = 0x40000750; +MD5Final = 0x40000754; +crc32_le = 0x40000758; +crc16_le = 0x4000075c; +crc8_le = 0x40000760; +crc32_be = 0x40000764; +crc16_be = 0x40000768; +crc8_be = 0x4000076c; +esp_crc8 = 0x40000770; +ets_sha_enable = 0x40000774; +ets_sha_disable = 0x40000778; +ets_sha_get_state = 0x4000077c; +ets_sha_init = 0x40000780; +ets_sha_process = 0x40000784; +ets_sha_starts = 0x40000788; +ets_sha_update = 0x4000078c; +ets_sha_finish = 0x40000790; +ets_sha_clone = 0x40000794; +ets_hmac_enable = 0x40000798; +ets_hmac_disable = 0x4000079c; +ets_hmac_calculate_message = 0x400007a0; +ets_hmac_calculate_downstream = 0x400007a4; +ets_hmac_invalidate_downstream = 0x400007a8; +ets_jtag_enable_temporarily = 0x400007ac; +ets_aes_enable = 0x400007b0; +ets_aes_disable = 0x400007b4; +ets_aes_setkey = 0x400007b8; +ets_aes_block = 0x400007bc; +ets_aes_setkey_dec = 0x400007c0; +ets_aes_setkey_enc = 0x400007c4; +ets_bigint_enable = 0x400007c8; +ets_bigint_disable = 0x400007cc; +ets_bigint_multiply = 0x400007d0; +ets_bigint_modmult = 0x400007d4; +ets_bigint_modexp = 0x400007d8; +ets_bigint_wait_finish = 0x400007dc; +ets_bigint_getz = 0x400007e0; +ets_ds_enable = 0x400007e4; +ets_ds_disable = 0x400007e8; +ets_ds_start_sign = 0x400007ec; +ets_ds_is_busy = 0x400007f0; +ets_ds_finish_sign = 0x400007f4; +ets_ds_encrypt_params = 0x400007f8; +ets_mgf1_sha256 = 0x400007fc; +/* Data (.data, .bss, .rodata) */ +crc32_le_table_ptr = 0x4004fff8; +crc16_le_table_ptr = 0x4004fff4; +crc8_le_table_ptr = 0x4004fff0; +crc32_be_table_ptr = 0x4004ffec; +crc16_be_table_ptr = 0x4004ffe8; +crc8_be_table_ptr = 0x4004ffe4; + + +/*************************************** + Group efuse + ***************************************/ + +/* Functions */ +ets_efuse_read = 0x40000800; +ets_efuse_program = 0x40000804; +ets_efuse_clear_program_registers = 0x40000808; +ets_efuse_write_key = 0x4000080c; +ets_efuse_get_read_register_address = 0x40000810; +ets_efuse_get_key_purpose = 0x40000814; +ets_efuse_key_block_unused = 0x40000818; +ets_efuse_find_unused_key_block = 0x4000081c; +ets_efuse_rs_calculate = 0x40000820; +ets_efuse_count_unused_key_blocks = 0x40000824; +ets_efuse_secure_boot_enabled = 0x40000828; +ets_efuse_secure_boot_aggressive_revoke_enabled = 0x4000082c; +ets_efuse_cache_encryption_enabled = 0x40000830; +ets_efuse_download_modes_disabled = 0x40000834; +ets_efuse_find_purpose = 0x40000838; +ets_efuse_force_send_resume = 0x4000083c; +ets_efuse_get_flash_delay_us = 0x40000840; +ets_efuse_get_mac = 0x40000844; +ets_efuse_get_uart_print_control = 0x40000848; +ets_efuse_direct_boot_mode_disabled = 0x4000084c; +ets_efuse_security_download_modes_enabled = 0x40000850; +ets_efuse_set_timing = 0x40000854; +ets_efuse_jtag_disabled = 0x40000858; +ets_efuse_usb_print_is_disabled = 0x4000085c; +ets_efuse_usb_download_mode_disabled = 0x40000860; +ets_efuse_usb_device_disabled = 0x40000864; +ets_efuse_secure_boot_fast_wake_enabled = 0x40000868; + + +/*************************************** + Group secureboot + ***************************************/ + +/* Functions */ +ets_emsa_pss_verify = 0x4000086c; +ets_rsa_pss_verify = 0x40000870; +ets_secure_boot_verify_bootloader_with_keys = 0x40000874; +ets_secure_boot_verify_signature = 0x40000878; +ets_secure_boot_read_key_digests = 0x4000087c; +ets_secure_boot_revoke_public_key_digest = 0x40000880; + + +/*************************************** + Group usb_device_uart + ***************************************/ + +/* Functions */ +usb_serial_device_rx_one_char = 0x40000a80; +usb_serial_device_rx_one_char_block = 0x40000a84; +usb_serial_device_tx_flush = 0x40000a88; +usb_serial_device_tx_one_char = 0x40000a8c; + + +/*************************************** + Group lldesc + ***************************************/ + +/* Functions */ +lldesc_build_chain = 0x40000a90; + + +/*************************************** + Group sip + ***************************************/ + +/* Functions */ +sip_after_tx_complete = 0x40000a94; +sip_alloc_to_host_evt = 0x40000a98; +sip_download_begin = 0x40000a9c; +sip_get_ptr = 0x40000aa0; +sip_get_state = 0x40000aa4; +sip_init_attach = 0x40000aa8; +sip_install_rx_ctrl_cb = 0x40000aac; +sip_install_rx_data_cb = 0x40000ab0; +sip_is_active = 0x40000ab4; +sip_post_init = 0x40000ab8; +sip_reclaim_from_host_cmd = 0x40000abc; +sip_reclaim_tx_data_pkt = 0x40000ac0; +sip_send = 0x40000ac4; +sip_to_host_chain_append = 0x40000ac8; +sip_to_host_evt_send_done = 0x40000acc; + + +/*************************************** + Group slc + ***************************************/ + +/* Functions */ +slc_add_credits = 0x40000ad0; +slc_enable = 0x40000ad4; +slc_from_host_chain_fetch = 0x40000ad8; +slc_from_host_chain_recycle = 0x40000adc; +slc_has_pkt_to_host = 0x40000ae0; +slc_init_attach = 0x40000ae4; +slc_init_credit = 0x40000ae8; +slc_reattach = 0x40000aec; +slc_send_to_host_chain = 0x40000af0; +slc_set_host_io_max_window = 0x40000af4; +slc_to_host_chain_recycle = 0x40000af8; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.libgcc.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.libgcc.ld new file mode 100644 index 0000000000..cef6efcb2a --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.libgcc.ld @@ -0,0 +1,112 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.libgcc.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group libgcc + ***************************************/ + +/* Functions */ +__absvdi2 = 0x40000884; +__absvsi2 = 0x40000888; +__adddf3 = 0x4000088c; +__addsf3 = 0x40000890; +__addvdi3 = 0x40000894; +__addvsi3 = 0x40000898; +__ashldi3 = 0x4000089c; +__ashrdi3 = 0x400008a0; +__bswapdi2 = 0x400008a4; +__bswapsi2 = 0x400008a8; +__clear_cache = 0x400008ac; +__clrsbdi2 = 0x400008b0; +__clrsbsi2 = 0x400008b4; +__clzdi2 = 0x400008b8; +__clzsi2 = 0x400008bc; +__cmpdi2 = 0x400008c0; +__ctzdi2 = 0x400008c4; +__ctzsi2 = 0x400008c8; +__divdc3 = 0x400008cc; +__divdf3 = 0x400008d0; +__divdi3 = 0x400008d4; +__divsc3 = 0x400008d8; +__divsf3 = 0x400008dc; +__divsi3 = 0x400008e0; +__eqdf2 = 0x400008e4; +__eqsf2 = 0x400008e8; +__extendsfdf2 = 0x400008ec; +__ffsdi2 = 0x400008f0; +__ffssi2 = 0x400008f4; +__fixdfdi = 0x400008f8; +__fixdfsi = 0x400008fc; +__fixsfdi = 0x40000900; +__fixsfsi = 0x40000904; +__fixunsdfsi = 0x40000908; +__fixunssfdi = 0x4000090c; +__fixunssfsi = 0x40000910; +__floatdidf = 0x40000914; +__floatdisf = 0x40000918; +__floatsidf = 0x4000091c; +__floatsisf = 0x40000920; +__floatundidf = 0x40000924; +__floatundisf = 0x40000928; +__floatunsidf = 0x4000092c; +__floatunsisf = 0x40000930; +__gcc_bcmp = 0x40000934; +__gedf2 = 0x40000938; +__gesf2 = 0x4000093c; +__gtdf2 = 0x40000940; +__gtsf2 = 0x40000944; +__ledf2 = 0x40000948; +__lesf2 = 0x4000094c; +__lshrdi3 = 0x40000950; +__ltdf2 = 0x40000954; +__ltsf2 = 0x40000958; +__moddi3 = 0x4000095c; +__modsi3 = 0x40000960; +__muldc3 = 0x40000964; +__muldf3 = 0x40000968; +__muldi3 = 0x4000096c; +__mulsc3 = 0x40000970; +__mulsf3 = 0x40000974; +__mulsi3 = 0x40000978; +__mulvdi3 = 0x4000097c; +__mulvsi3 = 0x40000980; +__nedf2 = 0x40000984; +__negdf2 = 0x40000988; +__negdi2 = 0x4000098c; +__negsf2 = 0x40000990; +__negvdi2 = 0x40000994; +__negvsi2 = 0x40000998; +__nesf2 = 0x4000099c; +__paritysi2 = 0x400009a0; +__popcountdi2 = 0x400009a4; +__popcountsi2 = 0x400009a8; +__powidf2 = 0x400009ac; +__powisf2 = 0x400009b0; +__subdf3 = 0x400009b4; +__subsf3 = 0x400009b8; +__subvdi3 = 0x400009bc; +__subvsi3 = 0x400009c0; +__truncdfsf2 = 0x400009c4; +__ucmpdi2 = 0x400009c8; +__udivdi3 = 0x400009cc; +__udivmoddi4 = 0x400009d0; +__udivsi3 = 0x400009d4; +__udiv_w_sdiv = 0x400009d8; +__umoddi3 = 0x400009dc; +__umodsi3 = 0x400009e0; +__unorddf2 = 0x400009e4; +__unordsf2 = 0x400009e8; +__extenddftf2 = 0x400009ec; +__trunctfdf2 = 0x400009f0; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.net80211.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.net80211.ld new file mode 100644 index 0000000000..2266dea1d8 --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.net80211.ld @@ -0,0 +1,65 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.net80211.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group rom_net80211 + ***************************************/ + +/* Functions */ +esp_net80211_rom_version_get = 0x40000b4c; +ampdu_dispatch = 0x40000b50; +ampdu_dispatch_all = 0x40000b54; +ampdu_dispatch_as_many_as_possible = 0x40000b58; +ampdu_dispatch_movement = 0x40000b5c; +ampdu_dispatch_upto = 0x40000b60; +chm_is_at_home_channel = 0x40000b64; +cnx_node_is_existing = 0x40000b68; +cnx_node_search = 0x40000b6c; +ic_ebuf_recycle_rx = 0x40000b70; +ic_ebuf_recycle_tx = 0x40000b74; +ic_reset_rx_ba = 0x40000b78; +ieee80211_align_eb = 0x40000b7c; +ieee80211_ampdu_reorder = 0x40000b80; +ieee80211_ampdu_start_age_timer = 0x40000b84; +ieee80211_encap_esfbuf = 0x40000b88; +ieee80211_is_tx_allowed = 0x40000b8c; +ieee80211_output_pending_eb = 0x40000b90; +ieee80211_output_process = 0x40000b94; +ieee80211_set_tx_desc = 0x40000b98; +sta_input = 0x40000b9c; +wifi_get_macaddr = 0x40000ba0; +wifi_rf_phy_disable = 0x40000ba4; +wifi_rf_phy_enable = 0x40000ba8; +ic_ebuf_alloc = 0x40000bac; +ieee80211_classify = 0x40000bb0; +ieee80211_copy_eb_header = 0x40000bb4; +ieee80211_recycle_cache_eb = 0x40000bb8; +ieee80211_search_node = 0x40000bbc; +ieee80211_crypto_encap = 0x40000bc0; +ieee80211_crypto_decap = 0x40000bc4; +ieee80211_decap = 0x40000bc8; +ieee80211_set_tx_pti = 0x40000bcc; +wifi_is_started = 0x40000bd0; +ieee80211_gettid = 0x40000bd4; +/* Data (.data, .bss, .rodata) */ +net80211_funcs = 0x4087ffac; +g_scan = 0x4087ffa8; +g_chm = 0x4087ffa4; +g_ic_ptr = 0x4087ffa0; +g_hmac_cnt_ptr = 0x4087ff9c; +g_tx_cacheq_ptr = 0x4087ff98; +s_netstack_free = 0x4087ff94; +mesh_rxcb = 0x4087ff90; +sta_rxcb = 0x4087ff8c; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-nano.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-nano.ld new file mode 100644 index 0000000000..ceb70b0fd5 --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-nano.ld @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.newlib-nano.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum ff3b116f1987b5a5433645b8f7947f32 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group newlib_nano_format + ***************************************/ + +/* Functions */ +__sprint_r = 0x400005c8; +_fiprintf_r = 0x400005cc; +_fprintf_r = 0x400005d0; +_printf_common = 0x400005d4; +_printf_i = 0x400005d8; +_vfiprintf_r = 0x400005dc; +_vfprintf_r = 0x400005e0; +fiprintf = 0x400005e4; +fprintf = 0x400005e8; +printf = 0x400005ec; +vfiprintf = 0x400005f0; +vfprintf = 0x400005f4; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-normal.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-normal.ld new file mode 100644 index 0000000000..34ecf22bcc --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-normal.ld @@ -0,0 +1,41 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.newlib-normal.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group newlib_normal_format + ***************************************/ + +/* Functions */ +__sprint_r = 0x400005d4; +_fiprintf_r = 0x400005d8; +_fprintf_r = 0x400005dc; +_vfiprintf_r = 0x400005e0; +_vfprintf_r = 0x400005e4; +fiprintf = 0x400005e8; +fprintf = 0x400005ec; +printf = 0x400005f0; +vfiprintf = 0x400005f4; +vfprintf = 0x400005f8; +asprintf = 0x400005fc; +sprintf = 0x40000600; +snprintf = 0x40000604; +siprintf = 0x40000608; +sniprintf = 0x4000060c; +vprintf = 0x40000610; +viprintf = 0x40000614; +vsnprintf = 0x40000618; +vsniprintf = 0x4000061c; +sscanf = 0x40000620; +siscanf = 0x40000624; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-time.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-time.ld new file mode 100644 index 0000000000..27734ced89 --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-time.ld @@ -0,0 +1,15 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* These are the newlib functions and the .bss/.data symbols which are related to 'time_t' + or other structures which include 'time_t' (like 'struct stat'). + These ROM functions were compiled with sizeof(time_t) == 4. + When compiling with sizeof(time_t) == 8, these functions should be excluded from the build. + */ + +_isatty_r = 0x40000380; +PROVIDE( __smakebuf_r = 0x4000046c ); +PROVIDE( __swhatbuf_r = 0x40000470 ); +PROVIDE( __swsetup_r = 0x4000047c ); diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib.ld new file mode 100644 index 0000000000..b90d323d4a --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.newlib.ld @@ -0,0 +1,99 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.newlib.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group newlib + ***************************************/ + +/* Functions */ +esp_rom_newlib_init_common_mutexes = 0x400004a4; +memset = 0x400004a8; +memcpy = 0x400004ac; +memmove = 0x400004b0; +memcmp = 0x400004b4; +strcpy = 0x400004b8; +strncpy = 0x400004bc; +strcmp = 0x400004c0; +strncmp = 0x400004c4; +strlen = 0x400004c8; +strstr = 0x400004cc; +bzero = 0x400004d0; +_isatty_r = 0x400004d4; +sbrk = 0x400004d8; +isalnum = 0x400004dc; +isalpha = 0x400004e0; +isascii = 0x400004e4; +isblank = 0x400004e8; +iscntrl = 0x400004ec; +isdigit = 0x400004f0; +islower = 0x400004f4; +isgraph = 0x400004f8; +isprint = 0x400004fc; +ispunct = 0x40000500; +isspace = 0x40000504; +isupper = 0x40000508; +toupper = 0x4000050c; +tolower = 0x40000510; +toascii = 0x40000514; +memccpy = 0x40000518; +memchr = 0x4000051c; +memrchr = 0x40000520; +strcasecmp = 0x40000524; +strcasestr = 0x40000528; +strcat = 0x4000052c; +strdup = 0x40000530; +strchr = 0x40000534; +strcspn = 0x40000538; +strcoll = 0x4000053c; +strlcat = 0x40000540; +strlcpy = 0x40000544; +strlwr = 0x40000548; +strncasecmp = 0x4000054c; +strncat = 0x40000550; +strndup = 0x40000554; +strnlen = 0x40000558; +strrchr = 0x4000055c; +strsep = 0x40000560; +strspn = 0x40000564; +strtok_r = 0x40000568; +strupr = 0x4000056c; +longjmp = 0x40000570; +setjmp = 0x40000574; +abs = 0x40000578; +div = 0x4000057c; +labs = 0x40000580; +ldiv = 0x40000584; +qsort = 0x40000588; +rand_r = 0x4000058c; +rand = 0x40000590; +srand = 0x40000594; +utoa = 0x40000598; +itoa = 0x4000059c; +atoi = 0x400005a0; +atol = 0x400005a4; +strtol = 0x400005a8; +strtoul = 0x400005ac; +fflush = 0x400005b0; +_fflush_r = 0x400005b4; +_fwalk = 0x400005b8; +_fwalk_reent = 0x400005bc; +__smakebuf_r = 0x400005c0; +__swhatbuf_r = 0x400005c4; +__swbuf_r = 0x400005c8; +__swbuf = 0x400005cc; +__swsetup_r = 0x400005d0; +/* Data (.data, .bss, .rodata) */ +syscall_table_ptr = 0x4087ffd4; +_global_impure_ptr = 0x4087ffd0; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.phy.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.phy.ld new file mode 100644 index 0000000000..987316fe71 --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.phy.ld @@ -0,0 +1,196 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.phy.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group rom_phy + ***************************************/ + +/* Functions */ +phy_get_romfuncs = 0x40000e48; +rom_abs_temp = 0x40000e4c; +rom_bb_bss_cbw40_dig = 0x40000e50; +rom_bb_wdg_test_en = 0x40000e54; +rom_bb_wdt_get_status = 0x40000e58; +rom_bb_wdt_int_enable = 0x40000e5c; +rom_bb_wdt_rst_enable = 0x40000e60; +rom_bb_wdt_timeout_clear = 0x40000e64; +rom_cbw2040_cfg = 0x40000e68; +rom_check_noise_floor = 0x40000e6c; +rom_chip_i2c_readReg = 0x40000e70; +rom_chip_i2c_writeReg = 0x40000e74; +rom_correct_rf_ana_gain = 0x40000e78; +rom_dc_iq_est = 0x40000e7c; +rom_disable_agc = 0x40000e80; +rom_en_pwdet = 0x40000e84; +rom_enable_agc = 0x40000e88; +rom_get_bbgain_db = 0x40000e8c; +rom_get_data_sat = 0x40000e90; +rom_get_i2c_read_mask = 0x40000e94; +rom_get_pwctrl_correct = 0x40000e98; +rom_get_rf_gain_qdb = 0x40000e9c; +rom_i2c_readReg = 0x40000ea0; +rom_i2c_readReg_Mask = 0x40000ea4; +rom_i2c_writeReg = 0x40000ea8; +rom_i2c_writeReg_Mask = 0x40000eac; +rom_index_to_txbbgain = 0x40000eb0; +rom_iq_est_disable = 0x40000eb4; +rom_iq_est_enable = 0x40000eb8; +rom_linear_to_db = 0x40000ebc; +rom_loopback_mode_en = 0x40000ec0; +rom_mhz2ieee = 0x40000ec4; +rom_noise_floor_auto_set = 0x40000ec8; +rom_pbus_debugmode = 0x40000ecc; +rom_pbus_force_mode = 0x40000ed0; +rom_pbus_force_test = 0x40000ed4; +rom_pbus_rd = 0x40000ed8; +rom_pbus_rd_addr = 0x40000edc; +rom_pbus_rd_shift = 0x40000ee0; +rom_pbus_set_dco = 0x40000ee4; +rom_pbus_set_rxgain = 0x40000ee8; +rom_pbus_workmode = 0x40000eec; +rom_pbus_xpd_rx_off = 0x40000ef0; +rom_pbus_xpd_rx_on = 0x40000ef4; +rom_pbus_xpd_tx_off = 0x40000ef8; +rom_pbus_xpd_tx_on = 0x40000efc; +rom_phy_byte_to_word = 0x40000f00; +rom_phy_disable_cca = 0x40000f04; +rom_phy_enable_cca = 0x40000f08; +rom_phy_get_noisefloor = 0x40000f0c; +rom_phy_get_rx_freq = 0x40000f10; +rom_phy_set_bbfreq_init = 0x40000f14; +rom_pow_usr = 0x40000f18; +rom_pwdet_sar2_init = 0x40000f1c; +rom_read_hw_noisefloor = 0x40000f20; +rom_read_sar_dout = 0x40000f24; +rom_set_cal_rxdc = 0x40000f28; +rom_set_chan_cal_interp = 0x40000f2c; +rom_set_loopback_gain = 0x40000f30; +rom_set_noise_floor = 0x40000f34; +rom_set_rxclk_en = 0x40000f38; +rom_set_tx_dig_gain = 0x40000f3c; +rom_set_txcap_reg = 0x40000f40; +rom_set_txclk_en = 0x40000f44; +rom_spur_cal = 0x40000f48; +rom_spur_reg_write_one_tone = 0x40000f4c; +rom_target_power_add_backoff = 0x40000f50; +rom_tx_pwctrl_bg_init = 0x40000f54; +rom_txbbgain_to_index = 0x40000f58; +rom_wifi_11g_rate_chg = 0x40000f5c; +rom_write_gain_mem = 0x40000f60; +chip726_phyrom_version = 0x40000f64; +rom_disable_wifi_agc = 0x40000f68; +rom_enable_wifi_agc = 0x40000f6c; +rom_set_tx_gain_table = 0x40000f70; +rom_bt_index_to_bb = 0x40000f74; +rom_bt_bb_to_index = 0x40000f78; +rom_wr_bt_tx_atten = 0x40000f7c; +rom_wr_bt_tx_gain_mem = 0x40000f80; +rom_spur_coef_cfg = 0x40000f84; +rom_bb_bss_cbw40 = 0x40000f88; +rom_set_cca = 0x40000f8c; +rom_tx_paon_set = 0x40000f90; +rom_i2cmst_reg_init = 0x40000f94; +rom_iq_corr_enable = 0x40000f98; +rom_fe_reg_init = 0x40000f9c; +rom_agc_reg_init = 0x40000fa0; +rom_bb_reg_init = 0x40000fa4; +rom_mac_enable_bb = 0x40000fa8; +rom_bb_wdg_cfg = 0x40000fac; +rom_force_txon = 0x40000fb0; +rom_fe_txrx_reset = 0x40000fb4; +rom_set_rx_comp = 0x40000fb8; +rom_set_pbus_reg = 0x40000fbc; +rom_write_chan_freq = 0x40000fc0; +rom_phy_xpd_rf = 0x40000fc4; +rom_set_xpd_sar = 0x40000fc8; +rom_write_dac_gain2 = 0x40000fcc; +rom_get_target_power_offset = 0x40000fd0; +rom_write_txrate_power_offset = 0x40000fd4; +rom_get_rate_fcc_index = 0x40000fd8; +rom_get_rate_target_power = 0x40000fdc; +rom_write_wifi_dig_gain = 0x40000fe0; +rom_bt_correct_rf_ana_gain = 0x40000fe4; +rom_pkdet_vol_start = 0x40000fe8; +rom_read_sar2_code = 0x40000fec; +rom_get_sar2_vol = 0x40000ff0; +rom_get_pll_vol = 0x40000ff4; +rom_get_phy_target_power = 0x40000ff8; +rom_temp_to_power = 0x40000ffc; +rom_phy_track_pll_cap = 0x40001000; +rom_phy_pwdet_always_en = 0x40001004; +rom_phy_pwdet_onetime_en = 0x40001008; +rom_get_i2c_mst0_mask = 0x4000100c; +rom_get_i2c_hostid = 0x40001010; +rom_enter_critical_phy = 0x40001014; +rom_exit_critical_phy = 0x40001018; +rom_chip_i2c_readReg_org = 0x4000101c; +rom_i2c_paral_set_mst0 = 0x40001020; +rom_i2c_paral_set_read = 0x40001024; +rom_i2c_paral_read = 0x40001028; +rom_i2c_paral_write = 0x4000102c; +rom_i2c_paral_write_num = 0x40001030; +rom_i2c_paral_write_mask = 0x40001034; +rom_bb_bss_cbw40_ana = 0x40001038; +rom_chan_to_freq = 0x4000103c; +rom_open_i2c_xpd = 0x40001040; +rom_dac_rate_set = 0x40001044; +rom_tsens_read_init = 0x40001048; +rom_tsens_code_read = 0x4000104c; +rom_tsens_index_to_dac = 0x40001050; +rom_tsens_index_to_offset = 0x40001054; +rom_tsens_dac_cal = 0x40001058; +rom_code_to_temp = 0x4000105c; +rom_write_pll_cap_mem = 0x40001060; +rom_pll_correct_dcap = 0x40001064; +rom_phy_en_hw_set_freq = 0x40001068; +rom_phy_dis_hw_set_freq = 0x4000106c; +rom_pll_vol_cal = 0x40001070; +rom_wrtie_pll_cap = 0x40001074; +rom_set_tx_gain_mem = 0x40001078; +rom_bt_tx_dig_gain = 0x4000107c; +rom_bt_get_tx_gain = 0x40001080; +rom_get_chan_target_power = 0x40001084; +rom_get_tx_gain_value = 0x40001088; +rom_wifi_tx_dig_gain = 0x4000108c; +rom_wifi_get_tx_gain = 0x40001090; +rom_fe_i2c_reg_renew = 0x40001094; +rom_wifi_agc_sat_gain = 0x40001098; +rom_i2c_master_reset = 0x4000109c; +rom_bt_filter_reg = 0x400010a0; +rom_phy_bbpll_cal = 0x400010a4; +rom_i2c_sar2_init_code = 0x400010a8; +rom_phy_param_addr = 0x400010ac; +rom_phy_reg_init = 0x400010b0; +rom_set_chan_reg = 0x400010b4; +rom_phy_wakeup_init = 0x400010b8; +rom_phy_i2c_init1 = 0x400010bc; +rom_tsens_temp_read = 0x400010c0; +rom_bt_track_pll_cap = 0x400010c4; +rom_wifi_track_pll_cap = 0x400010c8; +rom_wifi_set_tx_gain = 0x400010cc; +rom_txpwr_cal_track = 0x400010d0; +rom_tx_pwctrl_background = 0x400010d4; +rom_bt_set_tx_gain = 0x400010d8; +rom_noise_check_loop = 0x400010dc; +rom_phy_close_rf = 0x400010e0; +rom_phy_xpd_tsens = 0x400010e4; +rom_phy_freq_mem_backup = 0x400010e8; +rom_phy_ant_init = 0x400010ec; +rom_bt_track_tx_power = 0x400010f0; +rom_wifi_track_tx_power = 0x400010f4; +rom_phy_dig_reg_backup = 0x400010f8; +chip726_phyrom_version_num = 0x400010fc; +/* Data (.data, .bss, .rodata) */ +phy_param_rom = 0x4087fcd8; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld new file mode 100644 index 0000000000..717b9ae50a --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld @@ -0,0 +1,263 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.pp.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group rom_pp + ***************************************/ + +/* Functions */ +esp_pp_rom_version_get = 0x40000bd8; +RC_GetBlockAckTime = 0x40000bdc; +ebuf_list_remove = 0x40000be0; +esf_buf_alloc = 0x40000be4; +esf_buf_alloc_dynamic = 0x40000be8; +esf_buf_recycle = 0x40000bec; +GetAccess = 0x40000bf0; +hal_mac_is_low_rate_enabled = 0x40000bf4; +hal_mac_tx_get_blockack = 0x40000bf8; +hal_mac_tx_set_ppdu = 0x40000bfc; +ic_get_trc = 0x40000c00; +ic_mac_deinit = 0x40000c04; +ic_mac_init = 0x40000c08; +ic_interface_enabled = 0x40000c0c; +is_lmac_idle = 0x40000c10; +lmacAdjustTimestamp = 0x40000c14; +lmacDiscardAgedMSDU = 0x40000c18; +lmacDiscardMSDU = 0x40000c1c; +lmacEndFrameExchangeSequence = 0x40000c20; +lmacIsIdle = 0x40000c24; +lmacIsLongFrame = 0x40000c28; +lmacMSDUAged = 0x40000c2c; +lmacPostTxComplete = 0x40000c30; +lmacProcessAllTxTimeout = 0x40000c34; +lmacProcessCollisions = 0x40000c38; +lmacProcessRxSucData = 0x40000c3c; +lmacReachLongLimit = 0x40000c40; +lmacReachShortLimit = 0x40000c44; +lmacRecycleMPDU = 0x40000c48; +lmacRxDone = 0x40000c4c; +lmacSetTxFrame = 0x40000c50; +lmacTxDone = 0x40000c54; +lmacTxFrame = 0x40000c58; +mac_tx_set_duration = 0x40000c5c; +mac_tx_set_plcp0 = 0x40000c60; +mac_tx_set_plcp1 = 0x40000c64; +mac_tx_set_plcp2 = 0x40000c68; +pm_check_state = 0x40000c6c; +pm_disable_dream_timer = 0x40000c70; +pm_disable_sleep_delay_timer = 0x40000c74; +pm_dream = 0x40000c78; +pm_mac_wakeup = 0x40000c7c; +pm_mac_sleep = 0x40000c80; +pm_enable_active_timer = 0x40000c84; +pm_enable_sleep_delay_timer = 0x40000c88; +pm_local_tsf_process = 0x40000c8c; +pm_set_beacon_filter = 0x40000c90; +pm_is_in_wifi_slice_threshold = 0x40000c94; +pm_is_waked = 0x40000c98; +pm_keep_alive = 0x40000c9c; +pm_on_beacon_rx = 0x40000ca0; +pm_on_data_rx = 0x40000ca4; +pm_on_tbtt = 0x40000ca8; +pm_parse_beacon = 0x40000cac; +pm_process_tim = 0x40000cb0; +pm_rx_beacon_process = 0x40000cb4; +pm_rx_data_process = 0x40000cb8; +pm_sleep = 0x40000cbc; +pm_sleep_for = 0x40000cc0; +pm_tbtt_process = 0x40000cc4; +ppAMPDU2Normal = 0x40000cc8; +ppAssembleAMPDU = 0x40000ccc; +ppCalFrameTimes = 0x40000cd0; +ppCalSubFrameLength = 0x40000cd4; +ppCalTxAMPDULength = 0x40000cd8; +ppCheckTxAMPDUlength = 0x40000cdc; +ppDequeueRxq_Locked = 0x40000ce0; +ppDequeueTxQ = 0x40000ce4; +ppEmptyDelimiterLength = 0x40000ce8; +ppEnqueueRxq = 0x40000cec; +ppEnqueueTxDone = 0x40000cf0; +ppGetTxframe = 0x40000cf4; +ppMapTxQueue = 0x40000cf8; +ppProcTxSecFrame = 0x40000cfc; +ppProcessRxPktHdr = 0x40000d00; +ppProcessTxQ = 0x40000d04; +ppRecordBarRRC = 0x40000d08; +ppRecycleAmpdu = 0x40000d0c; +ppRecycleRxPkt = 0x40000d10; +ppResortTxAMPDU = 0x40000d14; +ppResumeTxAMPDU = 0x40000d18; +ppRxFragmentProc = 0x40000d1c; +ppRxPkt = 0x40000d20; +ppRxProtoProc = 0x40000d24; +ppSearchTxQueue = 0x40000d28; +ppSearchTxframe = 0x40000d2c; +ppSelectNextQueue = 0x40000d30; +ppSubFromAMPDU = 0x40000d34; +ppTask = 0x40000d38; +ppTxPkt = 0x40000d3c; +ppTxProtoProc = 0x40000d40; +ppTxqUpdateBitmap = 0x40000d44; +pp_coex_tx_request = 0x40000d48; +pp_hdrsize = 0x40000d4c; +pp_post = 0x40000d50; +pp_process_hmac_waiting_txq = 0x40000d54; +rcGetAmpduSched = 0x40000d58; +rcUpdateRxDone = 0x40000d5c; +rc_get_trc = 0x40000d60; +rc_get_trc_by_index = 0x40000d64; +rcAmpduLowerRate = 0x40000d68; +rcampduuprate = 0x40000d6c; +rcClearCurAMPDUSched = 0x40000d70; +rcClearCurSched = 0x40000d74; +rcClearCurStat = 0x40000d78; +rcGetSched = 0x40000d7c; +rcLowerSched = 0x40000d80; +rcSetTxAmpduLimit = 0x40000d84; +rcTxUpdatePer = 0x40000d88; +rcUpdateAckSnr = 0x40000d8c; +rcUpdateRate = 0x40000d90; +rcUpdateTxDone = 0x40000d94; +rcUpdateTxDoneAmpdu2 = 0x40000d98; +rcUpSched = 0x40000d9c; +rssi_margin = 0x40000da0; +rx11NRate2AMPDULimit = 0x40000da4; +TRC_AMPDU_PER_DOWN_THRESHOLD = 0x40000da8; +TRC_AMPDU_PER_UP_THRESHOLD = 0x40000dac; +trc_calc_duration = 0x40000db0; +trc_isTxAmpduOperational = 0x40000db4; +trc_onAmpduOp = 0x40000db8; +TRC_PER_IS_GOOD = 0x40000dbc; +trc_SetTxAmpduState = 0x40000dc0; +trc_tid_isTxAmpduOperational = 0x40000dc4; +trcAmpduSetState = 0x40000dc8; +wDevCheckBlockError = 0x40000dcc; +wDev_AppendRxBlocks = 0x40000dd0; +wDev_DiscardFrame = 0x40000dd4; +wDev_GetNoiseFloor = 0x40000dd8; +wDev_IndicateAmpdu = 0x40000ddc; +wDev_IndicateFrame = 0x40000de0; +wdev_mac_reg_load = 0x40000de4; +wdev_mac_reg_store = 0x40000de8; +wdev_mac_special_reg_load = 0x40000dec; +wdev_mac_special_reg_store = 0x40000df0; +wdev_mac_wakeup = 0x40000df4; +wdev_mac_sleep = 0x40000df8; +hal_mac_is_dma_enable = 0x40000dfc; +wDev_ProcessFiq = 0x40000e00; +wDev_ProcessRxSucData = 0x40000e04; +wdevProcessRxSucDataAll = 0x40000e08; +wdev_csi_len_align = 0x40000e0c; +ppDequeueTxDone_Locked = 0x40000e10; +ppProcTxDone = 0x40000e14; +pm_tx_data_done_process = 0x40000e18; +config_is_cache_tx_buf_enabled = 0x40000e1c; +ppMapWaitTxq = 0x40000e20; +ppProcessWaitingQueue = 0x40000e24; +ppDisableQueue = 0x40000e28; +pm_allow_tx = 0x40000e2c; +wdev_is_data_in_rxlist = 0x40000e30; +ppProcTxCallback = 0x40000e34; +mac_tx_set_hesig = 0x40000e38; +ppCalPreFecPaddingFactor = 0x40000e3c; +mac_tx_set_tb = 0x40000e40; +mac_tx_set_mplen = 0x40000e44; +/* Data (.data, .bss, .rodata) */ +our_instances_ptr = 0x4004ffe0; +pTxRx = 0x4087ff88; +lmacConfMib_ptr = 0x4087ff84; +our_wait_eb = 0x4087ff80; +our_tx_eb = 0x4087ff7c; +pp_wdev_funcs = 0x4087ff78; +g_osi_funcs_p = 0x4087ff74; +wDevCtrl_ptr = 0x4087ff70; +g_wdev_last_desc_reset_ptr = 0x4004ffdc; +wDevMacSleep_ptr = 0x4087ff6c; +g_lmac_cnt_ptr = 0x4087ff68; +our_controls_ptr = 0x4004ffd8; +pp_sig_cnt_ptr = 0x4087ff64; +g_eb_list_desc_ptr = 0x4087ff60; +s_fragment_ptr = 0x4087ff5c; +if_ctrl_ptr = 0x4087ff58; +g_intr_lock_mux = 0x4087ff54; +g_wifi_global_lock = 0x4087ff50; +s_wifi_queue = 0x4087ff4c; +pp_task_hdl = 0x4087ff48; +s_pp_task_create_sem = 0x4087ff44; +s_pp_task_del_sem = 0x4087ff40; +g_wifi_menuconfig_ptr = 0x4087ff3c; +xphyQueue = 0x4087ff38; +ap_no_lr_ptr = 0x4087ff34; +rc11BSchedTbl_ptr = 0x4087ff30; +rc11NSchedTbl_ptr = 0x4087ff2c; +rcLoRaSchedTbl_ptr = 0x4087ff28; +BasicOFDMSched_ptr = 0x4087ff24; +trc_ctl_ptr = 0x4087ff20; +g_pm_cnt_ptr = 0x4087ff1c; +g_pm_ptr = 0x4087ff18; +g_pm_cfg_ptr = 0x4087ff14; +g_esp_mesh_quick_funcs_ptr = 0x4087ff10; +g_txop_queue_status_ptr = 0x4087ff0c; +g_mac_sleep_en_ptr = 0x4087ff08; +g_mesh_is_root_ptr = 0x4087ff04; +g_mesh_topology_ptr = 0x4087ff00; +g_mesh_init_ps_type_ptr = 0x4087fefc; +g_mesh_is_started_ptr = 0x4087fef8; +g_config_func = 0x4087fef4; +g_net80211_tx_func = 0x4087fef0; +g_timer_func = 0x4087feec; +s_michael_mic_failure_cb = 0x4087fee8; +wifi_sta_rx_probe_req = 0x4087fee4; +g_tx_done_cb_func = 0x4087fee0; +g_per_conn_trc = 0x4087fe94; +s_encap_amsdu_func = 0x4087fe90; +s_mplen_high_bitmap = 0x4087fce8; +s_mplen_low_bitmap = 0x4087fcf8; +rx_beacon_count = 0x4087fe8c; +rx_beacon_sw_parse = 0x4087fe88; +rx_beacon_hw_parse = 0x4087fe84; +rx_beacon_tim_count = 0x4087fe80; +rx_beacon_tim_udata = 0x4087fe7c; +rx_beacon_tim_udata_bitmap = 0x4087fe78; +rx_beacon_tim_bdata = 0x4087fe74; +rx_beacon_tim_bdata_bitmapctl = 0x4087fe70; +rx_beacon_tim_bdata_bitmap_trans = 0x4087fe6c; +rx_beacon_tim_bdata_bitmap_mbssid_self = 0x4087fe68; +rx_beacon_tim_bdata_bitmap_mbssid_other = 0x4087fe64; +rx_beacon_dtim_tim = 0x4087fe60; +rx_beacon_dtim_tim_mcast = 0x4087fe5c; +amdpu_delay_time_ms = 0x4087fce4; +ampdu_delay_packet = 0x4087fce0; +ampdu_delay = 0x4087fe59; +first_ampdu = 0x4087fe58; +s_ht_ampdu_density_us = 0x4087fcde; +s_ht_ampdu_density = 0x4087fcdd; +s_running_phy_type = 0x4087fcdc; +complete_ena_tb_seqno = 0x4087fe54; +complete_ena_tb_final = 0x4087fe50; +complete_ena_tb_count = 0x4087fe4c; +s_itwt_state = 0x4087fe48; +g_dbg_interp_tsf = 0x4087fe44; +g_dbg_interp_tsf_end = 0x4087fe40; +g_dbg_closrf_tsf = 0x4087fe3c; +g_dbg_closrf_idx = 0x4087fe38; +g_dbg_closrf_blk = 0x4087fe34; +queue_history = 0x4087fd6c; +queue_history_idx = 0x4087fd68; +s_he_min_len_bytes = 0x4087fd2c; +s_he_dcm_min_len_bytes = 0x4087fd0c; +s_mplen_vi_bitmap = 0x4087fd08; +s_mplen_low_bitmap = 0x4087fcf8; +s_mplen_high_bitmap = 0x4087fce8; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.rvfp.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.rvfp.ld new file mode 100644 index 0000000000..3a0edde6ec --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.rvfp.ld @@ -0,0 +1,118 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.rvfp.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group rvfplib + ***************************************/ + +/* Functions */ +__adddf3 = 0x400009f4; +__addsf3 = 0x400009f8; +__eqdf2 = 0x400009fc; +__eqsf2 = 0x40000a00; +__extendsfdf2 = 0x40000a04; +__fixdfdi = 0x40000a08; +__fixdfsi = 0x40000a0c; +__fixsfdi = 0x40000a10; +__fixsfsi = 0x40000a14; +__fixunsdfsi = 0x40000a18; +__fixunssfdi = 0x40000a1c; +__fixunssfsi = 0x40000a20; +__floatdidf = 0x40000a24; +__floatdisf = 0x40000a28; +__floatsidf = 0x40000a2c; +__floatsisf = 0x40000a30; +__floatundidf = 0x40000a34; +__floatundisf = 0x40000a38; +__floatunsidf = 0x40000a3c; +__floatunsisf = 0x40000a40; +__gedf2 = 0x40000a44; +__gesf2 = 0x40000a48; +__gtdf2 = 0x40000a4c; +__gtsf2 = 0x40000a50; +__ledf2 = 0x40000a54; +__lesf2 = 0x40000a58; +__ltdf2 = 0x40000a5c; +__ltsf2 = 0x40000a60; +__muldf3 = 0x40000a64; +__mulsf3 = 0x40000a68; +__nedf2 = 0x40000a6c; +__nesf2 = 0x40000a70; +__subdf3 = 0x40000a74; +__subsf3 = 0x40000a78; +__truncdfsf2 = 0x40000a7c; + +/*************************************** + Group libgcc +***************************************/ + +/* Functions */ +__absvdi2 = 0x40000884; +__absvsi2 = 0x40000888; +__addvdi3 = 0x40000894; +__addvsi3 = 0x40000898; +__ashldi3 = 0x4000089c; +__ashrdi3 = 0x400008a0; +__bswapdi2 = 0x400008a4; +__bswapsi2 = 0x400008a8; +__clear_cache = 0x400008ac; +__clrsbdi2 = 0x400008b0; +__clrsbsi2 = 0x400008b4; +__clzdi2 = 0x400008b8; +__clzsi2 = 0x400008bc; +__cmpdi2 = 0x400008c0; +__ctzdi2 = 0x400008c4; +__ctzsi2 = 0x400008c8; +__divdc3 = 0x400008cc; +__divdf3 = 0x400008d0; +__divdi3 = 0x400008d4; +__divsc3 = 0x400008d8; +__divsf3 = 0x400008dc; +__divsi3 = 0x400008e0; +__ffsdi2 = 0x400008f0; +__ffssi2 = 0x400008f4; +__gcc_bcmp = 0x40000934; +__lshrdi3 = 0x40000950; +__moddi3 = 0x4000095c; +__modsi3 = 0x40000960; +__muldc3 = 0x40000964; +__muldi3 = 0x4000096c; +__mulsc3 = 0x40000970; +__mulsi3 = 0x40000978; +__mulvdi3 = 0x4000097c; +__mulvsi3 = 0x40000980; +__negdf2 = 0x40000988; +__negdi2 = 0x4000098c; +__negsf2 = 0x40000990; +__negvdi2 = 0x40000994; +__negvsi2 = 0x40000998; +__paritysi2 = 0x400009a0; +__popcountdi2 = 0x400009a4; +__popcountsi2 = 0x400009a8; +__powidf2 = 0x400009ac; +__powisf2 = 0x400009b0; +__subvdi3 = 0x400009bc; +__subvsi3 = 0x400009c0; +__ucmpdi2 = 0x400009c8; +__udivdi3 = 0x400009cc; +__udivmoddi4 = 0x400009d0; +__udivsi3 = 0x400009d4; +__udiv_w_sdiv = 0x400009d8; +__umoddi3 = 0x400009dc; +__umodsi3 = 0x400009e0; +__unorddf2 = 0x400009e4; +__unordsf2 = 0x400009e8; +__extenddftf2 = 0x400009ec; +__trunctfdf2 = 0x400009f0; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld new file mode 100644 index 0000000000..bad952bd7d --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld @@ -0,0 +1,166 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM function interface esp32c6.rom.spiflash.ld for esp32c6 + * + * + * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 49b5eec776610e08f2ed989e3ffc2ba0 + * + * Compatible with ROM where ECO version equal or greater to 0. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ + +/*************************************** + Group spi_flash_cache + ***************************************/ + +/* Functions */ +spi_flash_disable_cache = 0x400001f0; +spi_flash_restore_cache = 0x400001f4; +spi_flash_cache_enabled = 0x400001f8; +spi_flash_enable_cache = 0x400001fc; +esp_enable_cache_flash_wrap = 0x40000200; + + +/*************************************** + Group spi_flash_mmap + ***************************************/ + +/* Functions */ +spi_flash_mmap_os_func_set = 0x40000204; +spi_flash_mmap_page_num_init = 0x40000208; +spi_flash_mmap = 0x4000020c; +spi_flash_mmap_pages = 0x40000210; +spi_flash_munmap = 0x40000214; +spi_flash_mmap_dump = 0x40000218; +spi_flash_check_and_flush_cache = 0x4000021c; +spi_flash_mmap_get_free_pages = 0x40000220; +spi_flash_cache2phys = 0x40000224; +spi_flash_phys2cache = 0x40000228; + + +/*************************************** + Group esp_flash + ***************************************/ + +/* Functions */ +esp_flash_chip_driver_initialized = 0x4000022c; +esp_flash_read_id = 0x40000230; +esp_flash_get_size = 0x40000234; +esp_flash_erase_chip = 0x40000238; +esp_flash_erase_region = 0x4000023c; +esp_flash_get_chip_write_protect = 0x40000240; +esp_flash_set_chip_write_protect = 0x40000244; +esp_flash_get_protectable_regions = 0x40000248; +esp_flash_get_protected_region = 0x4000024c; +esp_flash_set_protected_region = 0x40000250; +esp_flash_read = 0x40000254; +esp_flash_write = 0x40000258; +esp_flash_write_encrypted = 0x4000025c; +esp_flash_read_encrypted = 0x40000260; +esp_flash_get_io_mode = 0x40000264; +esp_flash_set_io_mode = 0x40000268; +spi_flash_boot_attach = 0x4000026c; +esp_flash_read_chip_id = 0x40000270; +detect_spi_flash_chip = 0x40000274; +esp_rom_spiflash_write_disable = 0x40000278; +esp_flash_suspend_cmd_init = 0x4000027c; +/* Data (.data, .bss, .rodata) */ +esp_flash_default_chip = 0x4087ffe8; +esp_flash_api_funcs = 0x4087ffe4; + + +/*************************************** + Group spi_flash_chips + ***************************************/ + +/* Functions */ +spi_flash_chip_generic_probe = 0x40000280; +spi_flash_chip_generic_detect_size = 0x40000284; +spi_flash_chip_generic_write = 0x40000288; +spi_flash_chip_generic_write_encrypted = 0x4000028c; +spi_flash_chip_generic_set_write_protect = 0x40000290; +spi_flash_common_write_status_16b_wrsr = 0x40000294; +spi_flash_chip_generic_reset = 0x40000298; +spi_flash_chip_generic_erase_chip = 0x4000029c; +spi_flash_chip_generic_erase_sector = 0x400002a0; +spi_flash_chip_generic_erase_block = 0x400002a4; +spi_flash_chip_generic_page_program = 0x400002a8; +spi_flash_chip_generic_get_write_protect = 0x400002ac; +spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x400002b0; +spi_flash_chip_generic_read_reg = 0x400002b4; +spi_flash_chip_generic_yield = 0x400002b8; +spi_flash_generic_wait_host_idle = 0x400002bc; +spi_flash_chip_generic_wait_idle = 0x400002c0; +spi_flash_chip_generic_config_host_io_mode = 0x400002c4; +spi_flash_chip_generic_read = 0x400002c8; +spi_flash_common_read_status_8b_rdsr2 = 0x400002cc; +spi_flash_chip_generic_get_io_mode = 0x400002d0; +spi_flash_common_read_status_8b_rdsr = 0x400002d4; +spi_flash_common_write_status_8b_wrsr = 0x400002d8; +spi_flash_common_write_status_8b_wrsr2 = 0x400002dc; +spi_flash_common_set_io_mode = 0x400002e0; +spi_flash_chip_generic_set_io_mode = 0x400002e4; +spi_flash_chip_generic_read_unique_id = 0x400002e8; +spi_flash_chip_generic_get_caps = 0x400002ec; +spi_flash_chip_generic_suspend_cmd_conf = 0x400002f0; +spi_flash_chip_gd_get_io_mode = 0x400002f4; +spi_flash_chip_gd_probe = 0x400002f8; +spi_flash_chip_gd_set_io_mode = 0x400002fc; +/* Data (.data, .bss, .rodata) */ +spi_flash_chip_generic_config_data = 0x4087ffe0; +spi_flash_encryption = 0x4087ffdc; + + +/*************************************** + Group memspi_host + ***************************************/ + +/* Functions */ +memspi_host_read_id_hs = 0x40000300; +memspi_host_read_status_hs = 0x40000304; +memspi_host_flush_cache = 0x40000308; +memspi_host_erase_chip = 0x4000030c; +memspi_host_erase_sector = 0x40000310; +memspi_host_erase_block = 0x40000314; +memspi_host_program_page = 0x40000318; +memspi_host_read = 0x4000031c; +memspi_host_set_write_protect = 0x40000320; +memspi_host_set_max_read_len = 0x40000324; +memspi_host_read_data_slicer = 0x40000328; +memspi_host_write_data_slicer = 0x4000032c; + + +/*************************************** + Group hal_spiflash + ***************************************/ + +/* Functions */ +spi_flash_hal_poll_cmd_done = 0x40000330; +spi_flash_hal_device_config = 0x40000334; +spi_flash_hal_configure_host_io_mode = 0x40000338; +spi_flash_hal_common_command = 0x4000033c; +spi_flash_hal_read = 0x40000340; +spi_flash_hal_erase_chip = 0x40000344; +spi_flash_hal_erase_sector = 0x40000348; +spi_flash_hal_erase_block = 0x4000034c; +spi_flash_hal_program_page = 0x40000350; +spi_flash_hal_set_write_protect = 0x40000354; +spi_flash_hal_host_idle = 0x40000358; +spi_flash_hal_check_status = 0x4000035c; +spi_flash_hal_setup_read_suspend = 0x40000360; +spi_flash_hal_setup_auto_suspend_mode = 0x40000364; +spi_flash_hal_setup_auto_resume_mode = 0x40000368; +spi_flash_hal_disable_auto_suspend_mode = 0x4000036c; +spi_flash_hal_disable_auto_resume_mode = 0x40000370; +spi_flash_hal_resume = 0x40000374; +spi_flash_hal_suspend = 0x40000378; +spi_flash_encryption_hal_enable = 0x4000037c; +spi_flash_encryption_hal_disable = 0x40000380; +spi_flash_encryption_hal_prepare = 0x40000384; +spi_flash_encryption_hal_done = 0x40000388; +spi_flash_encryption_hal_destroy = 0x4000038c; +spi_flash_encryption_hal_check = 0x40000390; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.version.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.version.ld new file mode 100644 index 0000000000..ad4d15d00f --- /dev/null +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.version.ld @@ -0,0 +1,13 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* ROM version variables for esp32c6 + * + * These addresses should be compatible with any ROM version for this chip. + * + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + */ +_rom_chip_id = 0x40000010; +_rom_eco_version = 0x40000014; diff --git a/components/esp_rom/esp32h2/Kconfig.soc_caps.in b/components/esp_rom/esp32h2/Kconfig.soc_caps.in index c6beb32f11..b11f70e542 100644 --- a/components/esp_rom/esp32h2/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32h2/Kconfig.soc_caps.in @@ -34,3 +34,7 @@ config ESP_ROM_HAS_ERASE_0_REGION_BUG config ESP_ROM_GET_CLK_FREQ bool default y + +config ESP_ROM_HAS_LAYOUT_TABLE + bool + default y diff --git a/components/esp_rom/esp32h2/esp_rom_caps.h b/components/esp_rom/esp32h2/esp_rom_caps.h index 151fb44e08..60660e37a2 100644 --- a/components/esp_rom/esp32h2/esp_rom_caps.h +++ b/components/esp_rom/esp32h2/esp_rom_caps.h @@ -14,3 +14,4 @@ #define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking #define ESP_ROM_HAS_ERASE_0_REGION_BUG (1) // ROM has esp_flash_erase_region(size=0) bug #define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency` +#define ESP_ROM_HAS_LAYOUT_TABLE (1) // ROM has the layout table diff --git a/components/esp_rom/esp32s3/Kconfig.soc_caps.in b/components/esp_rom/esp32s3/Kconfig.soc_caps.in index 9788a68b77..7383c90099 100644 --- a/components/esp_rom/esp32s3/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32s3/Kconfig.soc_caps.in @@ -46,3 +46,11 @@ config ESP_ROM_HAS_HAL_WDT config ESP_ROM_NEEDS_SWSETUP_WORKAROUND bool default y + +config ESP_ROM_HAS_LAYOUT_TABLE + bool + default y + +config ESP_ROM_HAS_SPI_FLASH + bool + default y diff --git a/components/esp_rom/esp32s3/esp_rom_caps.h b/components/esp_rom/esp32s3/esp_rom_caps.h index a5362a68e4..88d85003a4 100644 --- a/components/esp_rom/esp32s3/esp_rom_caps.h +++ b/components/esp_rom/esp32s3/esp_rom_caps.h @@ -17,3 +17,5 @@ #define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency` #define ESP_ROM_HAS_HAL_WDT (1) // ROM has the implementation of Watchdog HAL driver #define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing +#define ESP_ROM_HAS_LAYOUT_TABLE (1) // ROM has the layout table +#define ESP_ROM_HAS_SPI_FLASH (1) // ROM has the implementation of SPI Flash driver