diff --git a/components/bt/bt.c b/components/bt/bt.c
index fc69d571a1..0fc8e4a480 100644
--- a/components/bt/bt.c
+++ b/components/bt/bt.c
@@ -1450,7 +1450,7 @@ void IRAM_ATTR __attribute__((noinline)) r_assert(const char *condition, int par
 #define BT_INT_STA_REG (0x3FF7100C)
 #define BLE_INT_STA_REG (0x3FF71210)
 
-int _int_enable_flag=0;
+extern int _int_enable_flag;
 
 extern bool connection_is_alive();
 extern uint32_t real_bt_isr_count ;
diff --git a/components/esp32/crosscore_int.c b/components/esp32/crosscore_int.c
index 7d6fe586f2..751d15123c 100644
--- a/components/esp32/crosscore_int.c
+++ b/components/esp32/crosscore_int.c
@@ -40,6 +40,7 @@
 
 static portMUX_TYPE reason_spinlock = portMUX_INITIALIZER_UNLOCKED;
 static volatile uint32_t reason[ portNUM_PROCESSORS ];
+int _int_enable_flag = 0;
 
 /*
 ToDo: There is a small chance the CPU already has yielded when this ISR is serviced. In that case, it's running the intended task but
@@ -78,7 +79,6 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) {
          */
     }
     if(my_reason_val & REASON_GET_INT) {
-        extern int _int_enable_flag;
         asm volatile ("rsr %0, INTENABLE\n" :"=r"(_int_enable_flag));
     }
 }