From 89f572c933fc1ac3c5a802ef681759c6d81c1e01 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Tue, 30 Mar 2021 15:24:40 +0800 Subject: [PATCH 01/13] kconfig: ignore nonexistent new names --- tools/kconfig_new/confgen.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/tools/kconfig_new/confgen.py b/tools/kconfig_new/confgen.py index 6e6733f8b4..3d4dffd452 100755 --- a/tools/kconfig_new/confgen.py +++ b/tools/kconfig_new/confgen.py @@ -119,8 +119,11 @@ class DeprecatedOptions(object): return True return False else: - # otherwise if any of the nodes associated with the option was visible - return any(visibility.visible(node) for node in config.syms[opt].nodes) + try: + # otherwise if any of the nodes associated with the option was visible + return any(visibility.visible(node) for node in config.syms[opt].nodes) + except KeyError: + return False if len(self.r_dic) > 0: with open(path_output, 'a') as f_o: From 784a02a4ee4b285e3467b4891ba3f5e8cdded2af Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Fri, 29 Jan 2021 13:42:17 +0800 Subject: [PATCH 02/13] esp32: move hw random --- components/esp32/CMakeLists.txt | 1 - components/esp32/hw_random.c | 69 ------------------- components/esp32c3/CMakeLists.txt | 1 - components/esp32c3/hw_random.c | 68 ------------------ components/esp32s2/CMakeLists.txt | 1 - components/esp32s2/test/test_random.c | 66 ------------------ components/esp32s3/CMakeLists.txt | 1 - components/esp32s3/hw_random.c | 69 ------------------- components/esp_hw_support/CMakeLists.txt | 2 +- .../{esp32s2 => esp_hw_support}/hw_random.c | 11 ++- .../test/test_random.c | 0 11 files changed, 11 insertions(+), 278 deletions(-) delete mode 100644 components/esp32/hw_random.c delete mode 100644 components/esp32c3/hw_random.c delete mode 100644 components/esp32s2/test/test_random.c delete mode 100644 components/esp32s3/hw_random.c rename components/{esp32s2 => esp_hw_support}/hw_random.c (92%) rename components/{esp32 => esp_hw_support}/test/test_random.c (100%) diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index 462d9a0891..9aca5ce09a 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -18,7 +18,6 @@ else() "crosscore_int.c" "dport_access.c" "esp_himem.c" - "hw_random.c" "spiram.c" "spiram_psram.c" "system_api_esp32.c") diff --git a/components/esp32/hw_random.c b/components/esp32/hw_random.c deleted file mode 100644 index 3926aaed52..0000000000 --- a/components/esp32/hw_random.c +++ /dev/null @@ -1,69 +0,0 @@ -// Copyright 2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#include -#include -#include -#include -#include "esp_attr.h" -#include "hal/cpu_hal.h" -#include "esp32/clk.h" -#include "soc/wdev_reg.h" - -uint32_t IRAM_ATTR esp_random(void) -{ - /* The PRNG which implements WDEV_RANDOM register gets 2 bits - * of extra entropy from a hardware randomness source every APB clock cycle - * (provided WiFi or BT are enabled). To make sure entropy is not drained - * faster than it is added, this function needs to wait for at least 16 APB - * clock cycles after reading previous word. This implementation may actually - * wait a bit longer due to extra time spent in arithmetic and branch statements. - * - * As a (probably unncessary) precaution to avoid returning the - * RNG state as-is, the result is XORed with additional - * WDEV_RND_REG reads while waiting. - */ - - /* This code does not run in a critical section, so CPU frequency switch may - * happens while this code runs (this will not happen in the current - * implementation, but possible in the future). However if that happens, - * the number of cycles spent on frequency switching will certainly be more - * than the number of cycles we need to wait here. - */ - uint32_t cpu_to_apb_freq_ratio = esp_clk_cpu_freq() / esp_clk_apb_freq(); - - static uint32_t last_ccount = 0; - uint32_t ccount; - uint32_t result = 0; - do { - ccount = cpu_hal_get_cycle_count(); - result ^= REG_READ(WDEV_RND_REG); - } while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16); - last_ccount = ccount; - return result ^ REG_READ(WDEV_RND_REG); -} - -void esp_fill_random(void *buf, size_t len) -{ - assert(buf != NULL); - uint8_t *buf_bytes = (uint8_t *)buf; - while (len > 0) { - uint32_t word = esp_random(); - uint32_t to_copy = MIN(sizeof(word), len); - memcpy(buf_bytes, &word, to_copy); - buf_bytes += to_copy; - len -= to_copy; - } -} diff --git a/components/esp32c3/CMakeLists.txt b/components/esp32c3/CMakeLists.txt index e1fd8ecdb0..d89be62458 100644 --- a/components/esp32c3/CMakeLists.txt +++ b/components/esp32c3/CMakeLists.txt @@ -18,7 +18,6 @@ else() "esp_hmac.c" "esp_ds.c" "esp_crypto_lock.c" - "hw_random.c" "memprot.c" "system_api_esp32c3.c") set(include_dirs "include") diff --git a/components/esp32c3/hw_random.c b/components/esp32c3/hw_random.c deleted file mode 100644 index a437617c83..0000000000 --- a/components/esp32c3/hw_random.c +++ /dev/null @@ -1,68 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include "esp_attr.h" -#include "esp32c3/clk.h" -#include "soc/wdev_reg.h" -#include "hal/cpu_hal.h" - -uint32_t IRAM_ATTR esp_random(void) -{ - /* The PRNG which implements WDEV_RANDOM register gets 2 bits - * of extra entropy from a hardware randomness source every APB clock cycle - * (provided WiFi or BT are enabled). To make sure entropy is not drained - * faster than it is added, this function needs to wait for at least 16 APB - * clock cycles after reading previous word. This implementation may actually - * wait a bit longer due to extra time spent in arithmetic and branch statements. - * - * As a (probably unncessary) precaution to avoid returning the - * RNG state as-is, the result is XORed with additional - * WDEV_RND_REG reads while waiting. - */ - - /* This code does not run in a critical section, so CPU frequency switch may - * happens while this code runs (this will not happen in the current - * implementation, but possible in the future). However if that happens, - * the number of cycles spent on frequency switching will certainly be more - * than the number of cycles we need to wait here. - */ - uint32_t cpu_to_apb_freq_ratio = esp_clk_cpu_freq() / esp_clk_apb_freq(); - - static uint32_t last_ccount = 0; - uint32_t ccount; - uint32_t result = 0; - do { - ccount = cpu_hal_get_cycle_count(); - result ^= REG_READ(WDEV_RND_REG); - } while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16); - last_ccount = ccount; - return result ^ REG_READ(WDEV_RND_REG); -} - -void esp_fill_random(void *buf, size_t len) -{ - assert(buf != NULL); - uint8_t *buf_bytes = (uint8_t *)buf; - while (len > 0) { - uint32_t word = esp_random(); - uint32_t to_copy = MIN(sizeof(word), len); - memcpy(buf_bytes, &word, to_copy); - buf_bytes += to_copy; - len -= to_copy; - } -} diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index 0f34f5d36f..aab5b71141 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -16,7 +16,6 @@ else() "clk.c" "crosscore_int.c" "dport_access.c" - "hw_random.c" "spiram.c" "spiram_psram.c" "system_api_esp32s2.c" diff --git a/components/esp32s2/test/test_random.c b/components/esp32s2/test/test_random.c deleted file mode 100644 index 083c791246..0000000000 --- a/components/esp32s2/test/test_random.c +++ /dev/null @@ -1,66 +0,0 @@ -#include -#include -#include "unity.h" -#include "esp_system.h" - -/* Note: these are just sanity tests, not the same as - entropy tests -*/ - -TEST_CASE("call esp_random()", "[random]") -{ - const size_t NUM_RANDOM = 128; /* in most cases this is massive overkill */ - - uint32_t zeroes = UINT32_MAX; - uint32_t ones = 0; - for (int i = 0; i < NUM_RANDOM - 1; i++) { - uint32_t r = esp_random(); - ones |= r; - zeroes &= ~r; - } - - /* assuming a 'white' random distribution, we can expect - usually at least one time each bit will be zero and at - least one time each will be one. Statistically this - can still fail, just *very* unlikely to. */ - TEST_ASSERT_EQUAL_HEX32(0, zeroes); - TEST_ASSERT_EQUAL_HEX32(UINT32_MAX, ones); -} - -TEST_CASE("call esp_fill_random()", "[random]") -{ - const size_t NUM_BUF = 200; - const size_t BUF_SZ = 16; - uint8_t buf[NUM_BUF][BUF_SZ]; - uint8_t zero_buf[BUF_SZ]; - uint8_t one_buf[BUF_SZ]; - - bzero(buf, sizeof(buf)); - bzero(one_buf, sizeof(zero_buf)); - memset(zero_buf, 0xFF, sizeof(one_buf)); - - for (int i = 0; i < NUM_BUF; i++) { - esp_fill_random(buf[i], BUF_SZ); - } - /* No two 128-bit buffers should be the same - (again, statistically this could happen but it's very unlikely) */ - for (int i = 0; i < NUM_BUF; i++) { - for (int j = 0; j < NUM_BUF; j++) { - if (i != j) { - TEST_ASSERT_NOT_EQUAL(0, memcmp(buf[i], buf[j], BUF_SZ)); - } - } - } - - /* Do the same all bits are zero and one at least once test across the buffers */ - for (int i = 0; i < NUM_BUF; i++) { - for (int x = 0; x < BUF_SZ; x++) { - zero_buf[x] &= ~buf[i][x]; - one_buf[x] |= buf[i][x]; - } - } - for (int x = 0; x < BUF_SZ; x++) { - TEST_ASSERT_EQUAL_HEX8(0, zero_buf[x]); - TEST_ASSERT_EQUAL_HEX8(0xFF, one_buf[x]); - } -} diff --git a/components/esp32s3/CMakeLists.txt b/components/esp32s3/CMakeLists.txt index 3020dba080..faa8e68a52 100644 --- a/components/esp32s3/CMakeLists.txt +++ b/components/esp32s3/CMakeLists.txt @@ -17,7 +17,6 @@ else() "crosscore_int.c" "dport_access.c" "esp_crypto_lock.c" - "hw_random.c" "memprot.c" "spiram.c" diff --git a/components/esp32s3/hw_random.c b/components/esp32s3/hw_random.c deleted file mode 100644 index 7d3a7fc96a..0000000000 --- a/components/esp32s3/hw_random.c +++ /dev/null @@ -1,69 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#include -#include -#include -#include -#include "esp_attr.h" -#include "hal/cpu_hal.h" -#include "esp32s3/clk.h" -#include "soc/wdev_reg.h" - -uint32_t IRAM_ATTR esp_random(void) -{ - /* The PRNG which implements WDEV_RANDOM register gets 2 bits - * of extra entropy from a hardware randomness source every APB clock cycle - * (provided WiFi or BT are enabled). To make sure entropy is not drained - * faster than it is added, this function needs to wait for at least 16 APB - * clock cycles after reading previous word. This implementation may actually - * wait a bit longer due to extra time spent in arithmetic and branch statements. - * - * As a (probably unncessary) precaution to avoid returning the - * RNG state as-is, the result is XORed with additional - * WDEV_RND_REG reads while waiting. - */ - - /* This code does not run in a critical section, so CPU frequency switch may - * happens while this code runs (this will not happen in the current - * implementation, but possible in the future). However if that happens, - * the number of cycles spent on frequency switching will certainly be more - * than the number of cycles we need to wait here. - */ - uint32_t cpu_to_apb_freq_ratio = esp_clk_cpu_freq() / esp_clk_apb_freq(); - - static uint32_t last_ccount = 0; - uint32_t ccount; - uint32_t result = 0; - do { - ccount = cpu_hal_get_cycle_count(); - result ^= REG_READ(WDEV_RND_REG); - } while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16); - last_ccount = ccount; - return result ^ REG_READ(WDEV_RND_REG); -} - -void esp_fill_random(void *buf, size_t len) -{ - assert(buf != NULL); - uint8_t *buf_bytes = (uint8_t *)buf; - while (len > 0) { - uint32_t word = esp_random(); - uint32_t to_copy = MIN(sizeof(word), len); - memcpy(buf_bytes, &word, to_copy); - buf_bytes += to_copy; - len -= to_copy; - } -} diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index d18183d1ec..6ef6036c6d 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -7,7 +7,7 @@ endif() set(srcs "compare_set.c" "cpu_util.c") if(NOT BOOTLOADER_BUILD) - list(APPEND srcs "clk_ctrl_os.c" "mac_addr.c") + list(APPEND srcs "clk_ctrl_os.c" "mac_addr.c" "hw_random.c") endif() idf_component_register(SRCS ${srcs} diff --git a/components/esp32s2/hw_random.c b/components/esp_hw_support/hw_random.c similarity index 92% rename from components/esp32s2/hw_random.c rename to components/esp_hw_support/hw_random.c index b3877e7ed9..76ee21d8ad 100644 --- a/components/esp32s2/hw_random.c +++ b/components/esp_hw_support/hw_random.c @@ -19,9 +19,18 @@ #include #include "esp_attr.h" #include "hal/cpu_hal.h" -#include "esp32s2/clk.h" #include "soc/wdev_reg.h" +#if CONFIG_IDF_TARGET_ESP32 +#include "esp32/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/clk.h" +#elif CONFIG_IDF_TARGET_ESP32C3 +#include "esp32c3/clk.h" +#endif + uint32_t IRAM_ATTR esp_random(void) { /* The PRNG which implements WDEV_RANDOM register gets 2 bits diff --git a/components/esp32/test/test_random.c b/components/esp_hw_support/test/test_random.c similarity index 100% rename from components/esp32/test/test_random.c rename to components/esp_hw_support/test/test_random.c From 6014e3a198623b040969e4cf8776a6577959a710 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Fri, 29 Jan 2021 15:06:18 +0800 Subject: [PATCH 03/13] esp32: move stack check test --- .../test/test_stack_check_cxx.cpp | 0 components/esp32c3/test/test_stack_check.c | 25 ------------------- .../esp32c3/test/test_stack_check_cxx.cpp | 25 ------------------- components/esp32s2/test/test_stack_check.c | 25 ------------------- .../esp32s2/test/test_stack_check_cxx.cpp | 25 ------------------- .../test/test_stack_check.c | 0 6 files changed, 100 deletions(-) rename components/{esp32 => cxx}/test/test_stack_check_cxx.cpp (100%) delete mode 100644 components/esp32c3/test/test_stack_check.c delete mode 100644 components/esp32c3/test/test_stack_check_cxx.cpp delete mode 100644 components/esp32s2/test/test_stack_check.c delete mode 100644 components/esp32s2/test/test_stack_check_cxx.cpp rename components/{esp32 => esp_system}/test/test_stack_check.c (100%) diff --git a/components/esp32/test/test_stack_check_cxx.cpp b/components/cxx/test/test_stack_check_cxx.cpp similarity index 100% rename from components/esp32/test/test_stack_check_cxx.cpp rename to components/cxx/test/test_stack_check_cxx.cpp diff --git a/components/esp32c3/test/test_stack_check.c b/components/esp32c3/test/test_stack_check.c deleted file mode 100644 index abc36047b9..0000000000 --- a/components/esp32c3/test/test_stack_check.c +++ /dev/null @@ -1,25 +0,0 @@ -#include "unity.h" - -#if CONFIG_COMPILER_STACK_CHECK - -static void recur_and_smash(void) -{ - static int cnt; - volatile uint8_t buf[50]; - volatile int num = sizeof(buf)+10; - - if (cnt++ < 1) { - recur_and_smash(); - } - for (int i = 0; i < num; i++) { - buf[i] = 0; - } -} - - -TEST_CASE("stack smashing protection", "[stack_check] [ignore]") -{ - recur_and_smash(); -} - -#endif diff --git a/components/esp32c3/test/test_stack_check_cxx.cpp b/components/esp32c3/test/test_stack_check_cxx.cpp deleted file mode 100644 index 83ca007d05..0000000000 --- a/components/esp32c3/test/test_stack_check_cxx.cpp +++ /dev/null @@ -1,25 +0,0 @@ -#include "unity.h" - -#if CONFIG_COMPILER_STACK_CHECK - -static void recur_and_smash_cxx(void) -{ - static int cnt; - volatile uint8_t buf[50]; - volatile int num = sizeof(buf)+10; - - if (cnt++ < 1) { - recur_and_smash_cxx(); - } - for (int i = 0; i < num; i++) { - buf[i] = 0; - } -} - - -TEST_CASE("stack smashing protection CXX", "[stack_check] [ignore]") -{ - recur_and_smash_cxx(); -} - -#endif diff --git a/components/esp32s2/test/test_stack_check.c b/components/esp32s2/test/test_stack_check.c deleted file mode 100644 index abc36047b9..0000000000 --- a/components/esp32s2/test/test_stack_check.c +++ /dev/null @@ -1,25 +0,0 @@ -#include "unity.h" - -#if CONFIG_COMPILER_STACK_CHECK - -static void recur_and_smash(void) -{ - static int cnt; - volatile uint8_t buf[50]; - volatile int num = sizeof(buf)+10; - - if (cnt++ < 1) { - recur_and_smash(); - } - for (int i = 0; i < num; i++) { - buf[i] = 0; - } -} - - -TEST_CASE("stack smashing protection", "[stack_check] [ignore]") -{ - recur_and_smash(); -} - -#endif diff --git a/components/esp32s2/test/test_stack_check_cxx.cpp b/components/esp32s2/test/test_stack_check_cxx.cpp deleted file mode 100644 index 83ca007d05..0000000000 --- a/components/esp32s2/test/test_stack_check_cxx.cpp +++ /dev/null @@ -1,25 +0,0 @@ -#include "unity.h" - -#if CONFIG_COMPILER_STACK_CHECK - -static void recur_and_smash_cxx(void) -{ - static int cnt; - volatile uint8_t buf[50]; - volatile int num = sizeof(buf)+10; - - if (cnt++ < 1) { - recur_and_smash_cxx(); - } - for (int i = 0; i < num; i++) { - buf[i] = 0; - } -} - - -TEST_CASE("stack smashing protection CXX", "[stack_check] [ignore]") -{ - recur_and_smash_cxx(); -} - -#endif diff --git a/components/esp32/test/test_stack_check.c b/components/esp_system/test/test_stack_check.c similarity index 100% rename from components/esp32/test/test_stack_check.c rename to components/esp_system/test/test_stack_check.c From 7d85c42e52f0085f765cfb083f5e6ef3e8399604 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Fri, 19 Mar 2021 16:28:21 +0800 Subject: [PATCH 04/13] esp32: move brownout and cache err int setup --- components/esp32/CMakeLists.txt | 1 - components/esp32/Kconfig | 12 ------- components/esp32/include/esp32/brownout.h | 31 ----------------- .../esp32/include/esp32/cache_err_int.h | 33 ------------------- components/esp32/sdkconfig.rename | 2 -- components/esp32/system_api_esp32.c | 2 -- components/esp32c3/CMakeLists.txt | 3 +- components/esp32c3/include/esp32c3/brownout.h | 31 ----------------- .../esp32c3/include/esp32c3/cache_err_int.h | 33 ------------------- components/esp32c3/system_api_esp32c3.c | 1 - components/esp32s2/CMakeLists.txt | 3 +- components/esp32s3/CMakeLists.txt | 4 +-- components/esp32s3/include/esp32s3/brownout.h | 31 ----------------- .../esp32s3/include/esp32s3/cache_err_int.h | 33 ------------------- components/esp_system/port/CMakeLists.txt | 2 +- .../esp_system/port/arch/riscv/panic_arch.c | 5 +-- .../esp_system/port/arch/xtensa/panic_arch.c | 8 ++--- components/esp_system/port/cpu_start.c | 7 +--- .../port/include}/brownout.h | 0 .../port/include}/cache_err_int.h | 11 +++++-- components/esp_system/port/panic_handler.c | 6 ++-- .../esp_system/port/soc/esp32/CMakeLists.txt | 1 + .../port/soc}/esp32/cache_err_int.c | 0 .../esp_system/port/soc/esp32/cache_err_int.h | 2 ++ .../port/soc/esp32c3/CMakeLists.txt | 1 + .../port/soc}/esp32c3/cache_err_int.c | 0 .../port/soc/esp32c3/cache_err_int.h | 2 ++ .../port/soc/esp32s2/CMakeLists.txt | 1 + .../port/soc}/esp32s2/cache_err_int.c | 0 .../port/soc/esp32s2/cache_err_int.h | 2 ++ .../port/soc/esp32s3/CMakeLists.txt | 1 + .../port/soc}/esp32s3/cache_err_int.c | 0 .../port/soc/esp32s3/cache_err_int.h | 2 ++ components/esp_system/sleep_modes.c | 2 +- components/esp_system/startup.c | 6 ++-- components/esp_wifi/Kconfig | 8 +++++ components/esp_wifi/sdkconfig.rename | 1 + 37 files changed, 43 insertions(+), 245 deletions(-) delete mode 100644 components/esp32/include/esp32/brownout.h delete mode 100644 components/esp32/include/esp32/cache_err_int.h delete mode 100644 components/esp32c3/include/esp32c3/brownout.h delete mode 100644 components/esp32c3/include/esp32c3/cache_err_int.h delete mode 100644 components/esp32s3/include/esp32s3/brownout.h delete mode 100644 components/esp32s3/include/esp32s3/cache_err_int.h rename components/{esp32s2/include/esp32s2 => esp_system/port/include}/brownout.h (100%) rename components/{esp32s2/include/esp32s2 => esp_system/port/include}/cache_err_int.h (80%) rename components/{ => esp_system/port/soc}/esp32/cache_err_int.c (100%) create mode 100644 components/esp_system/port/soc/esp32/cache_err_int.h rename components/{ => esp_system/port/soc}/esp32c3/cache_err_int.c (100%) create mode 100644 components/esp_system/port/soc/esp32c3/cache_err_int.h rename components/{ => esp_system/port/soc}/esp32s2/cache_err_int.c (100%) create mode 100644 components/esp_system/port/soc/esp32s2/cache_err_int.h rename components/{ => esp_system/port/soc}/esp32s3/cache_err_int.c (100%) create mode 100644 components/esp_system/port/soc/esp32s3/cache_err_int.h diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index 9aca5ce09a..6411885668 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -12,7 +12,6 @@ if(BOOTLOADER_BUILD) else() # Regular app build set(srcs - "cache_err_int.c" "cache_sram_mmu.c" "clk.c" "crosscore_int.c" diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig index ef84997304..7a9a102507 100644 --- a/components/esp32/Kconfig +++ b/components/esp32/Kconfig @@ -487,18 +487,6 @@ menu "ESP32-specific" default 6 if ESP32_BROWNOUT_DET_LVL_SEL_6 default 7 if ESP32_BROWNOUT_DET_LVL_SEL_7 - - #Reduce PHY TX power when brownout reset - config ESP32_REDUCE_PHY_TX_POWER - bool "Reduce PHY TX power when brownout reset" - depends on ESP32_BROWNOUT_DET - default y - help - When brownout reset occurs, reduce PHY TX power to keep the code running - - # Note about the use of "FRC1" name: currently FRC1 timer is not used for - # high resolution timekeeping anymore. Instead the esp_timer API is used. - # FRC1 name in the option name is kept for compatibility. choice ESP32_TIME_SYSCALL prompt "Timers used for gettimeofday function" default ESP32_TIME_SYSCALL_USE_RTC_FRC1 diff --git a/components/esp32/include/esp32/brownout.h b/components/esp32/include/esp32/brownout.h deleted file mode 100644 index 7fbe98c11a..0000000000 --- a/components/esp32/include/esp32/brownout.h +++ /dev/null @@ -1,31 +0,0 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#ifndef __ESP_BROWNOUT_H -#define __ESP_BROWNOUT_H - -#ifdef __cplusplus -extern "C" { -#endif - -void esp_brownout_init(void); - -void esp_brownout_disable(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/components/esp32/include/esp32/cache_err_int.h b/components/esp32/include/esp32/cache_err_int.h deleted file mode 100644 index efd7da06c0..0000000000 --- a/components/esp32/include/esp32/cache_err_int.h +++ /dev/null @@ -1,33 +0,0 @@ -// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -/** - * @brief initialize cache invalid access interrupt - * - * This function enables cache invalid access interrupt source and connects it - * to interrupt input number ETS_MEMACCESS_ERR_INUM (see soc/soc.h). It is called - * from the startup code. - */ -void esp_cache_err_int_init(void); - - -/** - * @brief get the CPU which caused cache invalid access interrupt - * @return - * - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt - * - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt - * - (-1) otherwise - */ -int esp_cache_err_get_cpuid(void); diff --git a/components/esp32/sdkconfig.rename b/components/esp32/sdkconfig.rename index 271b93a621..6fa21a95b0 100644 --- a/components/esp32/sdkconfig.rename +++ b/components/esp32/sdkconfig.rename @@ -31,7 +31,5 @@ CONFIG_BROWNOUT_DET_LVL_SEL_5 CONFIG_ESP32_BROWNOUT_DE CONFIG_BROWNOUT_DET_LVL_SEL_6 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 CONFIG_BROWNOUT_DET_LVL_SEL_7 CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 CONFIG_BROWNOUT_DET_LVL CONFIG_ESP32_BROWNOUT_DET_LVL -CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP32_REDUCE_PHY_TX_POWER - # SPI RAM config CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP diff --git a/components/esp32/system_api_esp32.c b/components/esp32/system_api_esp32.c index f8ce88ffb4..bf2be9b4eb 100644 --- a/components/esp32/system_api_esp32.c +++ b/components/esp32/system_api_esp32.c @@ -33,8 +33,6 @@ #include "freertos/xtensa_api.h" #include "soc/soc_memory_layout.h" -#include "esp32/cache_err_int.h" - /* "inner" restart function for after RTOS, interrupts & anything else on this * core are already stopped. Stalls other core, resets hardware, * triggers restart. diff --git a/components/esp32c3/CMakeLists.txt b/components/esp32c3/CMakeLists.txt index d89be62458..6662f0cdbf 100644 --- a/components/esp32c3/CMakeLists.txt +++ b/components/esp32c3/CMakeLists.txt @@ -11,8 +11,7 @@ if(BOOTLOADER_BUILD) else() # Regular app build - set(srcs "cache_err_int.c" - "clk.c" + set(srcs "clk.c" "crosscore_int.c" "dport_access.c" "esp_hmac.c" diff --git a/components/esp32c3/include/esp32c3/brownout.h b/components/esp32c3/include/esp32c3/brownout.h deleted file mode 100644 index da58a09309..0000000000 --- a/components/esp32c3/include/esp32c3/brownout.h +++ /dev/null @@ -1,31 +0,0 @@ -// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#ifndef __ESP_BROWNOUT_H -#define __ESP_BROWNOUT_H - -#ifdef __cplusplus -extern "C" { -#endif - -void esp_brownout_init(void); - -void esp_brownout_disable(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/components/esp32c3/include/esp32c3/cache_err_int.h b/components/esp32c3/include/esp32c3/cache_err_int.h deleted file mode 100644 index 9c8d9ddb2f..0000000000 --- a/components/esp32c3/include/esp32c3/cache_err_int.h +++ /dev/null @@ -1,33 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -/** - * @brief initialize cache invalid access interrupt - * - * This function enables cache invalid access interrupt source and connects it - * to interrupt input number ETS_CACHEERR_INUM (see soc/soc.h). It is called - * from the startup code. - */ -void esp_cache_err_int_init(void); - - -/** - * @brief get the CPU which caused cache invalid access interrupt - * @return - * - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt - * - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt - * - (-1) otherwise - */ -int esp_cache_err_get_cpuid(void); diff --git a/components/esp32c3/system_api_esp32c3.c b/components/esp32c3/system_api_esp32c3.c index 740769cfad..e0db5133c2 100644 --- a/components/esp32c3/system_api_esp32c3.c +++ b/components/esp32c3/system_api_esp32c3.c @@ -20,7 +20,6 @@ #include "esp_efuse.h" #include "esp_log.h" #include "esp32c3/rom/cache.h" -#include "esp32c3/cache_err_int.h" #include "riscv/riscv_interrupts.h" #include "riscv/interrupt.h" #include "esp_rom_uart.h" diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index aab5b71141..2e0495e823 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -11,8 +11,7 @@ if(BOOTLOADER_BUILD) else() # Regular app build - set(srcs "cache_err_int.c" - "memprot.c" + set(srcs "memprot.c" "clk.c" "crosscore_int.c" "dport_access.c" diff --git a/components/esp32s3/CMakeLists.txt b/components/esp32s3/CMakeLists.txt index faa8e68a52..89635dea4c 100644 --- a/components/esp32s3/CMakeLists.txt +++ b/components/esp32s3/CMakeLists.txt @@ -12,12 +12,10 @@ if(BOOTLOADER_BUILD) else() # Regular app build - set(srcs "cache_err_int.c" - "clk.c" + set(srcs "clk.c" "crosscore_int.c" "dport_access.c" "esp_crypto_lock.c" - "memprot.c" "spiram.c" "spiram_psram.c" diff --git a/components/esp32s3/include/esp32s3/brownout.h b/components/esp32s3/include/esp32s3/brownout.h deleted file mode 100644 index f8b657a9fb..0000000000 --- a/components/esp32s3/include/esp32s3/brownout.h +++ /dev/null @@ -1,31 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -#ifndef __ESP_BROWNOUT_H -#define __ESP_BROWNOUT_H - -#ifdef __cplusplus -extern "C" { -#endif - -void esp_brownout_init(void); - -void esp_brownout_disable(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/components/esp32s3/include/esp32s3/cache_err_int.h b/components/esp32s3/include/esp32s3/cache_err_int.h deleted file mode 100644 index 9c8d9ddb2f..0000000000 --- a/components/esp32s3/include/esp32s3/cache_err_int.h +++ /dev/null @@ -1,33 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - - -/** - * @brief initialize cache invalid access interrupt - * - * This function enables cache invalid access interrupt source and connects it - * to interrupt input number ETS_CACHEERR_INUM (see soc/soc.h). It is called - * from the startup code. - */ -void esp_cache_err_int_init(void); - - -/** - * @brief get the CPU which caused cache invalid access interrupt - * @return - * - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt - * - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt - * - (-1) otherwise - */ -int esp_cache_err_get_cpuid(void); diff --git a/components/esp_system/port/CMakeLists.txt b/components/esp_system/port/CMakeLists.txt index cc098d8092..ba256b0686 100644 --- a/components/esp_system/port/CMakeLists.txt +++ b/components/esp_system/port/CMakeLists.txt @@ -1,4 +1,4 @@ -target_include_directories(${COMPONENT_LIB} PRIVATE include .) +target_include_directories(${COMPONENT_LIB} PRIVATE include . PUBLIC soc) set(srcs "cpu_start.c" "panic_handler.c" "brownout.c") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) diff --git a/components/esp_system/port/arch/riscv/panic_arch.c b/components/esp_system/port/arch/riscv/panic_arch.c index 31814ba23c..2d9ad55c08 100644 --- a/components/esp_system/port/arch/riscv/panic_arch.c +++ b/components/esp_system/port/arch/riscv/panic_arch.c @@ -18,15 +18,12 @@ #include "esp_private/panic_internal.h" #include "esp_private/panic_reason.h" #include "riscv/rvruntime-frames.h" +#include "cache_err_int.h" -#if CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/cache_err_int.h" -#endif #if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE #include "esp32c3/memprot.h" #endif - #define DIM(array) (sizeof(array)/sizeof(*array)) /** diff --git a/components/esp_system/port/arch/xtensa/panic_arch.c b/components/esp_system/port/arch/xtensa/panic_arch.c index 9576eb8855..7cf1cdda66 100644 --- a/components/esp_system/port/arch/xtensa/panic_arch.c +++ b/components/esp_system/port/arch/xtensa/panic_arch.c @@ -21,21 +21,19 @@ #include "esp_private/panic_reason.h" #include "soc/soc.h" +#include "cache_err_int.h" + #include "sdkconfig.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/cache_err_int.h" -#else +#if !CONFIG_IDF_TARGET_ESP32 #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #include "soc/rtc_cntl_reg.h" #if CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/cache_err_int.h" #ifdef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE #include "esp32s2/memprot.h" #endif #elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/cache_err_int.h" #ifdef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE #include "esp32s3/memprot.h" #endif diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index 84ff745a4c..65fd8ec570 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -23,6 +23,7 @@ #include "esp_system.h" #include "esp_efuse.h" +#include "cache_err_int.h" #include "esp_clk_internal.h" #include "esp_rom_efuse.h" @@ -33,14 +34,11 @@ #if CONFIG_IDF_TARGET_ESP32 #include "soc/dport_reg.h" #include "esp32/rtc.h" -#include "esp32/cache_err_int.h" #include "esp32/rom/cache.h" #include "esp32/rom/rtc.h" #include "esp32/spiram.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/rtc.h" -#include "esp32s2/brownout.h" -#include "esp32s2/cache_err_int.h" #include "esp32s2/rom/cache.h" #include "esp32s2/rom/rtc.h" #include "esp32s2/spiram.h" @@ -48,8 +46,6 @@ #include "esp32s2/memprot.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rtc.h" -#include "esp32s3/brownout.h" -#include "esp32s3/cache_err_int.h" #include "esp32s3/rom/cache.h" #include "esp32s3/rom/rtc.h" #include "esp32s3/spiram.h" @@ -60,7 +56,6 @@ #include "soc/system_reg.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rtc.h" -#include "esp32c3/cache_err_int.h" #include "esp32s3/rom/cache.h" #include "esp32c3/rom/rtc.h" #include "soc/cache_memory.h" diff --git a/components/esp32s2/include/esp32s2/brownout.h b/components/esp_system/port/include/brownout.h similarity index 100% rename from components/esp32s2/include/esp32s2/brownout.h rename to components/esp_system/port/include/brownout.h diff --git a/components/esp32s2/include/esp32s2/cache_err_int.h b/components/esp_system/port/include/cache_err_int.h similarity index 80% rename from components/esp32s2/include/esp32s2/cache_err_int.h rename to components/esp_system/port/include/cache_err_int.h index 9748d96bf1..d87406f80f 100644 --- a/components/esp32s2/include/esp32s2/cache_err_int.h +++ b/components/esp_system/port/include/cache_err_int.h @@ -12,6 +12,8 @@ // See the License for the specific language governing permissions and // limitations under the License. +#pragma once + #ifdef __cplusplus extern "C" { #endif @@ -20,14 +22,17 @@ extern "C" { * @brief initialize cache invalid access interrupt * * This function enables cache invalid access interrupt source and connects it - * to interrupt input number ETS_MEMACCESS_ERR_INUM (see soc/soc.h). It is called - * from the startup code. + * to interrupt input number. It is called from the startup code. + * + * On ESP32, the interrupt input number is ETS_MEMACCESS_ERR_INUM. On other targets + * it is ETS_CACHEERR_INUM. See soc/soc.h for more information. */ void esp_cache_err_int_init(void); /** - * @brief get the CPU which caused cache invalid access interrupt + * @brief get the CPU which caused cache invalid access interrupt. Helper function in + * panic handling. * @return * - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt * - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt diff --git a/components/esp_system/port/panic_handler.c b/components/esp_system/port/panic_handler.c index a5fcd09a69..deacb4dcf2 100644 --- a/components/esp_system/port/panic_handler.c +++ b/components/esp_system/port/panic_handler.c @@ -25,21 +25,19 @@ #include "hal/soc_hal.h" #include "hal/cpu_hal.h" +#include "cache_err_int.h" + #include "sdkconfig.h" #include "esp_rom_sys.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/dport_access.h" -#include "esp32/cache_err_int.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/memprot.h" -#include "esp32s2/cache_err_int.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/memprot.h" -#include "esp32s3/cache_err_int.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/memprot.h" -#include "esp32c3/cache_err_int.h" #endif #include "esp_private/panic_internal.h" diff --git a/components/esp_system/port/soc/esp32/CMakeLists.txt b/components/esp_system/port/soc/esp32/CMakeLists.txt index 81c53f44e9..501923a925 100644 --- a/components/esp_system/port/soc/esp32/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32/CMakeLists.txt @@ -1,6 +1,7 @@ set(srcs "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c" + "cache_err_int.c" "../../arch/xtensa/panic_arch.c" "../../arch/xtensa/panic_handler_asm.S" "../../arch/xtensa/expression_with_stack.c" diff --git a/components/esp32/cache_err_int.c b/components/esp_system/port/soc/esp32/cache_err_int.c similarity index 100% rename from components/esp32/cache_err_int.c rename to components/esp_system/port/soc/esp32/cache_err_int.c diff --git a/components/esp_system/port/soc/esp32/cache_err_int.h b/components/esp_system/port/soc/esp32/cache_err_int.h new file mode 100644 index 0000000000..07085f5309 --- /dev/null +++ b/components/esp_system/port/soc/esp32/cache_err_int.h @@ -0,0 +1,2 @@ +#pragma once +#include "cache_err_int.h" diff --git a/components/esp_system/port/soc/esp32c3/CMakeLists.txt b/components/esp_system/port/soc/esp32c3/CMakeLists.txt index a5792ab4cd..01676c0ebb 100644 --- a/components/esp_system/port/soc/esp32c3/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32c3/CMakeLists.txt @@ -1,5 +1,6 @@ set(srcs "clk.c" "reset_reason.c" + "cache_err_int.c" "../../async_memcpy_impl_gdma.c" "apb_backup_dma.c" "../../arch/riscv/expression_with_stack.c" diff --git a/components/esp32c3/cache_err_int.c b/components/esp_system/port/soc/esp32c3/cache_err_int.c similarity index 100% rename from components/esp32c3/cache_err_int.c rename to components/esp_system/port/soc/esp32c3/cache_err_int.c diff --git a/components/esp_system/port/soc/esp32c3/cache_err_int.h b/components/esp_system/port/soc/esp32c3/cache_err_int.h new file mode 100644 index 0000000000..07085f5309 --- /dev/null +++ b/components/esp_system/port/soc/esp32c3/cache_err_int.h @@ -0,0 +1,2 @@ +#pragma once +#include "cache_err_int.h" diff --git a/components/esp_system/port/soc/esp32s2/CMakeLists.txt b/components/esp_system/port/soc/esp32s2/CMakeLists.txt index e30c0bf4c1..a5cead5853 100644 --- a/components/esp_system/port/soc/esp32s2/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32s2/CMakeLists.txt @@ -2,6 +2,7 @@ set(srcs "async_memcpy_impl_cp_dma.c" "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c" + "cache_err_int.c" "../../arch/xtensa/panic_arch.c" "../../arch/xtensa/panic_handler_asm.S" "../../arch/xtensa/expression_with_stack.c" diff --git a/components/esp32s2/cache_err_int.c b/components/esp_system/port/soc/esp32s2/cache_err_int.c similarity index 100% rename from components/esp32s2/cache_err_int.c rename to components/esp_system/port/soc/esp32s2/cache_err_int.c diff --git a/components/esp_system/port/soc/esp32s2/cache_err_int.h b/components/esp_system/port/soc/esp32s2/cache_err_int.h new file mode 100644 index 0000000000..07085f5309 --- /dev/null +++ b/components/esp_system/port/soc/esp32s2/cache_err_int.h @@ -0,0 +1,2 @@ +#pragma once +#include "cache_err_int.h" diff --git a/components/esp_system/port/soc/esp32s3/CMakeLists.txt b/components/esp_system/port/soc/esp32s3/CMakeLists.txt index 4f075c1cb3..189b52a2f8 100644 --- a/components/esp_system/port/soc/esp32s3/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32s3/CMakeLists.txt @@ -1,6 +1,7 @@ set(srcs "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c" + "cache_err_int.c" "../../async_memcpy_impl_gdma.c" "../../arch/xtensa/panic_arch.c" "../../arch/xtensa/panic_handler_asm.S" diff --git a/components/esp32s3/cache_err_int.c b/components/esp_system/port/soc/esp32s3/cache_err_int.c similarity index 100% rename from components/esp32s3/cache_err_int.c rename to components/esp_system/port/soc/esp32s3/cache_err_int.c diff --git a/components/esp_system/port/soc/esp32s3/cache_err_int.h b/components/esp_system/port/soc/esp32s3/cache_err_int.h new file mode 100644 index 0000000000..07085f5309 --- /dev/null +++ b/components/esp_system/port/soc/esp32s3/cache_err_int.h @@ -0,0 +1,2 @@ +#pragma once +#include "cache_err_int.h" diff --git a/components/esp_system/sleep_modes.c b/components/esp_system/sleep_modes.c index a11f6fc26f..3013634d5b 100644 --- a/components/esp_system/sleep_modes.c +++ b/components/esp_system/sleep_modes.c @@ -48,6 +48,7 @@ #include "sdkconfig.h" #include "esp_rom_uart.h" +#include "brownout.h" #ifdef CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/cache.h" @@ -58,7 +59,6 @@ #include "esp32s2/clk.h" #include "esp32s2/rom/cache.h" #include "esp32s2/rom/rtc.h" -#include "esp32s2/brownout.h" #include "soc/extmem_reg.h" #include "driver/gpio.h" #elif CONFIG_IDF_TARGET_ESP32S3 diff --git a/components/esp_system/startup.c b/components/esp_system/startup.c index 044391351f..84cb7214eb 100644 --- a/components/esp_system/startup.c +++ b/components/esp_system/startup.c @@ -60,24 +60,22 @@ #include "esp_private/usb_console.h" #include "esp_vfs_cdcacm.h" +#include "brownout.h" + #include "esp_rom_sys.h" // [refactor-todo] make this file completely target-independent #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" #include "esp32/spiram.h" -#include "esp32/brownout.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/clk.h" #include "esp32s2/spiram.h" -#include "esp32s2/brownout.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/clk.h" #include "esp32s3/spiram.h" -#include "esp32s3/brownout.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/clk.h" -#include "esp32c3/brownout.h" #endif /***********************************************/ diff --git a/components/esp_wifi/Kconfig b/components/esp_wifi/Kconfig index 6efb325d68..a7b722ab69 100644 --- a/components/esp_wifi/Kconfig +++ b/components/esp_wifi/Kconfig @@ -488,4 +488,12 @@ menu "PHY" by a small amount but increases RAM use by approximately 4 KB(Wi-Fi only), 2 KB(Bluetooth only) or 5.3 KB(Wi-Fi + Bluetooth). + #Reduce PHY TX power when brownout reset + config ESP32_REDUCE_PHY_TX_POWER + bool "Reduce PHY TX power when brownout reset" + depends on ESP32_BROWNOUT_DET + default y + help + When brownout reset occurs, reduce PHY TX power to keep the code running. + endmenu # PHY diff --git a/components/esp_wifi/sdkconfig.rename b/components/esp_wifi/sdkconfig.rename index c13a1d049b..e65164155c 100644 --- a/components/esp_wifi/sdkconfig.rename +++ b/components/esp_wifi/sdkconfig.rename @@ -3,3 +3,4 @@ CONFIG_SW_COEXIST_ENABLE CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE CONFIG_MAC_BB_PD CONFIG_ESP32_PHY_MAC_BB_PD +CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP32_REDUCE_PHY_TX_POWER From 393bd64a1e48a805e252fc7bbc81d254ba2becac Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Tue, 23 Feb 2021 20:06:41 +0800 Subject: [PATCH 05/13] esp32: move crosscore int --- components/esp32/CMakeLists.txt | 1 - components/esp32c3/CMakeLists.txt | 1 - components/esp32c3/crosscore_int.c | 100 ---------------- components/esp32s2/CMakeLists.txt | 1 - components/esp32s2/crosscore_int.c | 109 ----------------- components/esp32s3/CMakeLists.txt | 1 - components/esp32s3/crosscore_int.c | 111 ------------------ components/esp_system/CMakeLists.txt | 3 +- .../{esp32 => esp_system}/crosscore_int.c | 66 ++++++++--- .../include/esp_private/crosscore_int.h | 5 + 10 files changed, 57 insertions(+), 341 deletions(-) delete mode 100644 components/esp32c3/crosscore_int.c delete mode 100644 components/esp32s2/crosscore_int.c delete mode 100644 components/esp32s3/crosscore_int.c rename components/{esp32 => esp_system}/crosscore_int.c (69%) diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index 6411885668..f0f9f9ef3d 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -14,7 +14,6 @@ else() set(srcs "cache_sram_mmu.c" "clk.c" - "crosscore_int.c" "dport_access.c" "esp_himem.c" "spiram.c" diff --git a/components/esp32c3/CMakeLists.txt b/components/esp32c3/CMakeLists.txt index 6662f0cdbf..33a5853396 100644 --- a/components/esp32c3/CMakeLists.txt +++ b/components/esp32c3/CMakeLists.txt @@ -12,7 +12,6 @@ else() # Regular app build set(srcs "clk.c" - "crosscore_int.c" "dport_access.c" "esp_hmac.c" "esp_ds.c" diff --git a/components/esp32c3/crosscore_int.c b/components/esp32c3/crosscore_int.c deleted file mode 100644 index 2eaccec255..0000000000 --- a/components/esp32c3/crosscore_int.c +++ /dev/null @@ -1,100 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#include -#include "esp_attr.h" -#include "esp_err.h" -#include "esp_intr_alloc.h" -#include "soc/periph_defs.h" -#include "soc/system_reg.h" -#include "hal/cpu_hal.h" -#include "freertos/FreeRTOS.h" -#include "freertos/portmacro.h" - -#define REASON_YIELD BIT(0) -#define REASON_FREQ_SWITCH BIT(1) -#define REASON_PRINT_BACKTRACE BIT(2) - -static portMUX_TYPE reason_spinlock = portMUX_INITIALIZER_UNLOCKED; -static volatile uint32_t reason[portNUM_PROCESSORS]; - -// TODO ESP32-C3 IDF-2449 -static inline void IRAM_ATTR esp_crosscore_isr_handle_yield(void) -{ - portYIELD_FROM_ISR(); -} - -static void IRAM_ATTR esp_crosscore_isr(void *arg) -{ - uint32_t my_reason_val; - //A pointer to the correct reason array item is passed to this ISR. - volatile uint32_t *my_reason = arg; - - //Clear the interrupt first. - WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); - //Grab the reason and clear it. - portENTER_CRITICAL_ISR(&reason_spinlock); - my_reason_val = *my_reason; - *my_reason = 0; - portEXIT_CRITICAL_ISR(&reason_spinlock); - - //Check what we need to do. - if (my_reason_val & REASON_YIELD) { - esp_crosscore_isr_handle_yield(); - } - if (my_reason_val & REASON_FREQ_SWITCH) { - /* Nothing to do here; the frequency switch event was already - * handled by a hook in xtensa_vectors.S. Could be used in the future - * to allow DFS features without the extra latency of the ISR hook. - */ - } - // TODO: ESP32-C3 IDF-2986 - // if (my_reason_val & REASON_PRINT_BACKTRACE) { - // esp_backtrace_print(100); - // } -} - -// Initialize the crosscore interrupt on this core. -void esp_crosscore_int_init(void) -{ - portENTER_CRITICAL(&reason_spinlock); - reason[cpu_hal_get_core_id()] = 0; - portEXIT_CRITICAL(&reason_spinlock); - ESP_ERROR_CHECK(esp_intr_alloc(ETS_FROM_CPU_INTR0_SOURCE, ESP_INTR_FLAG_IRAM, esp_crosscore_isr, (void *)&reason[0], NULL)); -} - -static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) -{ - assert(core_id < portNUM_PROCESSORS); - //Mark the reason we interrupt the other CPU - portENTER_CRITICAL(&reason_spinlock); - reason[core_id] |= reason_mask; - portEXIT_CRITICAL(&reason_spinlock); - //Poke the other CPU. - WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0); -} - -void IRAM_ATTR esp_crosscore_int_send_yield(int core_id) -{ - esp_crosscore_int_send(core_id, REASON_YIELD); -} - -void IRAM_ATTR esp_crosscore_int_send_freq_switch(int core_id) -{ - esp_crosscore_int_send(core_id, REASON_FREQ_SWITCH); -} - -void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id) -{ - esp_crosscore_int_send(core_id, REASON_PRINT_BACKTRACE); -} diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index 2e0495e823..889dfb7d9b 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -13,7 +13,6 @@ else() set(srcs "memprot.c" "clk.c" - "crosscore_int.c" "dport_access.c" "spiram.c" "spiram_psram.c" diff --git a/components/esp32s2/crosscore_int.c b/components/esp32s2/crosscore_int.c deleted file mode 100644 index c347935b52..0000000000 --- a/components/esp32s2/crosscore_int.c +++ /dev/null @@ -1,109 +0,0 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#include -#include - -#include "esp_attr.h" -#include "esp_err.h" -#include "esp_intr_alloc.h" -#include "esp_debug_helpers.h" - -#include "soc/cpu.h" -#include "soc/dport_reg.h" -#include "soc/io_mux_reg.h" -#include "soc/rtc_cntl_reg.h" -#include "soc/periph_defs.h" - -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "freertos/semphr.h" -#include "freertos/queue.h" - - -#define REASON_YIELD BIT(0) -#define REASON_FREQ_SWITCH BIT(1) -#define REASON_PRINT_BACKTRACE BIT(2) - -static portMUX_TYPE reason_spinlock = portMUX_INITIALIZER_UNLOCKED; -static volatile uint32_t reason; - -/* -ToDo: There is a small chance the CPU already has yielded when this ISR is serviced. In that case, it's running the intended task but -the ISR will cause it to switch _away_ from it. portYIELD_FROM_ISR will probably just schedule the task again, but have to check that. -*/ -static inline void IRAM_ATTR esp_crosscore_isr_handle_yield(void) -{ - portYIELD_FROM_ISR(); -} - -static void IRAM_ATTR esp_crosscore_isr(void *arg) { - uint32_t my_reason_val; - //A pointer to the correct reason item is passed to this ISR. - volatile uint32_t *my_reason=arg; - - //Clear the interrupt first. - DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0); - //Grab the reason and clear it. - portENTER_CRITICAL_ISR(&reason_spinlock); - my_reason_val=*my_reason; - *my_reason=0; - portEXIT_CRITICAL_ISR(&reason_spinlock); - - //Check what we need to do. - if (my_reason_val & REASON_YIELD) { - esp_crosscore_isr_handle_yield(); - } - if (my_reason_val & REASON_FREQ_SWITCH) { - /* Nothing to do here; the frequency switch event was already - * handled by a hook in xtensa_vectors.S. Could be used in the future - * to allow DFS features without the extra latency of the ISR hook. - */ - } - if (my_reason_val & REASON_PRINT_BACKTRACE) { - esp_backtrace_print(100); - } -} - -//Initialize the crosscore interrupt on this core. -void esp_crosscore_int_init(void) { - portENTER_CRITICAL(&reason_spinlock); - reason = 0; - portEXIT_CRITICAL(&reason_spinlock); - ESP_ERROR_CHECK(esp_intr_alloc(ETS_FROM_CPU_INTR0_SOURCE, ESP_INTR_FLAG_IRAM, esp_crosscore_isr, (void*)&reason, NULL)); -} - -static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) { - assert(core_id -#include "esp_attr.h" -#include "esp_err.h" -#include "esp_intr_alloc.h" -#include "esp_debug_helpers.h" -#include "soc/periph_defs.h" -#include "soc/system_reg.h" -#include "hal/cpu_hal.h" -#include "freertos/FreeRTOS.h" -#include "freertos/portmacro.h" - -#define REASON_YIELD BIT(0) -#define REASON_FREQ_SWITCH BIT(1) -#define REASON_PRINT_BACKTRACE BIT(2) - -static portMUX_TYPE reason_spinlock = portMUX_INITIALIZER_UNLOCKED; -static volatile uint32_t reason[portNUM_PROCESSORS]; - -static inline void IRAM_ATTR esp_crosscore_isr_handle_yield(void) -{ - portYIELD_FROM_ISR(); -} - -static void IRAM_ATTR esp_crosscore_isr(void *arg) -{ - uint32_t my_reason_val; - //A pointer to the correct reason array item is passed to this ISR. - volatile uint32_t *my_reason = arg; - - //Clear the interrupt first. - if (cpu_hal_get_core_id() == 0) { - WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); - } else { - WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, 0); - } - //Grab the reason and clear it. - portENTER_CRITICAL_ISR(&reason_spinlock); - my_reason_val = *my_reason; - *my_reason = 0; - portEXIT_CRITICAL_ISR(&reason_spinlock); - - //Check what we need to do. - if (my_reason_val & REASON_YIELD) { - esp_crosscore_isr_handle_yield(); - } - if (my_reason_val & REASON_FREQ_SWITCH) { - /* Nothing to do here; the frequency switch event was already - * handled by a hook in xtensa_vectors.S. Could be used in the future - * to allow DFS features without the extra latency of the ISR hook. - */ - } - if (my_reason_val & REASON_PRINT_BACKTRACE) { - esp_backtrace_print(100); - } -} - -// Initialize the crosscore interrupt on this core. -void esp_crosscore_int_init(void) -{ - portENTER_CRITICAL(&reason_spinlock); - reason[cpu_hal_get_core_id()] = 0; - portEXIT_CRITICAL(&reason_spinlock); - if (cpu_hal_get_core_id() == 0) { - ESP_ERROR_CHECK(esp_intr_alloc(ETS_FROM_CPU_INTR0_SOURCE, ESP_INTR_FLAG_IRAM, esp_crosscore_isr, (void *)&reason[0], NULL)); - } else { - ESP_ERROR_CHECK(esp_intr_alloc(ETS_FROM_CPU_INTR1_SOURCE, ESP_INTR_FLAG_IRAM, esp_crosscore_isr, (void *)&reason[1], NULL)); - } -} - -static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) -{ - assert(core_id < portNUM_PROCESSORS); - //Mark the reason we interrupt the other CPU - portENTER_CRITICAL(&reason_spinlock); - reason[core_id] |= reason_mask; - portEXIT_CRITICAL(&reason_spinlock); - //Poke the other CPU. - if (core_id == 0) { - WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0); - } else { - WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, SYSTEM_CPU_INTR_FROM_CPU_1); - } -} - -void IRAM_ATTR esp_crosscore_int_send_yield(int core_id) -{ - esp_crosscore_int_send(core_id, REASON_YIELD); -} - -void IRAM_ATTR esp_crosscore_int_send_freq_switch(int core_id) -{ - esp_crosscore_int_send(core_id, REASON_FREQ_SWITCH); -} - -void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id) -{ - esp_crosscore_int_send(core_id, REASON_PRINT_BACKTRACE); -} diff --git a/components/esp_system/CMakeLists.txt b/components/esp_system/CMakeLists.txt index 2f7ab5c2db..159f84197b 100644 --- a/components/esp_system/CMakeLists.txt +++ b/components/esp_system/CMakeLists.txt @@ -10,7 +10,8 @@ if(BOOTLOADER_BUILD) # Bootloader relies on some Kconfig options defined in esp_system. idf_component_register(SRCS "${srcs}") else() - list(APPEND srcs "esp_err.c" + list(APPEND srcs "crosscore_int.c" + "esp_err.c" "freertos_hooks.c" "intr_alloc.c" "int_wdt.c" diff --git a/components/esp32/crosscore_int.c b/components/esp_system/crosscore_int.c similarity index 69% rename from components/esp32/crosscore_int.c rename to components/esp_system/crosscore_int.c index 309e12058e..113e935706 100644 --- a/components/esp32/crosscore_int.c +++ b/components/esp_system/crosscore_int.c @@ -12,30 +12,31 @@ // See the License for the specific language governing permissions and // limitations under the License. #include -#include - #include "esp_attr.h" #include "esp_err.h" #include "esp_intr_alloc.h" #include "esp_debug_helpers.h" +#include "soc/periph_defs.h" -#include "soc/cpu.h" -#include "soc/dport_reg.h" -#include "soc/gpio_periph.h" -#include "soc/rtc_periph.h" - +#include "hal/cpu_hal.h" #include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "freertos/semphr.h" -#include "freertos/queue.h" +#include "freertos/portmacro.h" +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 +#include "soc/dport_reg.h" +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 +#include "soc/system_reg.h" +#endif #define REASON_YIELD BIT(0) #define REASON_FREQ_SWITCH BIT(1) + +#if !CONFIG_IDF_TARGET_ESP32C3 #define REASON_PRINT_BACKTRACE BIT(2) +#endif static portMUX_TYPE reason_spinlock = portMUX_INITIALIZER_UNLOCKED; -static volatile uint32_t reason[ portNUM_PROCESSORS ]; +static volatile uint32_t reason[portNUM_PROCESSORS]; /* ToDo: There is a small chance the CPU already has yielded when this ISR is serviced. In that case, it's running the intended task but @@ -52,11 +53,24 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) { volatile uint32_t *my_reason=arg; //Clear the interrupt first. - if (xPortGetCoreID()==0) { +#if CONFIG_IDF_TARGET_ESP32 + if (cpu_hal_get_core_id()==0) { DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0); } else { DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, 0); } +#elif CONFIG_IDF_TARGET_ESP32S2 + DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0); +#elif CONFIG_IDF_TARGET_ESP32S3 + if (cpu_hal_get_core_id()==0) { + WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); + } else { + WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, 0); + } +#elif CONFIG_IDF_TARGET_ESP32C3 + WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); +#endif + //Grab the reason and clear it. portENTER_CRITICAL_ISR(&reason_spinlock); my_reason_val=*my_reason; @@ -73,24 +87,30 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) { * to allow DFS features without the extra latency of the ISR hook. */ } +#if !CONFIG_IDF_TARGET_ESP32C3 // IDF-2986 if (my_reason_val & REASON_PRINT_BACKTRACE) { esp_backtrace_print(100); } +#endif } //Initialize the crosscore interrupt on this core. Call this once //on each active core. void esp_crosscore_int_init(void) { portENTER_CRITICAL(&reason_spinlock); - reason[xPortGetCoreID()]=0; + reason[cpu_hal_get_core_id()]=0; portEXIT_CRITICAL(&reason_spinlock); - esp_err_t err __attribute__((unused)); - if (xPortGetCoreID()==0) { + esp_err_t err __attribute__((unused)) = ESP_OK; +#if portNUM_PROCESSORS > 1 + if (cpu_hal_get_core_id()==0) { err = esp_intr_alloc(ETS_FROM_CPU_INTR0_SOURCE, ESP_INTR_FLAG_IRAM, esp_crosscore_isr, (void*)&reason[0], NULL); } else { err = esp_intr_alloc(ETS_FROM_CPU_INTR1_SOURCE, ESP_INTR_FLAG_IRAM, esp_crosscore_isr, (void*)&reason[1], NULL); } - assert(err == ESP_OK); +#else + err = esp_intr_alloc(ETS_FROM_CPU_INTR0_SOURCE, ESP_INTR_FLAG_IRAM, esp_crosscore_isr, (void*)&reason[0], NULL); +#endif + ESP_ERROR_CHECK(err); } static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) { @@ -100,11 +120,23 @@ static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) reason[core_id] |= reason_mask; portEXIT_CRITICAL_ISR(&reason_spinlock); //Poke the other CPU. +#if CONFIG_IDF_TARGET_ESP32 if (core_id==0) { DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0); } else { DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, DPORT_CPU_INTR_FROM_CPU_1); } +#elif CONFIG_IDF_TARGET_ESP32S2 + DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0); +#elif CONFIG_IDF_TARGET_ESP32S3 + if (core_id==0) { + WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0); + } else { + WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, SYSTEM_CPU_INTR_FROM_CPU_1); + } +#elif CONFIG_IDF_TARGET_ESP32C3 + WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0); +#endif } void IRAM_ATTR esp_crosscore_int_send_yield(int core_id) @@ -117,7 +149,9 @@ void IRAM_ATTR esp_crosscore_int_send_freq_switch(int core_id) esp_crosscore_int_send(core_id, REASON_FREQ_SWITCH); } +#if !CONFIG_IDF_TARGET_ESP32C3 void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id) { esp_crosscore_int_send(core_id, REASON_PRINT_BACKTRACE); } +#endif diff --git a/components/esp_system/include/esp_private/crosscore_int.h b/components/esp_system/include/esp_private/crosscore_int.h index bac4afba29..1d6ec809b9 100644 --- a/components/esp_system/include/esp_private/crosscore_int.h +++ b/components/esp_system/include/esp_private/crosscore_int.h @@ -14,6 +14,8 @@ #ifndef __ESP_CROSSCORE_INT_H #define __ESP_CROSSCORE_INT_H +#include "sdkconfig.h" + #ifdef __cplusplus extern "C" { #endif @@ -54,6 +56,8 @@ void esp_crosscore_int_send_yield(int core_id); */ void esp_crosscore_int_send_freq_switch(int core_id); + +#if !CONFIG_IDF_TARGET_ESP32C3 /** * Send an interrupt to a CPU indicating it should print its current backtrace * @@ -63,6 +67,7 @@ void esp_crosscore_int_send_freq_switch(int core_id); * @param core_id Core that should print its backtrace */ void esp_crosscore_int_send_print_backtrace(int core_id); +#endif #ifdef __cplusplus } From a7bac58480661e8d511e97f43e266699ea73f9b2 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Thu, 11 Mar 2021 09:48:30 +0800 Subject: [PATCH 06/13] esp32: move system api to esp_system --- components/esp32/CMakeLists.txt | 3 +- components/esp32c3/CMakeLists.txt | 3 +- components/esp32s2/CMakeLists.txt | 1 - components/esp32s3/CMakeLists.txt | 3 +- .../port/esp32c3/CMakeLists.txt | 3 +- .../port/esp32s3/CMakeLists.txt | 3 +- components/esp_system/CMakeLists.txt | 2 +- .../esp_system/{system_api.c => esp_system.c} | 54 ++++++++++++------- components/esp_system/linker.lf | 2 +- .../esp_system/port/soc/esp32/CMakeLists.txt | 1 + .../port/soc/esp32/system_internal.c} | 42 +++------------ .../port/soc/esp32c3/CMakeLists.txt | 1 + .../port/soc/esp32c3/system_internal.c} | 18 +++---- .../port/soc/esp32s2/CMakeLists.txt | 1 + .../port/soc/esp32s2/system_internal.c} | 28 ++-------- .../port/soc/esp32s3/CMakeLists.txt | 1 + .../port/soc/esp32s3/system_internal.c} | 16 +++--- 17 files changed, 70 insertions(+), 112 deletions(-) rename components/esp_system/{system_api.c => esp_system.c} (82%) rename components/{esp32/system_api_esp32.c => esp_system/port/soc/esp32/system_internal.c} (83%) rename components/{esp32c3/system_api_esp32c3.c => esp_system/port/soc/esp32c3/system_internal.c} (93%) rename components/{esp32s2/system_api_esp32s2.c => esp_system/port/soc/esp32s2/system_internal.c} (88%) rename components/{esp32s3/system_api_esp32s3.c => esp_system/port/soc/esp32s3/system_internal.c} (95%) diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index f0f9f9ef3d..4c11e7cef7 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -17,8 +17,7 @@ else() "dport_access.c" "esp_himem.c" "spiram.c" - "spiram_psram.c" - "system_api_esp32.c") + "spiram_psram.c") set(include_dirs "include") diff --git a/components/esp32c3/CMakeLists.txt b/components/esp32c3/CMakeLists.txt index 33a5853396..3ae3e3d880 100644 --- a/components/esp32c3/CMakeLists.txt +++ b/components/esp32c3/CMakeLists.txt @@ -16,8 +16,7 @@ else() "esp_hmac.c" "esp_ds.c" "esp_crypto_lock.c" - "memprot.c" - "system_api_esp32c3.c") + "memprot.c") set(include_dirs "include") set(requires driver efuse soc riscv) #unfortunately rom/uart uses SOC registers directly diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index 889dfb7d9b..4a0c47dfda 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -16,7 +16,6 @@ else() "dport_access.c" "spiram.c" "spiram_psram.c" - "system_api_esp32s2.c" "esp_crypto_lock.c" "esp_hmac.c" "esp_ds.c") diff --git a/components/esp32s3/CMakeLists.txt b/components/esp32s3/CMakeLists.txt index 6a4e8dd5a6..8bb1c515ef 100644 --- a/components/esp32s3/CMakeLists.txt +++ b/components/esp32s3/CMakeLists.txt @@ -17,8 +17,7 @@ else() "esp_crypto_lock.c" "memprot.c" "spiram.c" - "spiram_psram.c" - "system_api_esp32s3.c") + "spiram_psram.c") set(include_dirs "include") set(requires driver efuse soc xtensa) #unfortunately rom/uart uses SOC registers directly diff --git a/components/esp_hw_support/port/esp32c3/CMakeLists.txt b/components/esp_hw_support/port/esp32c3/CMakeLists.txt index f8dc50fed7..e6713661d9 100644 --- a/components/esp_hw_support/port/esp32c3/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32c3/CMakeLists.txt @@ -4,8 +4,7 @@ set(srcs "cpu_util_esp32c3.c" "rtc_init.c" "rtc_pm.c" "rtc_sleep.c" - "rtc_time.c" - ) + "rtc_time.c") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") diff --git a/components/esp_hw_support/port/esp32s3/CMakeLists.txt b/components/esp_hw_support/port/esp32s3/CMakeLists.txt index ae6dfd219d..9d312c9919 100644 --- a/components/esp_hw_support/port/esp32s3/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s3/CMakeLists.txt @@ -8,7 +8,8 @@ set(srcs "rtc_pm.c" "rtc_sleep.c" "rtc_time.c" - "rtc_wdt.c") + "rtc_wdt.c" + ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") target_sources(${COMPONENT_LIB} PRIVATE "${srcs}") diff --git a/components/esp_system/CMakeLists.txt b/components/esp_system/CMakeLists.txt index 159f84197b..f08e901ddb 100644 --- a/components/esp_system/CMakeLists.txt +++ b/components/esp_system/CMakeLists.txt @@ -17,7 +17,7 @@ else() "int_wdt.c" "esp_async_memcpy.c" "panic.c" - "system_api.c" + "esp_system.c" "startup.c" "system_time.c" "stack_check.c" diff --git a/components/esp_system/system_api.c b/components/esp_system/esp_system.c similarity index 82% rename from components/esp_system/system_api.c rename to components/esp_system/esp_system.c index da96bf72e1..d645b47f95 100644 --- a/components/esp_system/system_api.c +++ b/components/esp_system/esp_system.c @@ -1,3 +1,17 @@ +// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + #include "esp_system.h" #include "esp_private/system_internal.h" #include "esp_heap_caps.h" @@ -16,10 +30,29 @@ #include "esp32c3/memprot.h" #endif - #define SHUTDOWN_HANDLERS_NO 4 static shutdown_handler_t shutdown_handlers[SHUTDOWN_HANDLERS_NO]; +void IRAM_ATTR esp_restart_noos_dig(void) +{ + // make sure all the panic handler output is sent from UART FIFO + if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) { + esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM); + } + + // switch to XTAL (otherwise we will keep running from the PLL) + rtc_clk_cpu_freq_set_xtal(); + +#if CONFIG_IDF_TARGET_ESP32 + esp_cpu_unstall(PRO_CPU_NUM); +#endif + // reset the digital part + SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST); + while (true) { + ; + } +} + esp_err_t esp_register_shutdown_handler(shutdown_handler_t handler) { for (int i = 0; i < SHUTDOWN_HANDLERS_NO; i++) { @@ -44,25 +77,6 @@ esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handler) return ESP_ERR_INVALID_STATE; } -void IRAM_ATTR esp_restart_noos_dig(void) -{ - // make sure all the panic handler output is sent from UART FIFO - if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) { - esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM); - } - - // switch to XTAL (otherwise we will keep running from the PLL) - rtc_clk_cpu_freq_set_xtal(); - -#if CONFIG_IDF_TARGET_ESP32 - esp_cpu_unstall(PRO_CPU_NUM); -#endif - // reset the digital part - SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST); - while (true) { - ; - } -} void IRAM_ATTR esp_restart(void) { diff --git a/components/esp_system/linker.lf b/components/esp_system/linker.lf index b8c568f0e3..b5bf7c49df 100644 --- a/components/esp_system/linker.lf +++ b/components/esp_system/linker.lf @@ -6,7 +6,7 @@ entries: panic_arch (noflash) reset_reason (noflash) esp_err (noflash) - system_api:esp_system_abort (noflash) + esp_system:esp_system_abort (noflash) if ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF: usb_console:esp_usb_console_write_char (noflash) diff --git a/components/esp_system/port/soc/esp32/CMakeLists.txt b/components/esp_system/port/soc/esp32/CMakeLists.txt index 501923a925..570dbc4b97 100644 --- a/components/esp_system/port/soc/esp32/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32/CMakeLists.txt @@ -1,6 +1,7 @@ set(srcs "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c" + "system_internal.c" "cache_err_int.c" "../../arch/xtensa/panic_arch.c" "../../arch/xtensa/panic_handler_asm.S" diff --git a/components/esp32/system_api_esp32.c b/components/esp_system/port/soc/esp32/system_internal.c similarity index 83% rename from components/esp32/system_api_esp32.c rename to components/esp_system/port/soc/esp32/system_internal.c index bf2be9b4eb..a88e180642 100644 --- a/components/esp32/system_api_esp32.c +++ b/components/esp_system/port/soc/esp32/system_internal.c @@ -1,4 +1,4 @@ -// Copyright 2013-2016 Espressif Systems (Shanghai) PTE LTD +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -19,7 +19,6 @@ #include "esp_efuse.h" #include "esp_log.h" #include "sdkconfig.h" -#include "esp32/rom/cache.h" #include "esp_rom_uart.h" #include "soc/dport_reg.h" #include "soc/gpio_periph.h" @@ -32,6 +31,10 @@ #include "hal/cpu_hal.h" #include "freertos/xtensa_api.h" #include "soc/soc_memory_layout.h" +#include "cache_err_int.h" + +#include "esp32/rom/cache.h" +#include "esp32/rom/rtc.h" /* "inner" restart function for after RTOS, interrupts & anything else on this * core are already stopped. Stalls other core, resets hardware, @@ -49,6 +52,8 @@ void IRAM_ATTR esp_restart_noos(void) wdt_hal_write_protect_disable(&rtc_wdt_ctx); wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_SYSTEM); wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE1, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC); + + //Enable flash boot mode so that flash booting after restart is protected by the RTC WDT. wdt_hal_set_flashboot_en(&rtc_wdt_ctx, true); wdt_hal_write_protect_enable(&rtc_wdt_ctx); @@ -140,36 +145,3 @@ void IRAM_ATTR esp_restart_noos(void) ; } } - -void esp_chip_info(esp_chip_info_t* out_info) -{ - uint32_t efuse_rd3 = REG_READ(EFUSE_BLK0_RDATA3_REG); - memset(out_info, 0, sizeof(*out_info)); - - out_info->model = CHIP_ESP32; - out_info->revision = esp_efuse_get_chip_ver(); - - if ((efuse_rd3 & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) { - out_info->cores = 2; - } else { - out_info->cores = 1; - } - out_info->features = CHIP_FEATURE_WIFI_BGN; - if ((efuse_rd3 & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) { - out_info->features |= CHIP_FEATURE_BT | CHIP_FEATURE_BLE; - } - uint32_t package = esp_efuse_get_pkg_ver(); - if (package == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 || - package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 || - package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 || - package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302) { - out_info->features |= CHIP_FEATURE_EMB_FLASH; - } -} - -#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX -inline bool soc_has_cache_lock_bug(void) -{ - return (esp_efuse_get_chip_ver() == 3); -} -#endif diff --git a/components/esp_system/port/soc/esp32c3/CMakeLists.txt b/components/esp_system/port/soc/esp32c3/CMakeLists.txt index 01676c0ebb..72fa69ad6a 100644 --- a/components/esp_system/port/soc/esp32c3/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32c3/CMakeLists.txt @@ -1,5 +1,6 @@ set(srcs "clk.c" "reset_reason.c" + "system_internal.c" "cache_err_int.c" "../../async_memcpy_impl_gdma.c" "apb_backup_dma.c" diff --git a/components/esp32c3/system_api_esp32c3.c b/components/esp_system/port/soc/esp32c3/system_internal.c similarity index 93% rename from components/esp32c3/system_api_esp32c3.c rename to components/esp_system/port/soc/esp32c3/system_internal.c index e0db5133c2..2dd27c0bf6 100644 --- a/components/esp32c3/system_api_esp32c3.c +++ b/components/esp_system/port/soc/esp32c3/system_internal.c @@ -1,4 +1,4 @@ -// Copyright 2013-2020 Espressif Systems (Shanghai) PTE LTD +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -19,7 +19,6 @@ #include "esp_attr.h" #include "esp_efuse.h" #include "esp_log.h" -#include "esp32c3/rom/cache.h" #include "riscv/riscv_interrupts.h" #include "riscv/interrupt.h" #include "esp_rom_uart.h" @@ -28,9 +27,14 @@ #include "soc/timer_group_reg.h" #include "soc/cpu.h" #include "soc/rtc.h" +#include "soc/rtc_periph.h" #include "soc/syscon_reg.h" #include "soc/system_reg.h" #include "hal/wdt_hal.h" +#include "cache_err_int.h" + +#include "esp32c3/rom/cache.h" +#include "esp32c3/rom/rtc.h" /* "inner" restart function for after RTOS, interrupts & anything else on this * core are already stopped. Stalls other core, resets hardware, @@ -96,6 +100,7 @@ void IRAM_ATTR esp_restart_noos(void) SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | BLE_REG_REST_BIT |BLE_PWR_REG_REST_BIT | BLE_BB_REG_REST_BIT); + REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0); // Reset timer/spi/uart @@ -137,12 +142,3 @@ void IRAM_ATTR esp_restart_noos(void) ; } } - -void esp_chip_info(esp_chip_info_t *out_info) -{ - memset(out_info, 0, sizeof(*out_info)); - out_info->model = CHIP_ESP32C3; - out_info->revision = esp_efuse_get_chip_ver(); - out_info->cores = 1; - out_info->features = CHIP_FEATURE_WIFI_BGN | CHIP_FEATURE_BLE; -} diff --git a/components/esp_system/port/soc/esp32s2/CMakeLists.txt b/components/esp_system/port/soc/esp32s2/CMakeLists.txt index a5cead5853..a9cc77a071 100644 --- a/components/esp_system/port/soc/esp32s2/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32s2/CMakeLists.txt @@ -2,6 +2,7 @@ set(srcs "async_memcpy_impl_cp_dma.c" "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c" + "system_internal.c" "cache_err_int.c" "../../arch/xtensa/panic_arch.c" "../../arch/xtensa/panic_handler_asm.S" diff --git a/components/esp32s2/system_api_esp32s2.c b/components/esp_system/port/soc/esp32s2/system_internal.c similarity index 88% rename from components/esp32s2/system_api_esp32s2.c rename to components/esp_system/port/soc/esp32s2/system_internal.c index c7c3afc762..5f8f0ad299 100644 --- a/components/esp32s2/system_api_esp32s2.c +++ b/components/esp_system/port/soc/esp32s2/system_internal.c @@ -1,4 +1,4 @@ -// Copyright 2013-2016 Espressif Systems (Shanghai) PTE LTD +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -28,10 +28,13 @@ #include "soc/cpu.h" #include "soc/rtc.h" #include "soc/syscon_reg.h" +#include "soc/rtc_periph.h" #include "hal/wdt_hal.h" #include "freertos/xtensa_api.h" #include "hal/cpu_hal.h" +#include "esp32s2/rom/rtc.h" + /* "inner" restart function for after RTOS, interrupts & anything else on this * core are already stopped. Stalls other core, resets hardware, * triggers restart. @@ -110,26 +113,3 @@ void IRAM_ATTR esp_restart_noos(void) ; } } - -void esp_chip_info(esp_chip_info_t *out_info) -{ - uint32_t pkg_ver = esp_efuse_get_pkg_ver(); - - memset(out_info, 0, sizeof(*out_info)); - - out_info->model = CHIP_ESP32S2; - out_info->cores = 1; - out_info->features = CHIP_FEATURE_WIFI_BGN; - - switch (pkg_ver) { - case 0: // ESP32-S2 - break; - case 1: // ESP32-S2FH16 - // fallthrough - case 2: // ESP32-S2FH32 - out_info->features |= CHIP_FEATURE_EMB_FLASH; - break; - default: // New package, features unknown - break; - } -} diff --git a/components/esp_system/port/soc/esp32s3/CMakeLists.txt b/components/esp_system/port/soc/esp32s3/CMakeLists.txt index 189b52a2f8..122b3fdf95 100644 --- a/components/esp_system/port/soc/esp32s3/CMakeLists.txt +++ b/components/esp_system/port/soc/esp32s3/CMakeLists.txt @@ -1,6 +1,7 @@ set(srcs "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c" + "system_internal.c" "cache_err_int.c" "../../async_memcpy_impl_gdma.c" "../../arch/xtensa/panic_arch.c" diff --git a/components/esp32s3/system_api_esp32s3.c b/components/esp_system/port/soc/esp32s3/system_internal.c similarity index 95% rename from components/esp32s3/system_api_esp32s3.c rename to components/esp_system/port/soc/esp32s3/system_internal.c index 01450bfcf2..52ee43297e 100644 --- a/components/esp32s3/system_api_esp32s3.c +++ b/components/esp_system/port/soc/esp32s3/system_internal.c @@ -1,4 +1,5 @@ -// Copyright 2013-2020 Espressif Systems (Shanghai) PTE LTD + +// Copyright 2018 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -18,7 +19,6 @@ #include "esp_private/system_internal.h" #include "esp_attr.h" #include "esp_log.h" -#include "esp32s3/rom/cache.h" #include "esp_rom_uart.h" #include "soc/dport_reg.h" #include "soc/gpio_reg.h" @@ -27,9 +27,13 @@ #include "soc/cpu.h" #include "soc/rtc.h" #include "soc/syscon_reg.h" +#include "soc/rtc_periph.h" #include "hal/wdt_hal.h" #include "freertos/xtensa_api.h" +#include "esp32s3/rom/cache.h" +#include "esp32s3/rom/rtc.h" + /* "inner" restart function for after RTOS, interrupts & anything else on this * core are already stopped. Stalls other core, resets hardware, * triggers restart. @@ -139,11 +143,3 @@ void IRAM_ATTR esp_restart_noos(void) ; } } - -void esp_chip_info(esp_chip_info_t *out_info) -{ - memset(out_info, 0, sizeof(*out_info)); - out_info->model = CHIP_ESP32S3; - out_info->cores = 2; - out_info->features = CHIP_FEATURE_WIFI_BGN; -} From 4a08264e7a23aea11e6f6642cab487e719eebd27 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Fri, 26 Feb 2021 15:16:08 +0800 Subject: [PATCH 07/13] esp_system: split esp_system.h header --- .../esp_hw_support/include/esp_chip_info.h | 72 +++++++ components/esp_hw_support/include/esp_mac.h | 134 +++++++++++++ .../esp_hw_support/include/esp_random.h | 54 +++++ .../esp_hw_support/port/esp32/CMakeLists.txt | 3 +- .../esp_hw_support/port/esp32/chip_info.c | 52 +++++ .../port/esp32c3/CMakeLists.txt | 4 +- .../esp_hw_support/port/esp32c3/chip_info.c | 26 +++ .../port/esp32s2/CMakeLists.txt | 4 +- .../esp_hw_support/port/esp32s2/chip_info.c | 40 ++++ .../port/esp32s3/CMakeLists.txt | 1 + .../esp_hw_support/port/esp32s3/chip_info.c | 24 +++ components/esp_system/include/esp_system.h | 186 +----------------- .../fatfs/test_fatfs_host/Makefile.files | 1 + components/spi_flash/sim/Makefile.files | 1 + components/spi_flash/sim/stubs/Makefile.files | 1 + .../spiffs/test_spiffs_host/Makefile.files | 1 + .../test_wl_host/Makefile.files | 1 + 17 files changed, 423 insertions(+), 182 deletions(-) create mode 100644 components/esp_hw_support/include/esp_chip_info.h create mode 100644 components/esp_hw_support/include/esp_mac.h create mode 100644 components/esp_hw_support/include/esp_random.h create mode 100644 components/esp_hw_support/port/esp32/chip_info.c create mode 100644 components/esp_hw_support/port/esp32c3/chip_info.c create mode 100644 components/esp_hw_support/port/esp32s2/chip_info.c create mode 100644 components/esp_hw_support/port/esp32s3/chip_info.c diff --git a/components/esp_hw_support/include/esp_chip_info.h b/components/esp_hw_support/include/esp_chip_info.h new file mode 100644 index 0000000000..35b191ac25 --- /dev/null +++ b/components/esp_hw_support/include/esp_chip_info.h @@ -0,0 +1,72 @@ +// Copyright 2021 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at + +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#include +#include +#include "sdkconfig.h" +#include "esp_bit_defs.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * @brief Chip models + */ +typedef enum { + CHIP_ESP32 = 1, //!< ESP32 + CHIP_ESP32S2 = 2, //!< ESP32-S2 + CHIP_ESP32S3 = 4, //!< ESP32-S3 + CHIP_ESP32C3 = 5, //!< ESP32-C3 +} esp_chip_model_t; + +/* Chip feature flags, used in esp_chip_info_t */ +#define CHIP_FEATURE_EMB_FLASH BIT(0) //!< Chip has embedded flash memory +#define CHIP_FEATURE_WIFI_BGN BIT(1) //!< Chip has 2.4GHz WiFi +#define CHIP_FEATURE_BLE BIT(4) //!< Chip has Bluetooth LE +#define CHIP_FEATURE_BT BIT(5) //!< Chip has Bluetooth Classic + +/** + * @brief The structure represents information about the chip + */ +typedef struct { + esp_chip_model_t model; //!< chip model, one of esp_chip_model_t + uint32_t features; //!< bit mask of CHIP_FEATURE_x feature flags + uint8_t cores; //!< number of CPU cores + uint8_t revision; //!< chip revision number +} esp_chip_info_t; + +/** + * @brief Fill an esp_chip_info_t structure with information about the chip + * @param[out] out_info structure to be filled + */ +void esp_chip_info(esp_chip_info_t* out_info); + +#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX +/** + * @brief Cache lock bug exists or not + * + * @return + * - ture : bug exists + * - false : bug not exists + */ +bool soc_has_cache_lock_bug(void); +#endif + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_hw_support/include/esp_mac.h b/components/esp_hw_support/include/esp_mac.h new file mode 100644 index 0000000000..9d91d8cee4 --- /dev/null +++ b/components/esp_hw_support/include/esp_mac.h @@ -0,0 +1,134 @@ +// Copyright 2021 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at + +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#include "esp_err.h" +#include "sdkconfig.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + ESP_MAC_WIFI_STA, + ESP_MAC_WIFI_SOFTAP, + ESP_MAC_BT, + ESP_MAC_ETH, +} esp_mac_type_t; + +/** @cond */ +#define TWO_UNIVERSAL_MAC_ADDR 2 +#define FOUR_UNIVERSAL_MAC_ADDR 4 +#if CONFIG_IDF_TARGET_ESP32 +#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES +#elif CONFIG_IDF_TARGET_ESP32S2 +#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES +#elif CONFIG_IDF_TARGET_ESP32S3 +#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES +#elif CONFIG_IDF_TARGET_ESP32C3 +#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES +#endif +/** @endcond */ + + +/** + * @brief Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or + * external storage e.g. flash and EEPROM. + * + * Base MAC address is used to generate the MAC addresses used by the networking interfaces. + * If using base MAC address stored in BLK3 of EFUSE or external storage, call this API to set base MAC + * address with the MAC address which is stored in BLK3 of EFUSE or external storage before initializing + * WiFi/BT/Ethernet. + * + * @note Base MAC must be a unicast MAC (least significant bit of first byte must be zero). + * + * @note If not using a valid OUI, set the "locally administered" bit + * (bit value 0x02 in the first byte) to avoid collisions. + * + * @param mac base MAC address, length: 6 bytes. + * + * @return ESP_OK on success + * ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC + */ +esp_err_t esp_base_mac_addr_set(const uint8_t *mac); + +/** + * @brief Return base MAC address which is set using esp_base_mac_addr_set. + * + * @param mac base MAC address, length: 6 bytes. + * + * @return ESP_OK on success + * ESP_ERR_INVALID_MAC base MAC address has not been set + */ +esp_err_t esp_base_mac_addr_get(uint8_t *mac); + +/** + * @brief Return base MAC address which was previously written to BLK3 of EFUSE. + * + * Base MAC address is used to generate the MAC addresses used by the networking interfaces. + * This API returns the custom base MAC address which was previously written to BLK3 of EFUSE. + * Writing this EFUSE allows setting of a different (non-Espressif) base MAC address. It is also + * possible to store a custom base MAC address elsewhere, see esp_base_mac_addr_set() for details. + * + * @param mac base MAC address, length: 6 bytes. + * + * @return ESP_OK on success + * ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE + * ESP_ERR_INVALID_CRC An invalid MAC CRC was read from BLK3 of EFUSE + */ +esp_err_t esp_efuse_mac_get_custom(uint8_t *mac); + +/** + * @brief Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE. + * + * @param mac base MAC address, length: 6 bytes. + * + * @return ESP_OK on success + */ +esp_err_t esp_efuse_mac_get_default(uint8_t *mac); + +/** + * @brief Read base MAC address and set MAC address of the interface. + * + * This function first get base MAC address using esp_base_mac_addr_get or reads base MAC address + * from BLK0 of EFUSE. Then set the MAC address of the interface including wifi station, wifi softap, + * bluetooth and ethernet. + * + * @param mac MAC address of the interface, length: 6 bytes. + * @param type type of MAC address, 0:wifi station, 1:wifi softap, 2:bluetooth, 3:ethernet. + * + * @return ESP_OK on success + */ +esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type); + +/** + * @brief Derive local MAC address from universal MAC address. + * + * This function derives a local MAC address from an universal MAC address. + * A `definition of local vs universal MAC address can be found on Wikipedia + * `. + * In ESP32, universal MAC address is generated from base MAC address in EFUSE or other external storage. + * Local MAC address is derived from the universal MAC address. + * + * @param local_mac Derived local MAC address, length: 6 bytes. + * @param universal_mac Source universal MAC address, length: 6 bytes. + * + * @return ESP_OK on success + */ +esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac); + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_hw_support/include/esp_random.h b/components/esp_hw_support/include/esp_random.h new file mode 100644 index 0000000000..26756b9db8 --- /dev/null +++ b/components/esp_hw_support/include/esp_random.h @@ -0,0 +1,54 @@ +// Copyright 2021 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at + +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Get one random 32-bit word from hardware RNG + * + * The hardware RNG is fully functional whenever an RF subsystem is running (ie Bluetooth or WiFi is enabled). For + * random values, call this function after WiFi or Bluetooth are started. + * + * If the RF subsystem is not used by the program, the function bootloader_random_enable() can be called to enable an + * entropy source. bootloader_random_disable() must be called before RF subsystem or I2S peripheral are used. See these functions' + * documentation for more details. + * + * Any time the app is running without an RF subsystem (or bootloader_random) enabled, RNG hardware should be + * considered a PRNG. A very small amount of entropy is available due to pre-seeding while the IDF + * bootloader is running, but this should not be relied upon for any use. + * + * @return Random value between 0 and UINT32_MAX + */ +uint32_t esp_random(void); + +/** + * @brief Fill a buffer with random bytes from hardware RNG + * + * @note This function has the same restrictions regarding available entropy as esp_random() + * + * @param buf Pointer to buffer to fill with random numbers. + * @param len Length of buffer in bytes + */ +void esp_fill_random(void *buf, size_t len); + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_hw_support/port/esp32/CMakeLists.txt b/components/esp_hw_support/port/esp32/CMakeLists.txt index 9d568ed926..d261f73455 100644 --- a/components/esp_hw_support/port/esp32/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32/CMakeLists.txt @@ -8,7 +8,8 @@ set(srcs "rtc_pm.c" "rtc_sleep.c" "rtc_time.c" - "rtc_wdt.c") + "rtc_wdt.c" + "chip_info.c") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") target_sources(${COMPONENT_LIB} PRIVATE "${srcs}") diff --git a/components/esp_hw_support/port/esp32/chip_info.c b/components/esp_hw_support/port/esp32/chip_info.c new file mode 100644 index 0000000000..023da564c8 --- /dev/null +++ b/components/esp_hw_support/port/esp32/chip_info.c @@ -0,0 +1,52 @@ +// Copyright 2013-2016 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include "esp_chip_info.h" +#include "soc/soc.h" +#include "soc/efuse_reg.h" +#include "esp_efuse.h" + +void esp_chip_info(esp_chip_info_t* out_info) +{ + uint32_t efuse_rd3 = REG_READ(EFUSE_BLK0_RDATA3_REG); + memset(out_info, 0, sizeof(*out_info)); + + out_info->model = CHIP_ESP32; + out_info->revision = esp_efuse_get_chip_ver(); + + if ((efuse_rd3 & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) { + out_info->cores = 2; + } else { + out_info->cores = 1; + } + out_info->features = CHIP_FEATURE_WIFI_BGN; + if ((efuse_rd3 & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) { + out_info->features |= CHIP_FEATURE_BT | CHIP_FEATURE_BLE; + } + uint32_t package = esp_efuse_get_pkg_ver(); + if (package == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 || + package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 || + package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 || + package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302) { + out_info->features |= CHIP_FEATURE_EMB_FLASH; + } +} + +#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX +inline bool soc_has_cache_lock_bug(void) +{ + return (esp_efuse_get_chip_ver() == 3); +} +#endif diff --git a/components/esp_hw_support/port/esp32c3/CMakeLists.txt b/components/esp_hw_support/port/esp32c3/CMakeLists.txt index e6713661d9..c1fd4834e6 100644 --- a/components/esp_hw_support/port/esp32c3/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32c3/CMakeLists.txt @@ -4,7 +4,9 @@ set(srcs "cpu_util_esp32c3.c" "rtc_init.c" "rtc_pm.c" "rtc_sleep.c" - "rtc_time.c") + "rtc_time.c" + "chip_info.c" + ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") diff --git a/components/esp_hw_support/port/esp32c3/chip_info.c b/components/esp_hw_support/port/esp32c3/chip_info.c new file mode 100644 index 0000000000..ffd37a23c0 --- /dev/null +++ b/components/esp_hw_support/port/esp32c3/chip_info.c @@ -0,0 +1,26 @@ +// Copyright 2013-2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include "esp_chip_info.h" +#include "esp_efuse.h" + +void esp_chip_info(esp_chip_info_t *out_info) +{ + memset(out_info, 0, sizeof(*out_info)); + out_info->model = CHIP_ESP32C3; + out_info->revision = esp_efuse_get_chip_ver(); + out_info->cores = 1; + out_info->features = CHIP_FEATURE_WIFI_BGN | CHIP_FEATURE_BLE; +} diff --git a/components/esp_hw_support/port/esp32s2/CMakeLists.txt b/components/esp_hw_support/port/esp32s2/CMakeLists.txt index 28dc4ab6f9..b7511af622 100644 --- a/components/esp_hw_support/port/esp32s2/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s2/CMakeLists.txt @@ -9,7 +9,9 @@ set(srcs "rtc_sleep.c" "rtc_time.c" "rtc_wdt.c" - "regi2c_ctrl.c") + "regi2c_ctrl.c" + "chip_info.c" + ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") target_sources(${COMPONENT_LIB} PRIVATE "${srcs}") diff --git a/components/esp_hw_support/port/esp32s2/chip_info.c b/components/esp_hw_support/port/esp32s2/chip_info.c new file mode 100644 index 0000000000..05f26b450c --- /dev/null +++ b/components/esp_hw_support/port/esp32s2/chip_info.c @@ -0,0 +1,40 @@ +// Copyright 2013-2016 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include "esp_chip_info.h" +#include "esp_efuse.h" + +void esp_chip_info(esp_chip_info_t *out_info) +{ + uint32_t pkg_ver = esp_efuse_get_pkg_ver(); + + memset(out_info, 0, sizeof(*out_info)); + + out_info->model = CHIP_ESP32S2; + out_info->cores = 1; + out_info->features = CHIP_FEATURE_WIFI_BGN; + + switch (pkg_ver) { + case 0: // ESP32-S2 + break; + case 1: // ESP32-S2FH16 + // fallthrough + case 2: // ESP32-S2FH32 + out_info->features |= CHIP_FEATURE_EMB_FLASH; + break; + default: // New package, features unknown + break; + } +} diff --git a/components/esp_hw_support/port/esp32s3/CMakeLists.txt b/components/esp_hw_support/port/esp32s3/CMakeLists.txt index 9d312c9919..93f125d65c 100644 --- a/components/esp_hw_support/port/esp32s3/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s3/CMakeLists.txt @@ -9,6 +9,7 @@ set(srcs "rtc_sleep.c" "rtc_time.c" "rtc_wdt.c" + "chip_info.c" ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") diff --git a/components/esp_hw_support/port/esp32s3/chip_info.c b/components/esp_hw_support/port/esp32s3/chip_info.c new file mode 100644 index 0000000000..5826067e46 --- /dev/null +++ b/components/esp_hw_support/port/esp32s3/chip_info.c @@ -0,0 +1,24 @@ +// Copyright 2013-2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include "esp_chip_info.h" + +void esp_chip_info(esp_chip_info_t *out_info) +{ + memset(out_info, 0, sizeof(*out_info)); + out_info->model = CHIP_ESP32S3; + out_info->cores = 2; + out_info->features = CHIP_FEATURE_WIFI_BGN; +} diff --git a/components/esp_system/include/esp_system.h b/components/esp_system/include/esp_system.h index bd9bb1a6c4..b98b719490 100644 --- a/components/esp_system/include/esp_system.h +++ b/components/esp_system/include/esp_system.h @@ -24,31 +24,17 @@ #include "sdkconfig.h" +// For backward compatibility. These headers +// contains hardware operation functions and definitions +// that were originally declared in this header. +#include "esp_mac.h" +#include "esp_chip_info.h" +#include "esp_random.h" + #ifdef __cplusplus extern "C" { #endif -typedef enum { - ESP_MAC_WIFI_STA, - ESP_MAC_WIFI_SOFTAP, - ESP_MAC_BT, - ESP_MAC_ETH, -} esp_mac_type_t; - -/** @cond */ -#define TWO_UNIVERSAL_MAC_ADDR 2 -#define FOUR_UNIVERSAL_MAC_ADDR 4 -#if CONFIG_IDF_TARGET_ESP32 -#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES -#elif CONFIG_IDF_TARGET_ESP32S2 -#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES -#elif CONFIG_IDF_TARGET_ESP32S3 -#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES -#elif CONFIG_IDF_TARGET_ESP32C3 -#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES -#endif -/** @endcond */ - /** * @brief Reset reasons */ @@ -138,120 +124,6 @@ uint32_t esp_get_free_internal_heap_size(void); */ uint32_t esp_get_minimum_free_heap_size( void ); -/** - * @brief Get one random 32-bit word from hardware RNG - * - * The hardware RNG is fully functional whenever an RF subsystem is running (ie Bluetooth or WiFi is enabled). For - * random values, call this function after WiFi or Bluetooth are started. - * - * If the RF subsystem is not used by the program, the function bootloader_random_enable() can be called to enable an - * entropy source. bootloader_random_disable() must be called before RF subsystem or I2S peripheral are used. See these functions' - * documentation for more details. - * - * Any time the app is running without an RF subsystem (or bootloader_random) enabled, RNG hardware should be - * considered a PRNG. A very small amount of entropy is available due to pre-seeding while the IDF - * bootloader is running, but this should not be relied upon for any use. - * - * @return Random value between 0 and UINT32_MAX - */ -uint32_t esp_random(void); - -/** - * @brief Fill a buffer with random bytes from hardware RNG - * - * @note This function has the same restrictions regarding available entropy as esp_random() - * - * @param buf Pointer to buffer to fill with random numbers. - * @param len Length of buffer in bytes - */ -void esp_fill_random(void *buf, size_t len); - -/** - * @brief Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or - * external storage e.g. flash and EEPROM. - * - * Base MAC address is used to generate the MAC addresses used by the networking interfaces. - * If using base MAC address stored in BLK3 of EFUSE or external storage, call this API to set base MAC - * address with the MAC address which is stored in BLK3 of EFUSE or external storage before initializing - * WiFi/BT/Ethernet. - * - * @note Base MAC must be a unicast MAC (least significant bit of first byte must be zero). - * - * @note If not using a valid OUI, set the "locally administered" bit - * (bit value 0x02 in the first byte) to avoid collisions. - * - * @param mac base MAC address, length: 6 bytes. - * - * @return ESP_OK on success - * ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC - */ -esp_err_t esp_base_mac_addr_set(const uint8_t *mac); - -/** - * @brief Return base MAC address which is set using esp_base_mac_addr_set. - * - * @param mac base MAC address, length: 6 bytes. - * - * @return ESP_OK on success - * ESP_ERR_INVALID_MAC base MAC address has not been set - */ -esp_err_t esp_base_mac_addr_get(uint8_t *mac); - -/** - * @brief Return base MAC address which was previously written to BLK3 of EFUSE. - * - * Base MAC address is used to generate the MAC addresses used by the networking interfaces. - * This API returns the custom base MAC address which was previously written to BLK3 of EFUSE. - * Writing this EFUSE allows setting of a different (non-Espressif) base MAC address. It is also - * possible to store a custom base MAC address elsewhere, see esp_base_mac_addr_set() for details. - * - * @param mac base MAC address, length: 6 bytes. - * - * @return ESP_OK on success - * ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE - * ESP_ERR_INVALID_CRC An invalid MAC CRC was read from BLK3 of EFUSE - */ -esp_err_t esp_efuse_mac_get_custom(uint8_t *mac); - -/** - * @brief Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE. - * - * @param mac base MAC address, length: 6 bytes. - * - * @return ESP_OK on success - */ -esp_err_t esp_efuse_mac_get_default(uint8_t *mac); - -/** - * @brief Read base MAC address and set MAC address of the interface. - * - * This function first get base MAC address using esp_base_mac_addr_get or reads base MAC address - * from BLK0 of EFUSE. Then set the MAC address of the interface including wifi station, wifi softap, - * bluetooth and ethernet. - * - * @param mac MAC address of the interface, length: 6 bytes. - * @param type type of MAC address, 0:wifi station, 1:wifi softap, 2:bluetooth, 3:ethernet. - * - * @return ESP_OK on success - */ -esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type); - -/** - * @brief Derive local MAC address from universal MAC address. - * - * This function derives a local MAC address from an universal MAC address. - * A `definition of local vs universal MAC address can be found on Wikipedia - * `. - * In ESP32, universal MAC address is generated from base MAC address in EFUSE or other external storage. - * Local MAC address is derived from the universal MAC address. - * - * @param local_mac Derived local MAC address, length: 6 bytes. - * @param universal_mac Source universal MAC address, length: 6 bytes. - * - * @return ESP_OK on success - */ -esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac); - /** * @brief Trigger a software abort * @@ -259,50 +131,6 @@ esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac) */ void __attribute__((noreturn)) esp_system_abort(const char* details); -/** - * @brief Chip models - */ -typedef enum { - CHIP_ESP32 = 1, //!< ESP32 - CHIP_ESP32S2 = 2, //!< ESP32-S2 - CHIP_ESP32S3 = 4, //!< ESP32-S3 - CHIP_ESP32C3 = 5, //!< ESP32-C3 -} esp_chip_model_t; - -/* Chip feature flags, used in esp_chip_info_t */ -#define CHIP_FEATURE_EMB_FLASH BIT(0) //!< Chip has embedded flash memory -#define CHIP_FEATURE_WIFI_BGN BIT(1) //!< Chip has 2.4GHz WiFi -#define CHIP_FEATURE_BLE BIT(4) //!< Chip has Bluetooth LE -#define CHIP_FEATURE_BT BIT(5) //!< Chip has Bluetooth Classic - -/** - * @brief The structure represents information about the chip - */ -typedef struct { - esp_chip_model_t model; //!< chip model, one of esp_chip_model_t - uint32_t features; //!< bit mask of CHIP_FEATURE_x feature flags - uint8_t cores; //!< number of CPU cores - uint8_t revision; //!< chip revision number -} esp_chip_info_t; - -/** - * @brief Fill an esp_chip_info_t structure with information about the chip - * @param[out] out_info structure to be filled - */ -void esp_chip_info(esp_chip_info_t* out_info); - - -#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX -/** - * @brief Cache lock bug exists or not - * - * @return - * - ture : bug exists - * - false : bug not exists - */ -bool soc_has_cache_lock_bug(void); -#endif - #ifdef __cplusplus } #endif diff --git a/components/fatfs/test_fatfs_host/Makefile.files b/components/fatfs/test_fatfs_host/Makefile.files index e8e9d1f700..94c2d3c9fc 100644 --- a/components/fatfs/test_fatfs_host/Makefile.files +++ b/components/fatfs/test_fatfs_host/Makefile.files @@ -24,6 +24,7 @@ INCLUDE_DIRS := \ ) \ $(addprefix ../../../components/, \ esp_rom/include \ + esp_hw_support/include \ esp_system/include \ xtensa/include \ xtensa/esp32/include \ diff --git a/components/spi_flash/sim/Makefile.files b/components/spi_flash/sim/Makefile.files index a66ca7733d..55ce3e7157 100644 --- a/components/spi_flash/sim/Makefile.files +++ b/components/spi_flash/sim/Makefile.files @@ -26,6 +26,7 @@ INCLUDE_DIRS := \ $(addprefix ../../../components/, \ esp_rom/include \ esp_common/include \ + esp_hw_support/include \ esp_system/include \ xtensa/include \ xtensa/esp32/include \ diff --git a/components/spi_flash/sim/stubs/Makefile.files b/components/spi_flash/sim/stubs/Makefile.files index a97371b8ab..e18ac1e8c9 100644 --- a/components/spi_flash/sim/stubs/Makefile.files +++ b/components/spi_flash/sim/stubs/Makefile.files @@ -20,6 +20,7 @@ INCLUDE_DIRS := \ vfs/include \ $(addprefix ../../../../components/, \ esp_common/include \ + esp_hw_support/include \ esp_system/include \ soc/esp32/include \ soc/include \ diff --git a/components/spiffs/test_spiffs_host/Makefile.files b/components/spiffs/test_spiffs_host/Makefile.files index 924493e9e4..c79130bdcc 100644 --- a/components/spiffs/test_spiffs_host/Makefile.files +++ b/components/spiffs/test_spiffs_host/Makefile.files @@ -25,6 +25,7 @@ INCLUDE_DIRS := \ $(addprefix ../../../components/, \ esp_rom/include \ esp_common/include \ + esp_hw_support/include \ esp_system/include \ xtensa/include \ xtensa/esp32/include \ diff --git a/components/wear_levelling/test_wl_host/Makefile.files b/components/wear_levelling/test_wl_host/Makefile.files index 47c365a4fc..2f503dbf3b 100644 --- a/components/wear_levelling/test_wl_host/Makefile.files +++ b/components/wear_levelling/test_wl_host/Makefile.files @@ -25,6 +25,7 @@ INCLUDE_DIRS := \ esp_rom/include \ esp_system/include \ esp_common/include \ + esp_hw_support/include \ xtensa/include \ xtensa/esp32/include \ soc/esp32/include \ From e6edf34e82c6d1d45ff808ae9eb052e03af9ca8f Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Fri, 29 Jan 2021 14:40:59 +0800 Subject: [PATCH 08/13] esp32: move esp_clk functions --- components/bt/controller/esp32c3/bt.c | 2 +- components/bt/controller/esp32s3/bt.c | 2 +- components/esp32/CMakeLists.txt | 1 - components/esp32/clk.c | 52 ------- components/esp32c3/CMakeLists.txt | 3 +- components/esp32c3/include/esp32c3/clk.h | 84 ----------- components/esp32c3/include/esp_clk.h | 77 ---------- components/esp32s2/CMakeLists.txt | 1 - components/esp32s2/include/esp32s2/clk.h | 84 ----------- components/esp32s2/include/esp_clk.h | 83 ----------- components/esp32s3/CMakeLists.txt | 3 +- components/esp32s3/include/esp32s3/clk.h | 84 ----------- components/esp32s3/include/esp_clk.h | 77 ---------- components/esp_hw_support/CMakeLists.txt | 4 +- components/esp_hw_support/component.mk | 2 +- components/esp_hw_support/esp_clk.c | 139 ++++++++++++++++++ .../include/esp_clk.h | 0 .../include/esp_private/esp_clk.h} | 2 +- .../include/soc/esp32/clk.h} | 28 +--- .../include/soc/esp32c3/clk.h} | 28 +--- .../include/soc/esp32s2/clk.h} | 34 +---- .../esp_hw_support/include/soc/esp32s3/clk.h | 16 ++ components/esp_pm/linker.lf | 6 +- .../fatfs/test_fatfs_host/Makefile.files | 1 + components/newlib/port/esp_time_impl.c | 55 ------- components/spi_flash/flash_ops.c | 1 + components/spi_flash/sim/Makefile.files | 1 + components/spi_flash/sim/stubs/Makefile.files | 1 + .../spiffs/test_spiffs_host/Makefile.files | 1 + .../test_wl_host/Makefile.files | 1 + 30 files changed, 180 insertions(+), 693 deletions(-) delete mode 100644 components/esp32/clk.c delete mode 100644 components/esp32c3/include/esp32c3/clk.h delete mode 100644 components/esp32c3/include/esp_clk.h delete mode 100644 components/esp32s2/include/esp32s2/clk.h delete mode 100644 components/esp32s2/include/esp_clk.h delete mode 100644 components/esp32s3/include/esp32s3/clk.h delete mode 100644 components/esp32s3/include/esp_clk.h create mode 100644 components/esp_hw_support/esp_clk.c rename components/{esp32 => esp_hw_support}/include/esp_clk.h (100%) rename components/{esp32/include/esp32/clk.h => esp_hw_support/include/esp_private/esp_clk.h} (99%) rename components/{esp32s3/clk.c => esp_hw_support/include/soc/esp32/clk.h} (53%) rename components/{esp32c3/clk.c => esp_hw_support/include/soc/esp32c3/clk.h} (53%) rename components/{esp32s2/clk.c => esp_hw_support/include/soc/esp32s2/clk.h} (50%) create mode 100644 components/esp_hw_support/include/soc/esp32s3/clk.h diff --git a/components/bt/controller/esp32c3/bt.c b/components/bt/controller/esp32c3/bt.c index 7b9d88180f..d6419a47d9 100644 --- a/components/bt/controller/esp32c3/bt.c +++ b/components/bt/controller/esp32c3/bt.c @@ -40,7 +40,7 @@ #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/soc_memory_layout.h" -#include "esp_clk.h" +#include "esp32c3/clk.h" #include "esp_coexist_internal.h" #include "esp32c3/rom/rom_layout.h" #include "esp_timer.h" diff --git a/components/bt/controller/esp32s3/bt.c b/components/bt/controller/esp32s3/bt.c index 71a0aacba8..9d066f21df 100644 --- a/components/bt/controller/esp32s3/bt.c +++ b/components/bt/controller/esp32s3/bt.c @@ -41,7 +41,7 @@ #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "soc/soc_memory_layout.h" -#include "esp_clk.h" +#include "esp32c3/clk.h" #include "esp_coexist_internal.h" #if CONFIG_BT_ENABLED diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index 4c11e7cef7..f5e1fe2cb4 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -13,7 +13,6 @@ else() # Regular app build set(srcs "cache_sram_mmu.c" - "clk.c" "dport_access.c" "esp_himem.c" "spiram.c" diff --git a/components/esp32/clk.c b/components/esp32/clk.c deleted file mode 100644 index b0c9caa530..0000000000 --- a/components/esp32/clk.c +++ /dev/null @@ -1,52 +0,0 @@ -// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include "esp_attr.h" -#include "soc/rtc.h" -#include "esp32/clk.h" - -#define MHZ (1000000) - -// g_ticks_us defined in ROMs for PRO and APP CPU -extern uint32_t g_ticks_per_us_pro; -#ifndef CONFIG_FREERTOS_UNICORE -extern uint32_t g_ticks_per_us_app; -#endif - -int IRAM_ATTR esp_clk_cpu_freq(void) -{ - return g_ticks_per_us_pro * MHZ; -} - -int IRAM_ATTR esp_clk_apb_freq(void) -{ - return MIN(g_ticks_per_us_pro, 80) * MHZ; -} - -int IRAM_ATTR esp_clk_xtal_freq(void) -{ - return rtc_clk_xtal_freq_get() * MHZ; -} - -void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us) -{ - /* Update scale factors used by esp_rom_delay_us */ - g_ticks_per_us_pro = ticks_per_us; -#ifndef CONFIG_FREERTOS_UNICORE - g_ticks_per_us_app = ticks_per_us; -#endif -} diff --git a/components/esp32c3/CMakeLists.txt b/components/esp32c3/CMakeLists.txt index 3ae3e3d880..fb12a45134 100644 --- a/components/esp32c3/CMakeLists.txt +++ b/components/esp32c3/CMakeLists.txt @@ -11,8 +11,7 @@ if(BOOTLOADER_BUILD) else() # Regular app build - set(srcs "clk.c" - "dport_access.c" + set(srcs "dport_access.c" "esp_hmac.c" "esp_ds.c" "esp_crypto_lock.c" diff --git a/components/esp32c3/include/esp32c3/clk.h b/components/esp32c3/include/esp32c3/clk.h deleted file mode 100644 index 1d4e462bcc..0000000000 --- a/components/esp32c3/include/esp32c3/clk.h +++ /dev/null @@ -1,84 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @file esp_clk.h - * - * This file contains declarations of clock related functions. - */ - -/** - * @brief Get the calibration value of RTC slow clock - * - * The value is in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * - * @return the calibration value obtained using rtc_clk_cal, at startup time - */ -uint32_t esp_clk_slowclk_cal_get(void); - -/** - * @brief Update the calibration value of RTC slow clock - * - * The value has to be in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * This value is used by timekeeping functions (such as gettimeofday) to - * calculate current time based on RTC counter value. - * @param value calibration value obtained using rtc_clk_cal - */ -void esp_clk_slowclk_cal_set(uint32_t value); - -/** - * @brief Return current CPU clock frequency - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return CPU clock frequency, in Hz - */ -int esp_clk_cpu_freq(void); - -/** - * @brief Return current APB clock frequency - * - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return APB clock frequency, in Hz - */ -int esp_clk_apb_freq(void); - - -/** - * @brief Read value of RTC counter, converting it to microseconds - * @attention The value returned by this function may change abruptly when - * calibration value of RTC counter is updated via esp_clk_slowclk_cal_set - * function. This should not happen unless application calls esp_clk_slowclk_cal_set. - * In ESP-IDF, esp_clk_slowclk_cal_set is only called in startup code. - * - * @return Value or RTC counter, expressed in microseconds - */ -uint64_t esp_clk_rtc_time(void); - -#ifdef __cplusplus -} -#endif diff --git a/components/esp32c3/include/esp_clk.h b/components/esp32c3/include/esp_clk.h deleted file mode 100644 index 78f6678aac..0000000000 --- a/components/esp32c3/include/esp_clk.h +++ /dev/null @@ -1,77 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -/** - * @file esp_clk.h - * - * This file contains declarations of clock related functions. - */ - -/** - * @brief Get the calibration value of RTC slow clock - * - * The value is in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * - * @return the calibration value obtained using rtc_clk_cal, at startup time - */ -uint32_t esp_clk_slowclk_cal_get(void); - -/** - * @brief Update the calibration value of RTC slow clock - * - * The value has to be in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * This value is used by timekeeping functions (such as gettimeofday) to - * calculate current time based on RTC counter value. - * @param value calibration value obtained using rtc_clk_cal - */ -void esp_clk_slowclk_cal_set(uint32_t value); - -/** - * @brief Return current CPU clock frequency - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return CPU clock frequency, in Hz - */ -int esp_clk_cpu_freq(void); - -/** - * @brief Return current APB clock frequency - * - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return APB clock frequency, in Hz - */ -int esp_clk_apb_freq(void); - - -/** - * @brief Read value of RTC counter, converting it to microseconds - * @attention The value returned by this function may change abruptly when - * calibration value of RTC counter is updated via esp_clk_slowclk_cal_set - * function. This should not happen unless application calls esp_clk_slowclk_cal_set. - * In ESP-IDF, esp_clk_slowclk_cal_set is only called in startup code. - * - * @return Value or RTC counter, expressed in microseconds - */ -uint64_t esp_clk_rtc_time(void); diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index 4a0c47dfda..6cf09ac6f5 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -12,7 +12,6 @@ else() # Regular app build set(srcs "memprot.c" - "clk.c" "dport_access.c" "spiram.c" "spiram_psram.c" diff --git a/components/esp32s2/include/esp32s2/clk.h b/components/esp32s2/include/esp32s2/clk.h deleted file mode 100644 index 8a0952fadc..0000000000 --- a/components/esp32s2/include/esp32s2/clk.h +++ /dev/null @@ -1,84 +0,0 @@ -// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @file esp_clk.h - * - * This file contains declarations of clock related functions. - */ - -/** - * @brief Get the calibration value of RTC slow clock - * - * The value is in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * - * @return the calibration value obtained using rtc_clk_cal, at startup time - */ -uint32_t esp_clk_slowclk_cal_get(void); - -/** - * @brief Update the calibration value of RTC slow clock - * - * The value has to be in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * This value is used by timekeeping functions (such as gettimeofday) to - * calculate current time based on RTC counter value. - * @param value calibration value obtained using rtc_clk_cal - */ -void esp_clk_slowclk_cal_set(uint32_t value); - -/** - * @brief Return current CPU clock frequency - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return CPU clock frequency, in Hz - */ -int esp_clk_cpu_freq(void); - -/** - * @brief Return current APB clock frequency - * - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return APB clock frequency, in Hz - */ -int esp_clk_apb_freq(void); - - -/** - * @brief Read value of RTC counter, converting it to microseconds - * @attention The value returned by this function may change abruptly when - * calibration value of RTC counter is updated via esp_clk_slowclk_cal_set - * function. This should not happen unless application calls esp_clk_slowclk_cal_set. - * In ESP-IDF, esp_clk_slowclk_cal_set is only called in startup code. - * - * @return Value or RTC counter, expressed in microseconds - */ -uint64_t esp_clk_rtc_time(void); - -#ifdef __cplusplus -} -#endif diff --git a/components/esp32s2/include/esp_clk.h b/components/esp32s2/include/esp_clk.h deleted file mode 100644 index 430d1c1b7a..0000000000 --- a/components/esp32s2/include/esp_clk.h +++ /dev/null @@ -1,83 +0,0 @@ -// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @file esp_clk.h - * - * This file contains declarations of clock related functions. - */ - -/** - * @brief Get the calibration value of RTC slow clock - * - * The value is in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * - * @return the calibration value obtained using rtc_clk_cal, at startup time - */ -uint32_t esp_clk_slowclk_cal_get(void); - -/** - * @brief Update the calibration value of RTC slow clock - * - * The value has to be in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * This value is used by timekeeping functions (such as gettimeofday) to - * calculate current time based on RTC counter value. - * @param value calibration value obtained using rtc_clk_cal - */ -void esp_clk_slowclk_cal_set(uint32_t value); - -/** - * @brief Return current CPU clock frequency - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return CPU clock frequency, in Hz - */ -int esp_clk_cpu_freq(void); - -/** - * @brief Return current APB clock frequency - * - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return APB clock frequency, in Hz - */ -int esp_clk_apb_freq(void); - - -/** - * @brief Read value of RTC counter, converting it to microseconds - * @attention The value returned by this function may change abruptly when - * calibration value of RTC counter is updated via esp_clk_slowclk_cal_set - * function. This should not happen unless application calls esp_clk_slowclk_cal_set. - * In ESP-IDF, esp_clk_slowclk_cal_set is only called in startup code. - * - * @return Value or RTC counter, expressed in microseconds - */ -uint64_t esp_clk_rtc_time(void); - -#ifdef __cplusplus -} -#endif diff --git a/components/esp32s3/CMakeLists.txt b/components/esp32s3/CMakeLists.txt index 8bb1c515ef..dde455bbf9 100644 --- a/components/esp32s3/CMakeLists.txt +++ b/components/esp32s3/CMakeLists.txt @@ -12,8 +12,7 @@ if(BOOTLOADER_BUILD) else() # Regular app build - set(srcs "clk.c" - "dport_access.c" + set(srcs "dport_access.c" "esp_crypto_lock.c" "memprot.c" "spiram.c" diff --git a/components/esp32s3/include/esp32s3/clk.h b/components/esp32s3/include/esp32s3/clk.h deleted file mode 100644 index 1d4e462bcc..0000000000 --- a/components/esp32s3/include/esp32s3/clk.h +++ /dev/null @@ -1,84 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @file esp_clk.h - * - * This file contains declarations of clock related functions. - */ - -/** - * @brief Get the calibration value of RTC slow clock - * - * The value is in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * - * @return the calibration value obtained using rtc_clk_cal, at startup time - */ -uint32_t esp_clk_slowclk_cal_get(void); - -/** - * @brief Update the calibration value of RTC slow clock - * - * The value has to be in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * This value is used by timekeeping functions (such as gettimeofday) to - * calculate current time based on RTC counter value. - * @param value calibration value obtained using rtc_clk_cal - */ -void esp_clk_slowclk_cal_set(uint32_t value); - -/** - * @brief Return current CPU clock frequency - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return CPU clock frequency, in Hz - */ -int esp_clk_cpu_freq(void); - -/** - * @brief Return current APB clock frequency - * - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return APB clock frequency, in Hz - */ -int esp_clk_apb_freq(void); - - -/** - * @brief Read value of RTC counter, converting it to microseconds - * @attention The value returned by this function may change abruptly when - * calibration value of RTC counter is updated via esp_clk_slowclk_cal_set - * function. This should not happen unless application calls esp_clk_slowclk_cal_set. - * In ESP-IDF, esp_clk_slowclk_cal_set is only called in startup code. - * - * @return Value or RTC counter, expressed in microseconds - */ -uint64_t esp_clk_rtc_time(void); - -#ifdef __cplusplus -} -#endif diff --git a/components/esp32s3/include/esp_clk.h b/components/esp32s3/include/esp_clk.h deleted file mode 100644 index 78f6678aac..0000000000 --- a/components/esp32s3/include/esp_clk.h +++ /dev/null @@ -1,77 +0,0 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -/** - * @file esp_clk.h - * - * This file contains declarations of clock related functions. - */ - -/** - * @brief Get the calibration value of RTC slow clock - * - * The value is in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * - * @return the calibration value obtained using rtc_clk_cal, at startup time - */ -uint32_t esp_clk_slowclk_cal_get(void); - -/** - * @brief Update the calibration value of RTC slow clock - * - * The value has to be in the same format as returned by rtc_clk_cal (microseconds, - * in Q13.19 fixed-point format). - * This value is used by timekeeping functions (such as gettimeofday) to - * calculate current time based on RTC counter value. - * @param value calibration value obtained using rtc_clk_cal - */ -void esp_clk_slowclk_cal_set(uint32_t value); - -/** - * @brief Return current CPU clock frequency - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return CPU clock frequency, in Hz - */ -int esp_clk_cpu_freq(void); - -/** - * @brief Return current APB clock frequency - * - * When frequency switching is performed, this frequency may change. - * However it is guaranteed that the frequency never changes with a critical - * section. - * - * @return APB clock frequency, in Hz - */ -int esp_clk_apb_freq(void); - - -/** - * @brief Read value of RTC counter, converting it to microseconds - * @attention The value returned by this function may change abruptly when - * calibration value of RTC counter is updated via esp_clk_slowclk_cal_set - * function. This should not happen unless application calls esp_clk_slowclk_cal_set. - * In ESP-IDF, esp_clk_slowclk_cal_set is only called in startup code. - * - * @return Value or RTC counter, expressed in microseconds - */ -uint64_t esp_clk_rtc_time(void); diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index 6ef6036c6d..29a65a9303 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -7,11 +7,11 @@ endif() set(srcs "compare_set.c" "cpu_util.c") if(NOT BOOTLOADER_BUILD) - list(APPEND srcs "clk_ctrl_os.c" "mac_addr.c" "hw_random.c") + list(APPEND srcs "esp_clk.c" "clk_ctrl_os.c" "mac_addr.c" "hw_random.c") endif() idf_component_register(SRCS ${srcs} - INCLUDE_DIRS include + INCLUDE_DIRS include include/soc REQUIRES ${requires} PRIV_REQUIRES efuse LDFRAGMENTS linker.lf) diff --git a/components/esp_hw_support/component.mk b/components/esp_hw_support/component.mk index 07566e52b8..b86f339418 100644 --- a/components/esp_hw_support/component.mk +++ b/components/esp_hw_support/component.mk @@ -1,5 +1,5 @@ COMPONENT_SRCDIRS := . port/$(IDF_TARGET) -COMPONENT_ADD_INCLUDEDIRS := . include port/$(IDF_TARGET)/private_include +COMPONENT_ADD_INCLUDEDIRS := . include include/soc port/$(IDF_TARGET)/private_include COMPONENT_ADD_LDFRAGMENTS := linker.lf port/$(IDF_TARGET)/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conversion diff --git a/components/esp_hw_support/esp_clk.c b/components/esp_hw_support/esp_clk.c new file mode 100644 index 0000000000..4342c95d05 --- /dev/null +++ b/components/esp_hw_support/esp_clk.c @@ -0,0 +1,139 @@ +// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include + +#include "esp_attr.h" +#include "soc/rtc.h" + +#if CONFIG_IDF_TARGET_ESP32 +#include "esp32/rom/rtc.h" +#include "esp32/clk.h" +#include "esp32/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/rtc.h" +#include "esp32s2/clk.h" +#include "esp32s2/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/rom/rtc.h" +#include "esp32s3/clk.h" +#include "esp32s3/rtc.h" +#include "esp32s3/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32C3 +#include "esp32c3/rom/rtc.h" +#include "esp32c3/clk.h" +#include "esp32c3/rtc.h" +#endif + +#define MHZ (1000000) + +// g_ticks_us defined in ROMs for PRO and APP CPU +extern uint32_t g_ticks_per_us_pro; +#if CONFIG_IDF_TARGET_ESP32 +#ifndef CONFIG_FREERTOS_UNICORE +extern uint32_t g_ticks_per_us_app; +#endif +#endif + +static _lock_t s_esp_rtc_time_lock; +static RTC_DATA_ATTR uint64_t s_esp_rtc_time_us = 0, s_rtc_last_ticks = 0; + +int IRAM_ATTR esp_clk_cpu_freq(void) +{ +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 + return ets_get_cpu_frequency() * MHZ; +#else + return g_ticks_per_us_pro * MHZ; +#endif +} + +int IRAM_ATTR esp_clk_apb_freq(void) +{ +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 + return MIN(ets_get_cpu_frequency(), 81) * MHZ; +#else + return MIN(g_ticks_per_us_pro, 80) * MHZ; +#endif +} + +int IRAM_ATTR esp_clk_xtal_freq(void) +{ + return rtc_clk_xtal_freq_get() * MHZ; +} + +#ifndef CONFIG_IDF_TARGET_ESP32C3 +void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us) +{ + /* Update scale factors used by esp_rom_delay_us */ + g_ticks_per_us_pro = ticks_per_us; +#if CONFIG_IDF_TARGET_ESP32 +#ifndef CONFIG_FREERTOS_UNICORE + g_ticks_per_us_app = ticks_per_us; +#endif +#endif +} +#endif + +uint64_t esp_rtc_get_time_us(void) +{ + _lock_acquire(&s_esp_rtc_time_lock); + const uint32_t cal = esp_clk_slowclk_cal_get(); + const uint64_t rtc_this_ticks = rtc_time_get(); + const uint64_t ticks = rtc_this_ticks - s_rtc_last_ticks; + /* RTC counter result is up to 2^48, calibration factor is up to 2^24, + * for a 32kHz clock. We need to calculate (assuming no overflow): + * (ticks * cal) >> RTC_CLK_CAL_FRACT + * + * An overflow in the (ticks * cal) multiplication would cause time to + * wrap around after approximately 13 days, which is probably not enough + * for some applications. + * Therefore multiplication is split into two terms, for the lower 32-bit + * and the upper 16-bit parts of "ticks", i.e.: + * ((ticks_low + 2^32 * ticks_high) * cal) >> RTC_CLK_CAL_FRACT + */ + const uint64_t ticks_low = ticks & UINT32_MAX; + const uint64_t ticks_high = ticks >> 32; + const uint64_t delta_time_us = ((ticks_low * cal) >> RTC_CLK_CAL_FRACT) + + ((ticks_high * cal) << (32 - RTC_CLK_CAL_FRACT)); + s_esp_rtc_time_us += delta_time_us; + s_rtc_last_ticks = rtc_this_ticks; + _lock_release(&s_esp_rtc_time_lock); + return s_esp_rtc_time_us; +} + +void esp_clk_slowclk_cal_set(uint32_t new_cal) +{ +#if defined(CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER) + /* To force monotonic time values even when clock calibration value changes, + * we adjust esp_rtc_time + */ + esp_rtc_get_time_us(); +#endif // CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER + REG_WRITE(RTC_SLOW_CLK_CAL_REG, new_cal); +} + +uint32_t esp_clk_slowclk_cal_get(void) +{ + return REG_READ(RTC_SLOW_CLK_CAL_REG); +} + +uint64_t esp_clk_rtc_time(void) +{ +#ifdef CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER + return esp_rtc_get_time_us(); +#else + return 0; +#endif +} diff --git a/components/esp32/include/esp_clk.h b/components/esp_hw_support/include/esp_clk.h similarity index 100% rename from components/esp32/include/esp_clk.h rename to components/esp_hw_support/include/esp_clk.h diff --git a/components/esp32/include/esp32/clk.h b/components/esp_hw_support/include/esp_private/esp_clk.h similarity index 99% rename from components/esp32/include/esp32/clk.h rename to components/esp_hw_support/include/esp_private/esp_clk.h index dde169a16e..14326898bd 100644 --- a/components/esp32/include/esp32/clk.h +++ b/components/esp_hw_support/include/esp_private/esp_clk.h @@ -20,7 +20,7 @@ extern "C" { #endif /** - * @file esp32/clk.h + * @file esp_clk.h * * This file contains declarations of clock related functions. */ diff --git a/components/esp32s3/clk.c b/components/esp_hw_support/include/soc/esp32/clk.h similarity index 53% rename from components/esp32s3/clk.c rename to components/esp_hw_support/include/soc/esp32/clk.h index 08b3c5d6e8..31902ebad0 100644 --- a/components/esp32s3/clk.c +++ b/components/esp_hw_support/include/soc/esp32/clk.h @@ -1,4 +1,4 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD +// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -12,27 +12,5 @@ // See the License for the specific language governing permissions and // limitations under the License. -#include -#include - -#include "esp_attr.h" -#include "esp32s3/clk.h" -#include "esp32s3/rom/ets_sys.h" -#include "soc/rtc.h" - -#define MHZ (1000000) - -int IRAM_ATTR esp_clk_cpu_freq(void) -{ - return ets_get_cpu_frequency() * MHZ; -} - -int IRAM_ATTR esp_clk_apb_freq(void) -{ - return MIN(ets_get_cpu_frequency(), 80) * MHZ; -} - -int IRAM_ATTR esp_clk_xtal_freq(void) -{ - return rtc_clk_xtal_freq_get() * MHZ; -} +#pragma once +#include "esp_private/esp_clk.h" diff --git a/components/esp32c3/clk.c b/components/esp_hw_support/include/soc/esp32c3/clk.h similarity index 53% rename from components/esp32c3/clk.c rename to components/esp_hw_support/include/soc/esp32c3/clk.h index 978331a28b..31902ebad0 100644 --- a/components/esp32c3/clk.c +++ b/components/esp_hw_support/include/soc/esp32c3/clk.h @@ -1,4 +1,4 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD +// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -12,27 +12,5 @@ // See the License for the specific language governing permissions and // limitations under the License. -#include -#include - -#include "esp_attr.h" -#include "soc/rtc.h" -#include "esp32c3/clk.h" -#include "esp32c3/rom/ets_sys.h" - -#define MHZ (1000000) - -int IRAM_ATTR esp_clk_cpu_freq(void) -{ - return ets_get_cpu_frequency() * MHZ; -} - -int IRAM_ATTR esp_clk_apb_freq(void) -{ - return MIN(80, ets_get_cpu_frequency()) * MHZ; -} - -int IRAM_ATTR esp_clk_xtal_freq(void) -{ - return rtc_clk_xtal_freq_get() * MHZ; -} +#pragma once +#include "esp_private/esp_clk.h" diff --git a/components/esp32s2/clk.c b/components/esp_hw_support/include/soc/esp32s2/clk.h similarity index 50% rename from components/esp32s2/clk.c rename to components/esp_hw_support/include/soc/esp32s2/clk.h index 59a61ed585..31902ebad0 100644 --- a/components/esp32s2/clk.c +++ b/components/esp_hw_support/include/soc/esp32s2/clk.h @@ -12,35 +12,5 @@ // See the License for the specific language governing permissions and // limitations under the License. -#include -#include - -#include "esp_attr.h" -#include "soc/rtc.h" -#include "esp32s2/clk.h" - -#define MHZ (1000000) - -// g_ticks_us defined in ROMs -extern uint32_t g_ticks_per_us_pro; - -int IRAM_ATTR esp_clk_cpu_freq(void) -{ - return g_ticks_per_us_pro * MHZ; -} - -int IRAM_ATTR esp_clk_apb_freq(void) -{ - return MIN(g_ticks_per_us_pro, 80) * MHZ; -} - -int IRAM_ATTR esp_clk_xtal_freq(void) -{ - return rtc_clk_xtal_freq_get() * MHZ; -} - -void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us) -{ - /* Update scale factors used by esp_rom_delay_us */ - g_ticks_per_us_pro = ticks_per_us; -} +#pragma once +#include "esp_private/esp_clk.h" diff --git a/components/esp_hw_support/include/soc/esp32s3/clk.h b/components/esp_hw_support/include/soc/esp32s3/clk.h new file mode 100644 index 0000000000..31902ebad0 --- /dev/null +++ b/components/esp_hw_support/include/soc/esp32s3/clk.h @@ -0,0 +1,16 @@ +// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once +#include "esp_private/esp_clk.h" diff --git a/components/esp_pm/linker.lf b/components/esp_pm/linker.lf index f1fe2f4baa..2d9ea8d3ed 100644 --- a/components/esp_pm/linker.lf +++ b/components/esp_pm/linker.lf @@ -12,6 +12,9 @@ archive: libesp_hw_support.a entries: if PM_SLP_IRAM_OPT = y: rtc_init:rtc_vddsdio_get_config (noflash) + esp_clk:esp_clk_slowclk_cal_set (noflash) + esp_clk:esp_clk_slowclk_cal_get (noflash) + esp_clk:esp_rtc_get_time_us (noflash) [mapping:esp_system_pm] archive: libesp_system.a @@ -47,9 +50,6 @@ entries: if PM_SLP_IRAM_OPT = y: esp_time_impl:esp_time_impl_set_boot_time (noflash) esp_time_impl:esp_time_impl_get_boot_time (noflash) - esp_time_impl:esp_clk_slowclk_cal_get (noflash) - esp_time_impl:esp_rtc_get_time_us (noflash) - esp_time_impl:esp_clk_slowclk_cal_set (noflash) esp_time_impl:esp_set_time_from_rtc (noflash) [mapping:driver_pm] diff --git a/components/fatfs/test_fatfs_host/Makefile.files b/components/fatfs/test_fatfs_host/Makefile.files index 94c2d3c9fc..2c16bd8ddb 100644 --- a/components/fatfs/test_fatfs_host/Makefile.files +++ b/components/fatfs/test_fatfs_host/Makefile.files @@ -25,6 +25,7 @@ INCLUDE_DIRS := \ $(addprefix ../../../components/, \ esp_rom/include \ esp_hw_support/include \ + esp_hw_support/include/soc \ esp_system/include \ xtensa/include \ xtensa/esp32/include \ diff --git a/components/newlib/port/esp_time_impl.c b/components/newlib/port/esp_time_impl.c index 5317156b63..db8bc529d7 100644 --- a/components/newlib/port/esp_time_impl.c +++ b/components/newlib/port/esp_time_impl.c @@ -60,9 +60,6 @@ static uint64_t s_boot_time; // when RTC is used to persist time, two RTC_STORE static _lock_t s_boot_time_lock; -static _lock_t s_esp_rtc_time_lock; -static RTC_DATA_ATTR uint64_t s_esp_rtc_time_us = 0, s_rtc_last_ticks = 0; - #if defined( CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER ) || defined( CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER ) uint64_t esp_time_impl_get_time_since_boot(void) { @@ -106,15 +103,6 @@ void esp_time_impl_set_boot_time(uint64_t time_us) _lock_release(&s_boot_time_lock); } -uint64_t esp_clk_rtc_time(void) -{ -#ifdef CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER - return esp_rtc_get_time_us(); -#else - return 0; -#endif -} - uint64_t esp_time_impl_get_boot_time(void) { uint64_t result; @@ -128,49 +116,6 @@ uint64_t esp_time_impl_get_boot_time(void) return result; } -uint32_t esp_clk_slowclk_cal_get(void) -{ - return REG_READ(RTC_SLOW_CLK_CAL_REG); -} - -uint64_t esp_rtc_get_time_us(void) -{ - _lock_acquire(&s_esp_rtc_time_lock); - const uint32_t cal = esp_clk_slowclk_cal_get(); - const uint64_t rtc_this_ticks = rtc_time_get(); - const uint64_t ticks = rtc_this_ticks - s_rtc_last_ticks; - /* RTC counter result is up to 2^48, calibration factor is up to 2^24, - * for a 32kHz clock. We need to calculate (assuming no overflow): - * (ticks * cal) >> RTC_CLK_CAL_FRACT - * - * An overflow in the (ticks * cal) multiplication would cause time to - * wrap around after approximately 13 days, which is probably not enough - * for some applications. - * Therefore multiplication is split into two terms, for the lower 32-bit - * and the upper 16-bit parts of "ticks", i.e.: - * ((ticks_low + 2^32 * ticks_high) * cal) >> RTC_CLK_CAL_FRACT - */ - const uint64_t ticks_low = ticks & UINT32_MAX; - const uint64_t ticks_high = ticks >> 32; - const uint64_t delta_time_us = ((ticks_low * cal) >> RTC_CLK_CAL_FRACT) + - ((ticks_high * cal) << (32 - RTC_CLK_CAL_FRACT)); - s_esp_rtc_time_us += delta_time_us; - s_rtc_last_ticks = rtc_this_ticks; - _lock_release(&s_esp_rtc_time_lock); - return s_esp_rtc_time_us; -} - -void esp_clk_slowclk_cal_set(uint32_t new_cal) -{ -#if defined(CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER) - /* To force monotonic time values even when clock calibration value changes, - * we adjust esp_rtc_time - */ - esp_rtc_get_time_us(); -#endif // CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER - REG_WRITE(RTC_SLOW_CLK_CAL_REG, new_cal); -} - void esp_set_time_from_rtc(void) { #if defined( CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER ) && defined( CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER ) diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index efafd28463..f7b6f1b9bd 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -40,6 +40,7 @@ #include "esp32s3/rom/spi_flash.h" #include "esp32s3/rom/cache.h" #include "esp32s3/clk.h" +#include "esp32s3/clk.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/cache.h" #include "esp32c3/rom/spi_flash.h" diff --git a/components/spi_flash/sim/Makefile.files b/components/spi_flash/sim/Makefile.files index 55ce3e7157..57cefe0ebe 100644 --- a/components/spi_flash/sim/Makefile.files +++ b/components/spi_flash/sim/Makefile.files @@ -27,6 +27,7 @@ INCLUDE_DIRS := \ esp_rom/include \ esp_common/include \ esp_hw_support/include \ + esp_hw_support/include/soc \ esp_system/include \ xtensa/include \ xtensa/esp32/include \ diff --git a/components/spi_flash/sim/stubs/Makefile.files b/components/spi_flash/sim/stubs/Makefile.files index e18ac1e8c9..dfa0f2a64b 100644 --- a/components/spi_flash/sim/stubs/Makefile.files +++ b/components/spi_flash/sim/stubs/Makefile.files @@ -21,6 +21,7 @@ INCLUDE_DIRS := \ $(addprefix ../../../../components/, \ esp_common/include \ esp_hw_support/include \ + esp_hw_support/include/soc \ esp_system/include \ soc/esp32/include \ soc/include \ diff --git a/components/spiffs/test_spiffs_host/Makefile.files b/components/spiffs/test_spiffs_host/Makefile.files index c79130bdcc..822b5243b1 100644 --- a/components/spiffs/test_spiffs_host/Makefile.files +++ b/components/spiffs/test_spiffs_host/Makefile.files @@ -26,6 +26,7 @@ INCLUDE_DIRS := \ esp_rom/include \ esp_common/include \ esp_hw_support/include \ + esp_hw_support/include/soc \ esp_system/include \ xtensa/include \ xtensa/esp32/include \ diff --git a/components/wear_levelling/test_wl_host/Makefile.files b/components/wear_levelling/test_wl_host/Makefile.files index 2f503dbf3b..1cd58a8cc2 100644 --- a/components/wear_levelling/test_wl_host/Makefile.files +++ b/components/wear_levelling/test_wl_host/Makefile.files @@ -26,6 +26,7 @@ INCLUDE_DIRS := \ esp_system/include \ esp_common/include \ esp_hw_support/include \ + esp_hw_support/include/soc \ xtensa/include \ xtensa/esp32/include \ soc/esp32/include \ From 9478298aa4982ccfc8155bf4461d026c9e6fa16c Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Wed, 17 Mar 2021 20:42:10 +0800 Subject: [PATCH 09/13] esp32: move mac target specific configs --- components/esp32/Kconfig | 36 ------------------ components/esp32/sdkconfig.rename | 3 -- components/esp32c3/Kconfig | 37 ------------------- components/esp32s2/Kconfig | 31 ---------------- components/esp32s3/Kconfig | 36 ------------------ components/esp_hw_support/Kconfig | 3 ++ .../esp_hw_support/port/esp32/Kconfig.mac | 36 ++++++++++++++++++ .../esp_hw_support/port/esp32c3/Kconfig.mac | 36 ++++++++++++++++++ .../esp_hw_support/port/esp32s2/Kconfig.mac | 30 +++++++++++++++ .../esp_hw_support/port/esp32s3/Kconfig.mac | 35 ++++++++++++++++++ components/esp_hw_support/sdkconfig.rename | 6 +++ 11 files changed, 146 insertions(+), 143 deletions(-) create mode 100644 components/esp_hw_support/port/esp32/Kconfig.mac create mode 100644 components/esp_hw_support/port/esp32c3/Kconfig.mac create mode 100644 components/esp_hw_support/port/esp32s2/Kconfig.mac create mode 100644 components/esp_hw_support/port/esp32s3/Kconfig.mac create mode 100644 components/esp_hw_support/sdkconfig.rename diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig index 7a9a102507..828cd683d8 100644 --- a/components/esp32/Kconfig +++ b/components/esp32/Kconfig @@ -373,42 +373,6 @@ menu "ESP32-specific" default 0x4000 if ESP32_MEMMAP_TRACEMEM && !ESP32_MEMMAP_TRACEMEM_TWOBANKS default 0x0 - choice ESP32_UNIVERSAL_MAC_ADDRESSES - bool "Number of universally administered (by IEEE) MAC address" - default ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR - help - Configure the number of universally administered (by IEEE) MAC addresses. - During initialization, MAC addresses for each network interface are generated or derived from a - single base MAC address. - If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, - Bluetooth and Ethernet) receive a universally administered MAC address. These are generated - sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. - If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) - receive a universally administered MAC address. These are generated sequentially by adding 0 - and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) - receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC - addresses, respectively. - When using the default (Espressif-assigned) base MAC address, either setting can be used. When using - a custom universal MAC address range, the correct setting will depend on the allocation of MAC - addresses in this range (either 2 or 4 per device.) - - config ESP32_UNIVERSAL_MAC_ADDRESSES_TWO - bool "Two" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - select ESP_MAC_ADDR_UNIVERSE_BT - - config ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR - bool "Four" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - select ESP_MAC_ADDR_UNIVERSE_WIFI_AP - select ESP_MAC_ADDR_UNIVERSE_BT - select ESP_MAC_ADDR_UNIVERSE_ETH - endchoice - - config ESP32_UNIVERSAL_MAC_ADDRESSES - int - default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO - default 4 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR config ESP32_ULP_COPROC_ENABLED diff --git a/components/esp32/sdkconfig.rename b/components/esp32/sdkconfig.rename index 6fa21a95b0..f8d5071c39 100644 --- a/components/esp32/sdkconfig.rename +++ b/components/esp32/sdkconfig.rename @@ -6,9 +6,6 @@ CONFIG_SPIRAM_SUPPORT CONFIG_ESP32_SPIRAM_SUPP CONFIG_MEMMAP_TRACEMEM CONFIG_ESP32_MEMMAP_TRACEMEM CONFIG_MEMMAP_TRACEMEM_TWOBANKS CONFIG_ESP32_MEMMAP_TRACEMEM_TWOBANKS CONFIG_TRACEMEM_RESERVE_DRAM CONFIG_ESP32_TRACEMEM_RESERVE_DRAM -CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES -CONFIG_TWO_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO -CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR CONFIG_ESP32_RTC_EXTERNAL_CRYSTAL_ADDITIONAL_CURRENT CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT CONFIG_ESP32_RTC_CLOCK_SOURCE CONFIG_ESP32_RTC_CLK_SRC CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC CONFIG_ESP32_RTC_CLK_SRC_INT_RC diff --git a/components/esp32c3/Kconfig b/components/esp32c3/Kconfig index e5961ffbcb..a3824706b1 100644 --- a/components/esp32c3/Kconfig +++ b/components/esp32c3/Kconfig @@ -48,43 +48,6 @@ menu "ESP32C3-Specific" default 2 if ESP32C3_REV_MIN_2 default 3 if ESP32C3_REV_MIN_3 - choice ESP32C3_UNIVERSAL_MAC_ADDRESSES - bool "Number of universally administered (by IEEE) MAC address" - default ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR - help - Configure the number of universally administered (by IEEE) MAC addresses. - During initialization, MAC addresses for each network interface are generated or derived from a - single base MAC address. - If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, - Bluetooth and Ethernet) receive a universally administered MAC address. These are generated - sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. - If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) - receive a universally administered MAC address. These are generated sequentially by adding 0 - and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) - receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC - addresses, respectively. - When using the default (Espressif-assigned) base MAC address, either setting can be used. When using - a custom universal MAC address range, the correct setting will depend on the allocation of MAC - addresses in this range (either 2 or 4 per device.) - - config ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO - bool "Two" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - select ESP_MAC_ADDR_UNIVERSE_BT - - config ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR - bool "Four" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - select ESP_MAC_ADDR_UNIVERSE_WIFI_AP - select ESP_MAC_ADDR_UNIVERSE_BT - select ESP_MAC_ADDR_UNIVERSE_ETH - endchoice - - config ESP32C3_UNIVERSAL_MAC_ADDRESSES - int - default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO - default 4 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR - config ESP32C3_DEBUG_OCDAWARE bool "Make exception and panic handlers JTAG/OCD aware" default y diff --git a/components/esp32s2/Kconfig b/components/esp32s2/Kconfig index b4aa25dfd2..1f0ed59817 100644 --- a/components/esp32s2/Kconfig +++ b/components/esp32s2/Kconfig @@ -221,37 +221,6 @@ menu "ESP32S2-specific" default 0x0 - choice ESP32S2_UNIVERSAL_MAC_ADDRESSES - bool "Number of universally administered (by IEEE) MAC address" - default ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO - help - Configure the number of universally administered (by IEEE) MAC addresses. - During initialization, MAC addresses for each network interface are generated or derived from a - single base MAC address. - If the number of universal MAC addresses is Two, all interfaces (WiFi station, WiFi softap) receive a - universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively) - to the final octet of the base MAC address. If the number of universal MAC addresses is one, - only WiFi station receives a universally administered MAC address. - It's generated by adding 0 to the base MAC address. - The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses. - When using the default (Espressif-assigned) base MAC address, either setting can be used. When using - a custom universal MAC address range, the correct setting will depend on the allocation of MAC - addresses in this range (either 1 or 2 per device.) - - config ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE - bool "One" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - config ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO - bool "Two" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - select ESP_MAC_ADDR_UNIVERSE_WIFI_AP - endchoice - - config ESP32S2_UNIVERSAL_MAC_ADDRESSES - int - default 1 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE - default 2 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO - config ESP32S2_ULP_COPROC_ENABLED bool "Enable Ultra Low Power (ULP) Coprocessor" default "n" diff --git a/components/esp32s3/Kconfig b/components/esp32s3/Kconfig index 89dff330bf..bd14cdbdf8 100644 --- a/components/esp32s3/Kconfig +++ b/components/esp32s3/Kconfig @@ -282,42 +282,6 @@ menu "ESP32S3-Specific" default 0x0 - choice ESP32S3_UNIVERSAL_MAC_ADDRESSES - bool "Number of universally administered (by IEEE) MAC address" - default ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR - help - Configure the number of universally administered (by IEEE) MAC addresses. - During initialization, MAC addresses for each network interface are generated or derived from a - single base MAC address. - If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, - Bluetooth and Ethernet) receive a universally administered MAC address. These are generated - sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. - If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) - receive a universally administered MAC address. These are generated sequentially by adding 0 - and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) - receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC - addresses, respectively. - When using the default (Espressif-assigned) base MAC address, either setting can be used. When using - a custom universal MAC address range, the correct setting will depend on the allocation of MAC - addresses in this range (either 2 or 4 per device.) - - config ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO - bool "Two" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - select ESP_MAC_ADDR_UNIVERSE_BT - config ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR - bool "Four" - select ESP_MAC_ADDR_UNIVERSE_WIFI_STA - select ESP_MAC_ADDR_UNIVERSE_WIFI_AP - select ESP_MAC_ADDR_UNIVERSE_BT - select ESP_MAC_ADDR_UNIVERSE_ETH - endchoice - - config ESP32S3_UNIVERSAL_MAC_ADDRESSES - int - default 2 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO - default 4 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR - config ESP32S3_ULP_COPROC_ENABLED bool "Enable Ultra Low Power (ULP) Coprocessor" default "n" diff --git a/components/esp_hw_support/Kconfig b/components/esp_hw_support/Kconfig index 797e27c314..f887d100ac 100644 --- a/components/esp_hw_support/Kconfig +++ b/components/esp_hw_support/Kconfig @@ -11,5 +11,8 @@ menu "Hardware Settings" config ESP_MAC_ADDR_UNIVERSE_ETH bool + + # Insert chip-specific MAC config + rsource "./port/$IDF_TARGET/Kconfig.mac" endmenu endmenu diff --git a/components/esp_hw_support/port/esp32/Kconfig.mac b/components/esp_hw_support/port/esp32/Kconfig.mac new file mode 100644 index 0000000000..091be2d3ff --- /dev/null +++ b/components/esp_hw_support/port/esp32/Kconfig.mac @@ -0,0 +1,36 @@ +choice ESP32_UNIVERSAL_MAC_ADDRESSES + bool "Number of universally administered (by IEEE) MAC address" + default ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR + help + Configure the number of universally administered (by IEEE) MAC addresses. + During initialization, MAC addresses for each network interface are generated or derived from a + single base MAC address. + If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, + Bluetooth and Ethernet) receive a universally administered MAC address. These are generated + sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. + If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) + receive a universally administered MAC address. These are generated sequentially by adding 0 + and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) + receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC + addresses, respectively. + When using the default (Espressif-assigned) base MAC address, either setting can be used. When using + a custom universal MAC address range, the correct setting will depend on the allocation of MAC + addresses in this range (either 2 or 4 per device.) + + config ESP32_UNIVERSAL_MAC_ADDRESSES_TWO + bool "Two" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_BT + + config ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR + bool "Four" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_WIFI_AP + select ESP_MAC_ADDR_UNIVERSE_BT + select ESP_MAC_ADDR_UNIVERSE_ETH +endchoice + +config ESP32_UNIVERSAL_MAC_ADDRESSES + int + default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO + default 4 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR diff --git a/components/esp_hw_support/port/esp32c3/Kconfig.mac b/components/esp_hw_support/port/esp32c3/Kconfig.mac new file mode 100644 index 0000000000..ef3224b97d --- /dev/null +++ b/components/esp_hw_support/port/esp32c3/Kconfig.mac @@ -0,0 +1,36 @@ +choice ESP32C3_UNIVERSAL_MAC_ADDRESSES + bool "Number of universally administered (by IEEE) MAC address" + default ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR + help + Configure the number of universally administered (by IEEE) MAC addresses. + During initialization, MAC addresses for each network interface are generated or derived from a + single base MAC address. + If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, + Bluetooth and Ethernet) receive a universally administered MAC address. These are generated + sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. + If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) + receive a universally administered MAC address. These are generated sequentially by adding 0 + and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) + receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC + addresses, respectively. + When using the default (Espressif-assigned) base MAC address, either setting can be used. When using + a custom universal MAC address range, the correct setting will depend on the allocation of MAC + addresses in this range (either 2 or 4 per device.) + + config ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO + bool "Two" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_BT + + config ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR + bool "Four" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_WIFI_AP + select ESP_MAC_ADDR_UNIVERSE_BT + select ESP_MAC_ADDR_UNIVERSE_ETH +endchoice + +config ESP32C3_UNIVERSAL_MAC_ADDRESSES + int + default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO + default 4 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR diff --git a/components/esp_hw_support/port/esp32s2/Kconfig.mac b/components/esp_hw_support/port/esp32s2/Kconfig.mac new file mode 100644 index 0000000000..77c0f56199 --- /dev/null +++ b/components/esp_hw_support/port/esp32s2/Kconfig.mac @@ -0,0 +1,30 @@ +choice ESP32S2_UNIVERSAL_MAC_ADDRESSES + bool "Number of universally administered (by IEEE) MAC address" + default ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO + help + Configure the number of universally administered (by IEEE) MAC addresses. + During initialization, MAC addresses for each network interface are generated or derived from a + single base MAC address. + If the number of universal MAC addresses is Two, all interfaces (WiFi station, WiFi softap) receive a + universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively) + to the final octet of the base MAC address. If the number of universal MAC addresses is one, + only WiFi station receives a universally administered MAC address. + It's generated by adding 0 to the base MAC address. + The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses. + When using the default (Espressif-assigned) base MAC address, either setting can be used. When using + a custom universal MAC address range, the correct setting will depend on the allocation of MAC + addresses in this range (either 1 or 2 per device.) + + config ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE + bool "One" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + config ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO + bool "Two" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_WIFI_AP +endchoice + +config ESP32S2_UNIVERSAL_MAC_ADDRESSES + int + default 1 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE + default 2 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO diff --git a/components/esp_hw_support/port/esp32s3/Kconfig.mac b/components/esp_hw_support/port/esp32s3/Kconfig.mac new file mode 100644 index 0000000000..145bbf1faf --- /dev/null +++ b/components/esp_hw_support/port/esp32s3/Kconfig.mac @@ -0,0 +1,35 @@ +choice ESP32S3_UNIVERSAL_MAC_ADDRESSES + bool "Number of universally administered (by IEEE) MAC address" + default ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR + help + Configure the number of universally administered (by IEEE) MAC addresses. + During initialization, MAC addresses for each network interface are generated or derived from a + single base MAC address. + If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, + Bluetooth and Ethernet) receive a universally administered MAC address. These are generated + sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. + If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) + receive a universally administered MAC address. These are generated sequentially by adding 0 + and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) + receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC + addresses, respectively. + When using the default (Espressif-assigned) base MAC address, either setting can be used. When using + a custom universal MAC address range, the correct setting will depend on the allocation of MAC + addresses in this range (either 2 or 4 per device.) + + config ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO + bool "Two" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_BT + config ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR + bool "Four" + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_WIFI_AP + select ESP_MAC_ADDR_UNIVERSE_BT + select ESP_MAC_ADDR_UNIVERSE_ETH +endchoice + +config ESP32S3_UNIVERSAL_MAC_ADDRESSES + int + default 2 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO + default 4 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR diff --git a/components/esp_hw_support/sdkconfig.rename b/components/esp_hw_support/sdkconfig.rename new file mode 100644 index 0000000000..c52ed568ce --- /dev/null +++ b/components/esp_hw_support/sdkconfig.rename @@ -0,0 +1,6 @@ +# sdkconfig replacement configurations for deprecated options formatted as +# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION + +CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES +CONFIG_TWO_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO +CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR From 1b4e4c37b727f2e1db632bff8dfa577902a6d32a Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Wed, 3 Mar 2021 17:15:27 +0800 Subject: [PATCH 10/13] esp32: remove deprecated esp_intr.h --- components/esp32s2/include/esp_intr.h | 17 ----------------- .../include/esp_intr.h | 0 2 files changed, 17 deletions(-) delete mode 100644 components/esp32s2/include/esp_intr.h rename components/{esp32 => esp_hw_support}/include/esp_intr.h (100%) diff --git a/components/esp32s2/include/esp_intr.h b/components/esp32s2/include/esp_intr.h deleted file mode 100644 index c29dc9bfd1..0000000000 --- a/components/esp32s2/include/esp_intr.h +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once -#warning esp_intr.h is deprecated, please include esp_intr_alloc.h instead -#include "esp_intr_alloc.h" diff --git a/components/esp32/include/esp_intr.h b/components/esp_hw_support/include/esp_intr.h similarity index 100% rename from components/esp32/include/esp_intr.h rename to components/esp_hw_support/include/esp_intr.h From bbc599493ed4c89d21916a206b256825369a5896 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Wed, 10 Mar 2021 19:33:24 +0800 Subject: [PATCH 11/13] esp32: move common fragment definitions --- components/esp32/CMakeLists.txt | 2 +- components/esp32/component.mk | 2 +- components/esp32/ld/esp32_fragments.lf | 120 ------------------ components/esp32c3/CMakeLists.txt | 2 +- components/esp32c3/ld/esp32c3_fragments.lf | 99 --------------- components/esp32s2/CMakeLists.txt | 2 +- components/esp32s3/CMakeLists.txt | 2 +- components/esp32s3/ld/esp32s3_fragments.lf | 99 --------------- components/esp_common/CMakeLists.txt | 3 +- components/esp_common/common.lf | 34 +++++ components/esp_common/component.mk | 2 + components/esp_common/soc.lf | 43 +++++++ components/esp_system/CMakeLists.txt | 2 +- .../app.lf} | 53 +------- components/esp_system/component.mk | 2 +- components/soc/CMakeLists.txt | 2 +- .../api-guides/linker-script-generation.rst | 5 +- .../api-guides/linker-script-generation.rst | 2 +- tools/ci/test_build_system.sh | 2 +- tools/ci/test_build_system_cmake.sh | 6 +- 20 files changed, 105 insertions(+), 379 deletions(-) delete mode 100644 components/esp32/ld/esp32_fragments.lf delete mode 100644 components/esp32c3/ld/esp32c3_fragments.lf delete mode 100644 components/esp32s3/ld/esp32s3_fragments.lf create mode 100644 components/esp_common/common.lf create mode 100644 components/esp_common/soc.lf rename components/{esp32s2/ld/esp32s2_fragments.lf => esp_system/app.lf} (61%) diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index f5e1fe2cb4..61b119d822 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -26,7 +26,7 @@ else() # esp_timer is added here because cpu_start.c uses esp_timer set(priv_requires app_trace app_update bootloader_support esp_system log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc esp_pm) - set(fragments linker.lf ld/esp32_fragments.lf) + set(fragments linker.lf) idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" diff --git a/components/esp32/component.mk b/components/esp32/component.mk index 8eed73f91e..7c65594384 100644 --- a/components/esp32/component.mk +++ b/components/esp32/component.mk @@ -17,7 +17,7 @@ COMPONENT_ADD_LDFLAGS += -L $(COMPONENT_PATH)/ld \ -u ld_include_panic_highint_hdl \ $(addprefix -T ,$(LINKER_SCRIPTS)) \ -COMPONENT_ADD_LDFRAGMENTS += ld/esp32_fragments.lf linker.lf +COMPONENT_ADD_LDFRAGMENTS += linker.lf # final linking of project ELF depends on all binary libraries, and # all linker scripts (except esp32_out.ld, as this is code generated here.) diff --git a/components/esp32/ld/esp32_fragments.lf b/components/esp32/ld/esp32_fragments.lf deleted file mode 100644 index 48e15baca5..0000000000 --- a/components/esp32/ld/esp32_fragments.lf +++ /dev/null @@ -1,120 +0,0 @@ -[sections:text] -entries: - .text+ - .literal+ - -[sections:data] -entries: - .data+ - -[sections:bss] -entries: - .bss+ - -[sections:common] -entries: - COMMON - -[sections:legacy_bss] -entries: - .dynsbss - .sbss+ - .gnu.linkonce.sb+ - .scommon - .sbss2+ - .gnu.linkonce.sb2+ - .dynbss - .share.mem - .gnu.linkonce.b+ - -[sections:rodata] -entries: - .rodata+ - -[sections:rtc_text] -entries: - .rtc.text+ - .rtc.literal - -[sections:rtc_data] -entries: - .rtc.data+ - -[sections:rtc_rodata] -entries: - .rtc.rodata+ - -[sections:rtc_bss] -entries: - .rtc.bss - -[sections:iram] -entries: - .iram1+ - -[sections:iram_data] -entries: - .iram.data+ - -[sections:iram_bss] -entries: - .iram.bss+ - -[sections:extram_bss] -entries: - .ext_ram.bss+ - -[sections:dram] -entries: - .dram1+ - -[scheme:default] -entries: - if APP_BUILD_USE_FLASH_SECTIONS = y: - text -> flash_text - rodata -> flash_rodata - else: - text -> iram0_text - rodata -> dram0_data - data -> dram0_data - bss -> dram0_bss - common -> dram0_bss - if ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY = y: - extram_bss -> extern_ram - else: - extram_bss -> dram0_bss - legacy_bss -> dram0_bss - iram -> iram0_text - iram_data -> iram0_data - iram_bss -> iram0_bss - dram -> dram0_data - rtc_text -> rtc_text - rtc_data -> rtc_data - rtc_rodata -> rtc_data - rtc_bss -> rtc_bss - -[scheme:rtc] -entries: - text -> rtc_text - data -> rtc_data - rodata -> rtc_data - bss -> rtc_bss - common -> rtc_bss - -[scheme:noflash] -entries: - text -> iram0_text - rodata -> dram0_data - -[scheme:noflash_data] -entries: - rodata -> dram0_data - -[scheme:noflash_text] -entries: - text -> iram0_text - -[mapping:default] -archive: * -entries: - * (default) diff --git a/components/esp32c3/CMakeLists.txt b/components/esp32c3/CMakeLists.txt index fb12a45134..1bcac4332b 100644 --- a/components/esp32c3/CMakeLists.txt +++ b/components/esp32c3/CMakeLists.txt @@ -27,7 +27,7 @@ else() app_trace app_update bootloader_support log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common esp_timer) - set(fragments linker.lf ld/esp32c3_fragments.lf) + set(fragments linker.lf) idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" diff --git a/components/esp32c3/ld/esp32c3_fragments.lf b/components/esp32c3/ld/esp32c3_fragments.lf deleted file mode 100644 index feea1ec538..0000000000 --- a/components/esp32c3/ld/esp32c3_fragments.lf +++ /dev/null @@ -1,99 +0,0 @@ -[sections:text] -entries: - .text+ - .literal+ - -[sections:data] -entries: - .data+ - -[sections:bss] -entries: - .bss+ - -[sections:common] -entries: - COMMON - -[sections:rodata] -entries: - .rodata+ - -[sections:rtc_text] -entries: - .rtc.text+ - .rtc.literal - -[sections:rtc_data] -entries: - .rtc.data+ - -[sections:rtc_rodata] -entries: - .rtc.rodata+ - -[sections:rtc_bss] -entries: - .rtc.bss - -[sections:iram] -entries: - .iram1+ - -[sections:iram_data] -entries: - .iram.data+ - -[sections:iram_bss] -entries: - .iram.bss+ - -[sections:dram] -entries: - .dram1+ - -[scheme:default] -entries: - if APP_BUILD_USE_FLASH_SECTIONS = y: - text -> flash_text - rodata -> flash_rodata - else: - text -> iram0_text - rodata -> dram0_data - data -> dram0_data - bss -> dram0_bss - common -> dram0_bss - iram -> iram0_text - iram_data -> iram0_data - iram_bss -> iram0_bss - dram -> dram0_data - rtc_text -> rtc_text - rtc_data -> rtc_data - rtc_rodata -> rtc_data - rtc_bss -> rtc_bss - -[scheme:rtc] -entries: - text -> rtc_text - data -> rtc_data - rodata -> rtc_data - bss -> rtc_bss - common -> rtc_bss - -[scheme:noflash] -entries: - text -> iram0_text - rodata -> dram0_data - -[scheme:noflash_data] -entries: - rodata -> dram0_data - -[scheme:noflash_text] -entries: - text -> iram0_text - -[mapping:default] -archive: * -entries: - * (default) diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index 6cf09ac6f5..82afdc8392 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -29,7 +29,7 @@ else() app_trace app_update bootloader_support esp_system log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common esp_timer) - set(fragments linker.lf ld/esp32s2_fragments.lf) + set(fragments linker.lf) idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" diff --git a/components/esp32s3/CMakeLists.txt b/components/esp32s3/CMakeLists.txt index dde455bbf9..20d35aef25 100644 --- a/components/esp32s3/CMakeLists.txt +++ b/components/esp32s3/CMakeLists.txt @@ -26,7 +26,7 @@ else() # esp_timer is added here because cpu_start.c uses esp_timer set(priv_requires app_trace app_update bootloader_support log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc) - set(fragments linker.lf ld/esp32s3_fragments.lf) + set(fragments linker.lf) idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" diff --git a/components/esp32s3/ld/esp32s3_fragments.lf b/components/esp32s3/ld/esp32s3_fragments.lf deleted file mode 100644 index feea1ec538..0000000000 --- a/components/esp32s3/ld/esp32s3_fragments.lf +++ /dev/null @@ -1,99 +0,0 @@ -[sections:text] -entries: - .text+ - .literal+ - -[sections:data] -entries: - .data+ - -[sections:bss] -entries: - .bss+ - -[sections:common] -entries: - COMMON - -[sections:rodata] -entries: - .rodata+ - -[sections:rtc_text] -entries: - .rtc.text+ - .rtc.literal - -[sections:rtc_data] -entries: - .rtc.data+ - -[sections:rtc_rodata] -entries: - .rtc.rodata+ - -[sections:rtc_bss] -entries: - .rtc.bss - -[sections:iram] -entries: - .iram1+ - -[sections:iram_data] -entries: - .iram.data+ - -[sections:iram_bss] -entries: - .iram.bss+ - -[sections:dram] -entries: - .dram1+ - -[scheme:default] -entries: - if APP_BUILD_USE_FLASH_SECTIONS = y: - text -> flash_text - rodata -> flash_rodata - else: - text -> iram0_text - rodata -> dram0_data - data -> dram0_data - bss -> dram0_bss - common -> dram0_bss - iram -> iram0_text - iram_data -> iram0_data - iram_bss -> iram0_bss - dram -> dram0_data - rtc_text -> rtc_text - rtc_data -> rtc_data - rtc_rodata -> rtc_data - rtc_bss -> rtc_bss - -[scheme:rtc] -entries: - text -> rtc_text - data -> rtc_data - rodata -> rtc_data - bss -> rtc_bss - common -> rtc_bss - -[scheme:noflash] -entries: - text -> iram0_text - rodata -> dram0_data - -[scheme:noflash_data] -entries: - rodata -> dram0_data - -[scheme:noflash_text] -entries: - text -> iram0_text - -[mapping:default] -archive: * -entries: - * (default) diff --git a/components/esp_common/CMakeLists.txt b/components/esp_common/CMakeLists.txt index bcb16a907e..1d10d6e646 100644 --- a/components/esp_common/CMakeLists.txt +++ b/components/esp_common/CMakeLists.txt @@ -5,7 +5,8 @@ list(APPEND srcs "src/esp_err_to_name.c") # Note: esp_ipc, esp_pm added as a public requirement to keep compatibility as to be located here. idf_component_register(SRCS "${srcs}" INCLUDE_DIRS include - REQUIRES ${target}) + REQUIRES ${target} + LDFRAGMENTS "common.lf" "soc.lf") set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY LINK_INTERFACE_MULTIPLICITY 4) diff --git a/components/esp_common/common.lf b/components/esp_common/common.lf new file mode 100644 index 0000000000..afbb997e68 --- /dev/null +++ b/components/esp_common/common.lf @@ -0,0 +1,34 @@ +# Sections emitted by compiler by default. + +[sections:text] +entries: + .text+ + .literal+ + +[sections:data] +entries: + .data+ + +[sections:bss] +entries: + .bss+ + +[sections:common] +entries: + COMMON + +[sections:legacy_bss] +entries: + .dynsbss + .sbss+ + .gnu.linkonce.sb+ + .scommon + .sbss2+ + .gnu.linkonce.sb2+ + .dynbss + .share.mem + .gnu.linkonce.b+ + +[sections:rodata] +entries: + .rodata+ diff --git a/components/esp_common/component.mk b/components/esp_common/component.mk index ea720ca509..7ce3ea3b6e 100644 --- a/components/esp_common/component.mk +++ b/components/esp_common/component.mk @@ -4,3 +4,5 @@ COMPONENT_ADD_INCLUDEDIRS := include COMPONENT_SRCDIRS := src + +COMPONENT_ADD_LDFRAGMENTS += common.lf soc.lf diff --git a/components/esp_common/soc.lf b/components/esp_common/soc.lf new file mode 100644 index 0000000000..46193323e5 --- /dev/null +++ b/components/esp_common/soc.lf @@ -0,0 +1,43 @@ +# Sections that can be placed in memory regions common +# to supported SoCs. This is here since some of counterpart attributes +# are in esp_attr.h. +# +# Ideally esp_attr.h would be split between this component and `soc`. +# Those moved to `soc` are the counterpart attributes to these sections. + +[sections:rtc_text] +entries: + .rtc.text+ + .rtc.literal + +[sections:rtc_data] +entries: + .rtc.data+ + +[sections:rtc_rodata] +entries: + .rtc.rodata+ + +[sections:rtc_bss] +entries: + .rtc.bss + +[sections:iram] +entries: + .iram1+ + +[sections:iram_data] +entries: + .iram.data+ + +[sections:iram_bss] +entries: + .iram.bss+ + +[sections:dram] +entries: + .dram1+ + +[sections:extram_bss] +entries: + .ext_ram.bss+ diff --git a/components/esp_system/CMakeLists.txt b/components/esp_system/CMakeLists.txt index f08e901ddb..2cde7bff29 100644 --- a/components/esp_system/CMakeLists.txt +++ b/components/esp_system/CMakeLists.txt @@ -36,7 +36,7 @@ else() # link-time registration is used. esp_pm app_update nvs_flash pthread app_trace esp_gdbstub esp_ipc espcoredump - LDFRAGMENTS "linker.lf") + LDFRAGMENTS "linker.lf" "app.lf") add_subdirectory(port) # After system initialization, `start_app` (and its other cores variant) is called. diff --git a/components/esp32s2/ld/esp32s2_fragments.lf b/components/esp_system/app.lf similarity index 61% rename from components/esp32s2/ld/esp32s2_fragments.lf rename to components/esp_system/app.lf index 65f93737a9..15484115d0 100644 --- a/components/esp32s2/ld/esp32s2_fragments.lf +++ b/components/esp_system/app.lf @@ -1,49 +1,3 @@ -[sections:text] -entries: - .text+ - .literal+ - -[sections:data] -entries: - .data+ - -[sections:bss] -entries: - .bss+ - -[sections:common] -entries: - COMMON - -[sections:rodata] -entries: - .rodata+ - -[sections:rtc_text] -entries: - .rtc.text+ - .rtc.literal - -[sections:rtc_data] -entries: - .rtc.data+ - -[sections:rtc_rodata] -entries: - .rtc.rodata+ - -[sections:rtc_bss] -entries: - .rtc.bss - -[sections:iram] -entries: - .iram1+ - -[sections:dram] -entries: - .dram1+ - [scheme:default] entries: if APP_BUILD_USE_FLASH_SECTIONS = y: @@ -55,7 +9,14 @@ entries: data -> dram0_data bss -> dram0_bss common -> dram0_bss + if ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY = y: + extram_bss -> extern_ram + else: + extram_bss -> dram0_bss + legacy_bss -> dram0_bss iram -> iram0_text + iram_data -> iram0_data + iram_bss -> iram0_bss dram -> dram0_data rtc_text -> rtc_text rtc_data -> rtc_data diff --git a/components/esp_system/component.mk b/components/esp_system/component.mk index e6a0693ae7..4c25426b64 100644 --- a/components/esp_system/component.mk +++ b/components/esp_system/component.mk @@ -13,7 +13,7 @@ SOC_NAME := $(IDF_TARGET) COMPONENT_SRCDIRS := . COMPONENT_ADD_INCLUDEDIRS := include COMPONENT_PRIV_INCLUDEDIRS := port/include port -COMPONENT_ADD_LDFRAGMENTS += linker.lf +COMPONENT_ADD_LDFRAGMENTS += linker.lf app.lf ifndef CONFIG_IDF_ENV_FPGA COMPONENT_OBJEXCLUDE += fpga_overrides.o diff --git a/components/soc/CMakeLists.txt b/components/soc/CMakeLists.txt index 6fc84323bb..a86afd16a1 100644 --- a/components/soc/CMakeLists.txt +++ b/components/soc/CMakeLists.txt @@ -2,7 +2,7 @@ idf_component_register(SRCS "lldesc.c" "soc_include_legacy_warn.c" "memory_layout_utils.c" INCLUDE_DIRS include - LDFRAGMENTS linker.lf) + LDFRAGMENTS "linker.lf") idf_build_get_property(target IDF_TARGET) add_subdirectory(${target}) diff --git a/docs/en/api-guides/linker-script-generation.rst b/docs/en/api-guides/linker-script-generation.rst index da9d01091f..4dbc2ef611 100644 --- a/docs/en/api-guides/linker-script-generation.rst +++ b/docs/en/api-guides/linker-script-generation.rst @@ -388,7 +388,10 @@ There exists a special scheme with the name ``default``. This scheme is special These catch-all rules then effectively serve as fallback rules for those whose mappings were not specified. -The ``default scheme`` is defined in :component_file:`{IDF_TARGET_PATH_NAME}/ld/{IDF_TARGET_PATH_NAME}_fragments.lf`. The ``noflash`` and ``rtc`` scheme fragments which are built-in schemes referenced in the quick start guide are also defined in this file. + +The ``default scheme`` is defined in :component_file:`esp_system/app.lf`. The ``noflash`` and ``rtc`` scheme fragments which are +built-in schemes referenced in the quick start guide are also defined in this file. + .. _ldgen-mapping-fragment : diff --git a/docs/zh_CN/api-guides/linker-script-generation.rst b/docs/zh_CN/api-guides/linker-script-generation.rst index 84212f414d..0327cf935f 100644 --- a/docs/zh_CN/api-guides/linker-script-generation.rst +++ b/docs/zh_CN/api-guides/linker-script-generation.rst @@ -388,7 +388,7 @@ ESP-IDF v4.0 变更了链接器脚本片段文件使用的一些语法： 这些生成的包罗规则将用于未指定映射规则的情况。 -``默认`` 协议在 :component_file:`{IDF_TARGET_PATH_NAME}/ld/{IDF_TARGET_PATH_NAME}_fragments.lf` 文件中定义，快速上手指南中提到的内置 ``noflash`` 协议和 ``rtc`` 协议也在该文件中定义。 +``默认`` 协议在 :component_file:`esp_system/app.lf` 文件中定义，快速上手指南中提到的内置 ``noflash`` 协议和 ``rtc`` 协议也在该文件中定义。 .. _ldgen-mapping-fragment : diff --git a/tools/ci/test_build_system.sh b/tools/ci/test_build_system.sh index 3c8298a7f8..99454f78c1 100755 --- a/tools/ci/test_build_system.sh +++ b/tools/ci/test_build_system.sh @@ -167,7 +167,7 @@ function run_tests() print_status "Touching a linker fragment file should trigger re-link of app" # only app linker script is generated by tool for now take_build_snapshot - touch ${IDF_PATH}/components/esp32/linker.lf + touch ${IDF_PATH}/components/esp_common/common.lf make assert_rebuilt ${APP_BINS} assert_not_rebuilt ${BOOTLOADER_BINS} diff --git a/tools/ci/test_build_system_cmake.sh b/tools/ci/test_build_system_cmake.sh index a1b91bb9fa..66697552b1 100755 --- a/tools/ci/test_build_system_cmake.sh +++ b/tools/ci/test_build_system_cmake.sh @@ -230,13 +230,13 @@ function run_tests() print_status "Updating fragment file should only re-link app" # only app linker script is generated by tool for now take_build_snapshot - cp ${IDF_PATH}/components/esp32/ld/esp32_fragments.lf . + cp ${IDF_PATH}/components/esp_common/common.lf . sleep 1 # ninja may ignore if the timestamp delta is too low - echo "# (Build test comment)" >> ${IDF_PATH}/components/esp32/ld/esp32_fragments.lf + echo "# (Build test comment)" >> ${IDF_PATH}/components/esp_common/common.lf idf.py build || failure "Failed to rebuild with modified linker fragment file" assert_rebuilt ${APP_BINS} assert_not_rebuilt ${BOOTLOADER_BINS} - mv esp32_fragments.lf ${IDF_PATH}/components/esp32/ld/ + mv common.lf ${IDF_PATH}/components/esp_common print_status "sdkconfig update triggers full recompile" clean_build_dir From a202a604d87636bc3f57a44979f197cfe5509187 Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Wed, 10 Mar 2021 19:44:58 +0800 Subject: [PATCH 12/13] esp32: move system libs --- components/esp32/CMakeLists.txt | 2 -- components/esp32/component.mk | 2 -- components/esp32c3/CMakeLists.txt | 3 --- components/esp32c3/linker.lf | 9 --------- components/esp32s2/CMakeLists.txt | 3 --- components/esp32s2/linker.lf | 9 --------- components/esp32s3/CMakeLists.txt | 2 -- components/esp32s3/linker.lf | 9 --------- components/newlib/CMakeLists.txt | 4 ++-- components/newlib/component.mk | 2 +- components/{esp32/linker.lf => newlib/system_libs.lf} | 3 ++- 11 files changed, 5 insertions(+), 43 deletions(-) delete mode 100644 components/esp32c3/linker.lf delete mode 100644 components/esp32s2/linker.lf delete mode 100644 components/esp32s3/linker.lf rename components/{esp32/linker.lf => newlib/system_libs.lf} (70%) diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index 61b119d822..03b6385ead 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -26,11 +26,9 @@ else() # esp_timer is added here because cpu_start.c uses esp_timer set(priv_requires app_trace app_update bootloader_support esp_system log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc esp_pm) - set(fragments linker.lf) idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" - LDFRAGMENTS "${fragments}" REQUIRES "${requires}" PRIV_REQUIRES "${priv_requires}" REQUIRED_IDF_TARGETS esp32) diff --git a/components/esp32/component.mk b/components/esp32/component.mk index 7c65594384..779221c83f 100644 --- a/components/esp32/component.mk +++ b/components/esp32/component.mk @@ -17,8 +17,6 @@ COMPONENT_ADD_LDFLAGS += -L $(COMPONENT_PATH)/ld \ -u ld_include_panic_highint_hdl \ $(addprefix -T ,$(LINKER_SCRIPTS)) \ -COMPONENT_ADD_LDFRAGMENTS += linker.lf - # final linking of project ELF depends on all binary libraries, and # all linker scripts (except esp32_out.ld, as this is code generated here.) COMPONENT_ADD_LINKER_DEPS := $(addprefix ld/, $(filter-out $(COMPONENT_BUILD_DIR)/esp32.project.ld, $(LINKER_SCRIPTS))) \ diff --git a/components/esp32c3/CMakeLists.txt b/components/esp32c3/CMakeLists.txt index 1bcac4332b..59dc113a24 100644 --- a/components/esp32c3/CMakeLists.txt +++ b/components/esp32c3/CMakeLists.txt @@ -27,11 +27,8 @@ else() app_trace app_update bootloader_support log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common esp_timer) - set(fragments linker.lf) - idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" - LDFRAGMENTS "${fragments}" REQUIRES "${requires}" PRIV_REQUIRES "${priv_requires}" REQUIRED_IDF_TARGETS esp32c3) diff --git a/components/esp32c3/linker.lf b/components/esp32c3/linker.lf deleted file mode 100644 index 87e068ccd4..0000000000 --- a/components/esp32c3/linker.lf +++ /dev/null @@ -1,9 +0,0 @@ -[mapping:gcc] -archive: libgcc.a -entries: - lib2funcs (noflash_text) - -[mapping:gcov] -archive: libgcov.a -entries: - * (noflash) diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index 82afdc8392..737d0ed696 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -29,11 +29,8 @@ else() app_trace app_update bootloader_support esp_system log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common esp_timer) - set(fragments linker.lf) - idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" - LDFRAGMENTS "${fragments}" REQUIRES "${requires}" PRIV_REQUIRES "${priv_requires}" REQUIRED_IDF_TARGETS esp32s2) diff --git a/components/esp32s2/linker.lf b/components/esp32s2/linker.lf deleted file mode 100644 index 87e068ccd4..0000000000 --- a/components/esp32s2/linker.lf +++ /dev/null @@ -1,9 +0,0 @@ -[mapping:gcc] -archive: libgcc.a -entries: - lib2funcs (noflash_text) - -[mapping:gcov] -archive: libgcov.a -entries: - * (noflash) diff --git a/components/esp32s3/CMakeLists.txt b/components/esp32s3/CMakeLists.txt index 20d35aef25..882bcd6e5f 100644 --- a/components/esp32s3/CMakeLists.txt +++ b/components/esp32s3/CMakeLists.txt @@ -26,11 +26,9 @@ else() # esp_timer is added here because cpu_start.c uses esp_timer set(priv_requires app_trace app_update bootloader_support log mbedtls nvs_flash pthread spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc) - set(fragments linker.lf) idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" - LDFRAGMENTS "${fragments}" REQUIRES "${requires}" PRIV_REQUIRES "${priv_requires}" REQUIRED_IDF_TARGETS esp32s3) diff --git a/components/esp32s3/linker.lf b/components/esp32s3/linker.lf deleted file mode 100644 index 87e068ccd4..0000000000 --- a/components/esp32s3/linker.lf +++ /dev/null @@ -1,9 +0,0 @@ -[mapping:gcc] -archive: libgcc.a -entries: - lib2funcs (noflash_text) - -[mapping:gcov] -archive: libgcov.a -entries: - * (noflash) diff --git a/components/newlib/CMakeLists.txt b/components/newlib/CMakeLists.txt index 4a9f680220..4fa4856879 100644 --- a/components/newlib/CMakeLists.txt +++ b/components/newlib/CMakeLists.txt @@ -20,10 +20,10 @@ set(srcs set(include_dirs platform_include) if(CONFIG_SPIRAM_CACHE_WORKAROUND) - set(ldfragments esp32-spiram-rom-functions-c.lf) + set(ldfragments "esp32-spiram-rom-functions-c.lf") endif() -list(APPEND ldfragments newlib.lf) +list(APPEND ldfragments "newlib.lf" "system_libs.lf") idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}" diff --git a/components/newlib/component.mk b/components/newlib/component.mk index 5f79c910e7..3841d7b8e6 100644 --- a/components/newlib/component.mk +++ b/components/newlib/component.mk @@ -20,6 +20,6 @@ COMPONENT_SRCDIRS := . port COMPONENT_ADD_LDFLAGS += -u newlib_include_heap_impl COMPONENT_ADD_LDFLAGS += -u newlib_include_syscalls_impl -COMPONENT_ADD_LDFRAGMENTS += newlib.lf +COMPONENT_ADD_LDFRAGMENTS += newlib.lf system_libs.lf heap.o: CFLAGS += -fno-builtin diff --git a/components/esp32/linker.lf b/components/newlib/system_libs.lf similarity index 70% rename from components/esp32/linker.lf rename to components/newlib/system_libs.lf index cd39081acd..f3b35f89ca 100644 --- a/components/esp32/linker.lf +++ b/components/newlib/system_libs.lf @@ -2,7 +2,8 @@ archive: libgcc.a entries: lib2funcs (noflash_text) - _divsf3 (noflash) + if IDF_TARGET_ESP32 = n: + _divsf3 (noflash) [mapping:gcov] archive: libgcov.a From daa13b3f6202c221ea0200a2f01ea0928ca61faa Mon Sep 17 00:00:00 2001 From: Renz Bagaporo Date: Wed, 10 Mar 2021 19:47:40 +0800 Subject: [PATCH 13/13] esp32: move toolchain check --- components/esp32/project_include.cmake | 14 -------------- components/esp_common/project_include.cmake | 6 ++++++ components/xtensa/project_include.cmake | 5 +++++ 3 files changed, 11 insertions(+), 14 deletions(-) create mode 100644 components/esp_common/project_include.cmake create mode 100644 components/xtensa/project_include.cmake diff --git a/components/esp32/project_include.cmake b/components/esp32/project_include.cmake index 91c0f8af46..2aab0a53fc 100644 --- a/components/esp32/project_include.cmake +++ b/components/esp32/project_include.cmake @@ -15,17 +15,3 @@ if(CONFIG_SPIRAM_CACHE_WORKAROUND) idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-strategy=nops" APPEND) endif() endif() - -# Check toolchain is configured properly in cmake -if(NOT ( ${CMAKE_SYSTEM_NAME} STREQUAL "Generic" AND ${CMAKE_C_COMPILER} MATCHES xtensa)) - message(FATAL_ERROR "Internal error, toolchain has not been set correctly by project " - "(or an invalid CMakeCache.txt file has been generated somehow)") -endif() - -# -# Warn if the toolchain version doesn't match -# -# TODO: make these platform-specific for diff toolchains -get_expected_ctng_version(expected_toolchain expected_gcc) -gcc_version_check("${expected_gcc}") -crosstool_version_check("${expected_toolchain}") diff --git a/components/esp_common/project_include.cmake b/components/esp_common/project_include.cmake new file mode 100644 index 0000000000..9c65a5a9ea --- /dev/null +++ b/components/esp_common/project_include.cmake @@ -0,0 +1,6 @@ +# +# Warn if the toolchain version doesn't match +# +get_expected_ctng_version(expected_toolchain expected_gcc) +gcc_version_check("${expected_gcc}") +crosstool_version_check("${expected_toolchain}") diff --git a/components/xtensa/project_include.cmake b/components/xtensa/project_include.cmake new file mode 100644 index 0000000000..c4deb4e984 --- /dev/null +++ b/components/xtensa/project_include.cmake @@ -0,0 +1,5 @@ +# Check toolchain is configured properly in cmake +if(NOT ( ${CMAKE_SYSTEM_NAME} STREQUAL "Generic" AND ${CMAKE_C_COMPILER} MATCHES xtensa)) + message(FATAL_ERROR "Internal error, toolchain has not been set correctly by project " + "(or an invalid CMakeCache.txt file has been generated somehow)") +endif()