mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-05 05:34:32 +02:00
sd_test: refactor the test case
This commit is contained in:
Michael (XIAO Xufeng)
@@ -18,6 +18,7 @@
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#include <time.h>
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#include <sys/time.h>
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#include <unistd.h>
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#include "sdkconfig.h"
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#include "unity.h"
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#include "driver/gpio.h"
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#include "soc/soc_caps.h"
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@@ -32,10 +33,11 @@
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#include "esp_rom_gpio.h"
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#include "test_utils.h"
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#define WITH_SD_TEST (SOC_SDMMC_HOST_SUPPORTED)
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//Currently no runners for S2 and C3
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#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3))
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// Can't test eMMC (slot 0) and PSRAM together
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#ifndef CONFIG_SPIRAM
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#define WITH_EMMC_TEST
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#endif
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#define WITH_EMMC_TEST (SOC_SDMMC_HOST_SUPPORTED && !CONFIG_SPIRAM)
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/* power supply enable pin */
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#define SD_TEST_BOARD_VSEL_EN_GPIO 27
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@@ -55,25 +57,6 @@
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#define CD_WP_TEST_GPIO 18
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__attribute__((unused)) static void sd_test_board_power_on(void)
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{
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gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, SD_TEST_BOARD_VSEL_3V3);
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gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
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usleep(SD_TEST_BOARD_PWR_RST_DELAY_MS * 1000);
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 1);
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usleep(SD_TEST_BOARD_PWR_ON_DELAY_MS * 1000);
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}
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__attribute__((unused)) static void sd_test_board_power_off(void)
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{
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
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gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_INPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, 0);
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gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_INPUT);
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}
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TEST_CASE("MMC_RSP_BITS", "[sd]")
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{
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uint32_t data[2] = { 0x01234567, 0x89abcdef };
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@@ -84,7 +67,25 @@ TEST_CASE("MMC_RSP_BITS", "[sd]")
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TEST_ASSERT_EQUAL_HEX32(0x11, MMC_RSP_BITS(data, 59, 5));
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}
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#if SOC_SDMMC_HOST_SUPPORTED
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#if WITH_SD_TEST || WITH_EMMC_TEST
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static void sd_test_board_power_on(void)
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{
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gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, SD_TEST_BOARD_VSEL_3V3);
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gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
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usleep(SD_TEST_BOARD_PWR_RST_DELAY_MS * 1000);
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 1);
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usleep(SD_TEST_BOARD_PWR_ON_DELAY_MS * 1000);
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}
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static void sd_test_board_power_off(void)
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{
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
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gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_INPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, 0);
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gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_INPUT);
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}
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static void probe_sd(int slot, int width, int freq_khz, int ddr)
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{
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@@ -118,7 +119,9 @@ static void probe_sd(int slot, int width, int freq_khz, int ddr)
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free(card);
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sd_test_board_power_off();
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}
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#endif //WITH_SD_TEST || WITH_EMMC_TEST
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#if WITH_SD_TEST
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TEST_CASE("probe SD, slot 1, 4-bit", "[sd][test_env=UT_T1_SDMODE]")
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{
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probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_PROBING, 0);
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@@ -133,7 +136,23 @@ TEST_CASE("probe SD, slot 1, 1-bit", "[sd][test_env=UT_T1_SDMODE]")
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probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_HIGHSPEED, 0);
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}
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#ifdef WITH_EMMC_TEST
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//No runners for slot 0
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TEST_CASE("probe SD, slot 0, 4-bit", "[sd][ignore]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 0);
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}
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TEST_CASE("probe SD, slot 0, 1-bit", "[sd][ignore]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_HIGHSPEED, 0);
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}
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#endif //WITH_SD_TEST
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#if WITH_EMMC_TEST
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TEST_CASE("probe eMMC, slot 0, 4-bit", "[sd][test_env=EMMC]")
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{
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//Test with SDR
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@@ -153,24 +172,7 @@ TEST_CASE("probe eMMC, slot 0, 8-bit", "[sd][test_env=EMMC]")
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}
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#endif // WITH_EMMC_TEST
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TEST_CASE("probe SD, slot 0, 4-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 0);
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}
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TEST_CASE("probe SD, slot 0, 1-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_HIGHSPEED, 0);
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}
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#endif
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
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//No runners
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#if WITH_SDSPI_TEST
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static void test_sdspi_init_bus(spi_host_device_t host, int mosi_pin, int miso_pin, int clk_pin, int dma_chan)
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{
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spi_bus_config_t bus_config = {
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@@ -240,23 +242,24 @@ static void probe_spi_legacy(int freq_khz, int pin_miso, int pin_mosi, int pin_s
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sd_test_board_power_off();
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}
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TEST_CASE("probe SD in SPI mode, slot 1", "[sd][test_env=UT_T1_SPIMODE]")
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TEST_CASE("probe SD in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
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{
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probe_spi(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
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probe_spi_legacy(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
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}
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TEST_CASE("probe SD in SPI mode, slot 0", "[sd][test_env=UT_T1_SDCARD][ignore]")
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// No runner for this
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TEST_CASE("probe SD in SPI mode, slot 0", "[sd][ignore]")
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{
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probe_spi(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10);
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probe_spi_legacy(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10);
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}
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#endif //WITH_SDSPI_TEST
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#endif //DISABLED(ESP32S2)
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#if WITH_SD_TEST || WITH_SDSPI_TEST || WITH_EMMC_TEST
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// Fill buffer pointed to by 'dst' with 'count' 32-bit ints generated
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// from 'rand' with the starting value of 'seed'
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__attribute__((unused)) static void fill_buffer(uint32_t seed, uint8_t* dst, size_t count) {
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static void fill_buffer(uint32_t seed, uint8_t* dst, size_t count) {
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srand(seed);
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for (size_t i = 0; i < count; ++i) {
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uint32_t val = rand();
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@@ -266,7 +269,7 @@ __attribute__((unused)) static void fill_buffer(uint32_t seed, uint8_t* dst, siz
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// Check if the buffer pointed to by 'dst' contains 'count' 32-bit
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// ints generated from 'rand' with the starting value of 'seed'
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__attribute__((unused)) static void check_buffer(uint32_t seed, const uint8_t* src, size_t count) {
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static void check_buffer(uint32_t seed, const uint8_t* src, size_t count) {
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srand(seed);
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for (size_t i = 0; i < count; ++i) {
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uint32_t val;
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@@ -275,98 +278,8 @@ __attribute__((unused)) static void check_buffer(uint32_t seed, const uint8_t* s
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}
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}
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enum {
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PERFORMANCE_COUNT_1 = 0,
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PERFORMANCE_COUNT_4,
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PERFORMANCE_COUNT_8,
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PERFORMANCE_COUNT_16,
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PERFORMANCE_COUNT_32,
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PERFORMANCE_COUNT_64,
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PERFORMANCE_COUNT_128,
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PERFORMANCE_COUNT_MAX,
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};
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typedef struct {
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uint32_t rd_speed;
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uint32_t wr_speed;
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} sd_performance_val_t;
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#define PERFORMANCE_DATA_DEFAULT() {.rd_speed = UINT32_MAX, .wr_speed = UINT32_MAX,}
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static sd_performance_val_t performance_data_pool[PERFORMANCE_COUNT_MAX][2];
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static const char wr_speed_str[] = "SDMMC_WR_SPEED";
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static const char rd_speed_str[] = "SDMMC_RD_SPEED";
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__attribute__((unused)) static int get_blk_id(int blk_count)
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{
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int blk_idx = (blk_count == 1)? PERFORMANCE_COUNT_1 :
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(blk_count == 4)? PERFORMANCE_COUNT_4 :
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(blk_count == 8)? PERFORMANCE_COUNT_8 :
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(blk_count == 16)? PERFORMANCE_COUNT_16 :
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(blk_count == 32)? PERFORMANCE_COUNT_32 :
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(blk_count == 64)? PERFORMANCE_COUNT_64 :
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(blk_count == 128)? PERFORMANCE_COUNT_128 :
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-1;
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assert(blk_idx != -1);
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return blk_idx;
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}
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__attribute__((unused)) static void performance_data_pool_flush(void)
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{
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for (int i = 0; i < sizeof(performance_data_pool)/sizeof(performance_data_pool[0][0]); i++) {
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((sd_performance_val_t*)performance_data_pool)[i] = (sd_performance_val_t)PERFORMANCE_DATA_DEFAULT();
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}
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}
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__attribute__((unused)) static void performance_data_pool_update(int block_count, bool aligned, uint32_t wr_speed, uint32_t rd_speed)
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{
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int blk_idx = get_blk_id(block_count);
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sd_performance_val_t* val = &performance_data_pool[blk_idx][aligned? 1: 0];
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if (wr_speed < val->wr_speed) {
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val->wr_speed = wr_speed;
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}
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if (rd_speed < val->rd_speed) {
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val->rd_speed = rd_speed;
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}
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}
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__attribute__((unused)) static void performance_data_pool_dump(void)
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{
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#define LOG_WR_SPEED(blk_size, aligned) do { \
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int blk_idx = get_blk_id(blk_size); \
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IDF_LOG_PERFORMANCE(wr_speed_str, "%d, blk_n: %d, aligned: %d", performance_data_pool[blk_idx][(aligned)? 1: 0].wr_speed, (blk_size), aligned); \
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} while (0)
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#define LOG_RD_SPEED(blk_size, aligned) do { \
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int blk_idx = get_blk_id(blk_size); \
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IDF_LOG_PERFORMANCE(rd_speed_str, "%d, blk_n: %d, aligned: %d", performance_data_pool[blk_idx][(aligned)? 1: 0].rd_speed, (blk_size), aligned); \
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} while (0)
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LOG_WR_SPEED(1, 0);
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LOG_WR_SPEED(8, 0);
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LOG_WR_SPEED(128, 0);
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LOG_RD_SPEED(1, 0);
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LOG_RD_SPEED(8, 0);
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LOG_RD_SPEED(128, 0);
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LOG_WR_SPEED(1, 1);
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LOG_WR_SPEED(4, 1);
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LOG_WR_SPEED(8, 1);
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LOG_WR_SPEED(16, 1);
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LOG_WR_SPEED(32, 1);
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LOG_WR_SPEED(64, 1);
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LOG_WR_SPEED(128, 1);
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LOG_RD_SPEED(1, 1);
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LOG_RD_SPEED(4, 1);
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LOG_RD_SPEED(8, 1);
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LOG_RD_SPEED(16, 1);
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LOG_RD_SPEED(32, 1);
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LOG_RD_SPEED(64, 1);
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LOG_RD_SPEED(128, 1);
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}
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__attribute__((unused)) static void do_single_write_read_test(sdmmc_card_t* card,
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size_t start_block, size_t block_count, size_t alignment)
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static void do_single_write_read_test(sdmmc_card_t* card, size_t start_block,
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size_t block_count, size_t alignment, bool performance_log)
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{
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size_t block_size = card->csd.sector_size;
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size_t total_size = block_size * block_count;
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@@ -399,39 +312,68 @@ __attribute__((unused)) static void do_single_write_read_test(sdmmc_card_t* card
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check_buffer(start_block, c_buffer, total_size / sizeof(buffer[0]));
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free(buffer);
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performance_data_pool_update(block_count, ((alignment % 4) == 0? 1: 0),
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total_size * 1000 / time_wr, total_size * 1000 / time_rd);
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if (performance_log) {
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static const char wr_speed_str[] = "SDMMC_WR_SPEED";
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static const char rd_speed_str[] = "SDMMC_RD_SPEED";
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int aligned = ((alignment % 4) == 0)? 1: 0;
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IDF_LOG_PERFORMANCE(wr_speed_str, "%d, blk_n: %d, aligned: %d",
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(int)(total_size * 1000 / time_wr), block_count, aligned);
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IDF_LOG_PERFORMANCE(rd_speed_str, "%d, blk_n: %d, aligned: %d",
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(int)(total_size * 1000 / time_rd), block_count, aligned);
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}
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}
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__attribute__((unused)) static void read_write_test(sdmmc_card_t* card)
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typedef void (*sd_test_func_t)(sdmmc_card_t* card);
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static void test_read_write_performance(sdmmc_card_t* card)
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{
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performance_data_pool_flush();
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sdmmc_card_print_info(stdout, card);
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printf(" sector | count | align | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)\n");
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do_single_write_read_test(card, 0, 1, 4);
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do_single_write_read_test(card, 0, 4, 4);
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do_single_write_read_test(card, 1, 16, 4);
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do_single_write_read_test(card, 16, 32, 4);
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do_single_write_read_test(card, 48, 64, 4);
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do_single_write_read_test(card, 128, 128, 4);
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do_single_write_read_test(card, card->csd.capacity - 64, 32, 4);
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do_single_write_read_test(card, card->csd.capacity - 64, 64, 4);
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do_single_write_read_test(card, card->csd.capacity - 8, 1, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 1, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 4, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 8, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 16, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 32, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 64, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 128, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 1, 1);
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do_single_write_read_test(card, card->csd.capacity/2, 8, 1);
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do_single_write_read_test(card, card->csd.capacity/2, 128, 1);
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performance_data_pool_dump();
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const int offset = 0;
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const bool do_log = true;
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//aligned
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do_single_write_read_test(card, offset, 1, 4, do_log);
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do_single_write_read_test(card, offset, 4, 4, do_log);
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do_single_write_read_test(card, offset, 8, 4, do_log);
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do_single_write_read_test(card, offset, 16, 4, do_log);
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do_single_write_read_test(card, offset, 32, 4, do_log);
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do_single_write_read_test(card, offset, 64, 4, do_log);
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do_single_write_read_test(card, offset, 128, 4, do_log);
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//unaligned
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do_single_write_read_test(card, offset, 1, 1, do_log);
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do_single_write_read_test(card, offset, 8, 1, do_log);
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do_single_write_read_test(card, offset, 128, 1, do_log);
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}
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#if SOC_SDMMC_HOST_SUPPORTED
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void test_sd_rw_blocks(int slot, int width)
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static void test_read_write_with_offset(sdmmc_card_t* card)
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{
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sdmmc_card_print_info(stdout, card);
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printf(" sector | count | align | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)\n");
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const bool no_log = false;;
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//aligned
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do_single_write_read_test(card, 1, 16, 4, no_log);
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do_single_write_read_test(card, 16, 32, 4, no_log);
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do_single_write_read_test(card, 48, 64, 4, no_log);
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do_single_write_read_test(card, 128, 128, 4, no_log);
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do_single_write_read_test(card, card->csd.capacity - 64, 32, 4, no_log);
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do_single_write_read_test(card, card->csd.capacity - 64, 64, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity - 8, 1, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 1, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 4, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 8, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 16, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 32, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 64, 4, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 128, 4, no_log);
|
||||
//unaligned
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 1, 1, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 8, 1, no_log);
|
||||
do_single_write_read_test(card, card->csd.capacity/2, 128, 1, no_log);
|
||||
}
|
||||
#endif //WITH_SD_TEST || WITH_SDSPI_TEST || WITH_EMMC_TEST
|
||||
|
||||
#if WITH_SD_TEST || WITH_EMMC_TEST
|
||||
void sd_test_rw_blocks(int slot, int width, sd_test_func_t test_func)
|
||||
{
|
||||
sdmmc_host_t config = SDMMC_HOST_DEFAULT();
|
||||
config.max_freq_khz = SDMMC_FREQ_HIGHSPEED;
|
||||
@@ -448,38 +390,67 @@ void test_sd_rw_blocks(int slot, int width)
|
||||
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
||||
TEST_ASSERT_NOT_NULL(card);
|
||||
TEST_ESP_OK(sdmmc_card_init(&config, card));
|
||||
read_write_test(card);
|
||||
test_func(card);
|
||||
free(card);
|
||||
TEST_ESP_OK(sdmmc_host_deinit());
|
||||
}
|
||||
#endif //WITH_SD_TEST || WITH_EMMC_TEST
|
||||
|
||||
TEST_CASE("SDMMC read/write test (SD slot 1)", "[sd][test_env=UT_T1_SDMODE]")
|
||||
#if WITH_SD_TEST
|
||||
TEST_CASE("SDMMC performance test (SD slot 1, 4 line)", "[sd][test_env=UT_T1_SDMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
test_sd_rw_blocks(1, 4);
|
||||
sd_test_rw_blocks(1, 4, test_read_write_performance);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
|
||||
#ifdef WITH_EMMC_TEST
|
||||
TEST_CASE("SDMMC read/write test (eMMC slot 0, 4 line DDR)", "[sd][test_env=EMMC]")
|
||||
TEST_CASE("SDMMC performance test (SD slot 1, 1 line)", "[sd][test_env=UT_T1_SDMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
test_sd_rw_blocks(0, 4);
|
||||
sd_test_rw_blocks(1, 1, test_read_write_performance);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
|
||||
TEST_CASE("SDMMC read/write test (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]")
|
||||
TEST_CASE("SDMMC test read/write with offset (SD slot 1)", "[sd][test_env=UT_T1_SDMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
test_sd_rw_blocks(0, 8);
|
||||
sd_test_rw_blocks(1, 4, test_read_write_with_offset);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif //WITH_SD_TEST
|
||||
|
||||
#if WITH_EMMC_TEST
|
||||
TEST_CASE("SDMMC performance test (eMMC slot 0, 4 line DDR)", "[sd][test_env=EMMC]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
sd_test_rw_blocks(0, 4, test_read_write_performance);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
|
||||
TEST_CASE("SDMMC test read/write with offset (eMMC slot 0, 4 line DDR)", "[sd][test_env=EMMC]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
sd_test_rw_blocks(0, 4, test_read_write_with_offset);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
|
||||
TEST_CASE("SDMMC performance test (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
sd_test_rw_blocks(0, 8, test_read_write_performance);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
|
||||
TEST_CASE("SDMMC test read/write with offset (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
sd_test_rw_blocks(0, 8, test_read_write_with_offset);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif // WITH_EMMC_TEST
|
||||
#endif // SDMMC_HOST_SUPPORTED
|
||||
|
||||
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
|
||||
//No runners
|
||||
TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]")
|
||||
#if WITH_SDSPI_TEST
|
||||
void sdspi_test_rw_blocks(sd_test_func_t test_func)
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
|
||||
@@ -497,15 +468,25 @@ TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT
|
||||
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
||||
TEST_ASSERT_NOT_NULL(card);
|
||||
TEST_ESP_OK(sdmmc_card_init(&config, card));
|
||||
read_write_test(card);
|
||||
test_func(card);
|
||||
TEST_ESP_OK(sdspi_host_deinit());
|
||||
free(card);
|
||||
test_sdspi_deinit_bus(dev_config.host_id);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif //DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
|
||||
|
||||
#if SOC_SDMMC_HOST_SUPPORTED
|
||||
TEST_CASE("SDMMC performance (SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]")
|
||||
{
|
||||
sdspi_test_rw_blocks(test_read_write_performance);
|
||||
}
|
||||
|
||||
TEST_CASE("SDMMC test read/write with offset (SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]")
|
||||
{
|
||||
sdspi_test_rw_blocks(test_read_write_with_offset);
|
||||
}
|
||||
#endif //WITH_SDSPI_TEST
|
||||
|
||||
#if WITH_SD_TEST
|
||||
TEST_CASE("reads and writes with an unaligned buffer", "[sd][test_env=UT_T1_SDMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
@@ -543,9 +524,10 @@ TEST_CASE("reads and writes with an unaligned buffer", "[sd][test_env=UT_T1_SDMO
|
||||
TEST_ESP_OK(sdmmc_host_deinit());
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif
|
||||
#endif //WITH_SD_TEST
|
||||
|
||||
__attribute__((unused)) static void test_cd_input(int gpio_cd_num, const sdmmc_host_t* config)
|
||||
#if WITH_SD_TEST || WITH_SDSPI_TEST
|
||||
static void test_cd_input(int gpio_cd_num, const sdmmc_host_t* config)
|
||||
{
|
||||
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
||||
TEST_ASSERT_NOT_NULL(card);
|
||||
@@ -569,48 +551,7 @@ __attribute__((unused)) static void test_cd_input(int gpio_cd_num, const sdmmc_h
|
||||
free(card);
|
||||
}
|
||||
|
||||
#if SOC_SDMMC_HOST_SUPPORTED
|
||||
TEST_CASE("CD input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
sdmmc_host_t config = SDMMC_HOST_DEFAULT();
|
||||
sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
|
||||
slot_config.gpio_cd = CD_WP_TEST_GPIO;
|
||||
TEST_ESP_OK(sdmmc_host_init());
|
||||
TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
|
||||
|
||||
test_cd_input(CD_WP_TEST_GPIO, &config);
|
||||
|
||||
TEST_ESP_OK(sdmmc_host_deinit());
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
|
||||
//No runners
|
||||
TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
|
||||
sdspi_dev_handle_t handle;
|
||||
sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
|
||||
dev_config.gpio_cd = CD_WP_TEST_GPIO;
|
||||
test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
|
||||
TEST_ESP_OK(sdspi_host_init());
|
||||
TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
|
||||
|
||||
sdmmc_host_t config = SDSPI_HOST_DEFAULT();
|
||||
config.slot = handle;
|
||||
|
||||
test_cd_input(CD_WP_TEST_GPIO, &config);
|
||||
|
||||
TEST_ESP_OK(sdspi_host_deinit());
|
||||
test_sdspi_deinit_bus(dev_config.host_id);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif //DISABLED_FOR_TARGETS(ESP32S2)
|
||||
|
||||
__attribute__((unused)) static void test_wp_input(int gpio_wp_num, const sdmmc_host_t* config)
|
||||
static void test_wp_input(int gpio_wp_num, const sdmmc_host_t* config)
|
||||
{
|
||||
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
||||
TEST_ASSERT_NOT_NULL(card);
|
||||
@@ -642,8 +583,24 @@ __attribute__((unused)) static void test_wp_input(int gpio_wp_num, const sdmmc_h
|
||||
free(data);
|
||||
free(card);
|
||||
}
|
||||
#endif //WITH_SD_TEST || WITH_SDSPI_TEST
|
||||
|
||||
#if WITH_SD_TEST
|
||||
TEST_CASE("CD input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
sdmmc_host_t config = SDMMC_HOST_DEFAULT();
|
||||
sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
|
||||
slot_config.gpio_cd = CD_WP_TEST_GPIO;
|
||||
TEST_ESP_OK(sdmmc_host_init());
|
||||
TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
|
||||
|
||||
test_cd_input(CD_WP_TEST_GPIO, &config);
|
||||
|
||||
TEST_ESP_OK(sdmmc_host_deinit());
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
|
||||
#if SOC_SDMMC_HOST_SUPPORTED
|
||||
TEST_CASE("WP input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
@@ -658,10 +615,30 @@ TEST_CASE("WP input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
|
||||
TEST_ESP_OK(sdmmc_host_deinit());
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif
|
||||
#endif //WITH_SD_TEST
|
||||
|
||||
#if WITH_SDSPI_TEST
|
||||
TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
|
||||
sdspi_dev_handle_t handle;
|
||||
sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
|
||||
dev_config.gpio_cd = CD_WP_TEST_GPIO;
|
||||
test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
|
||||
TEST_ESP_OK(sdspi_host_init());
|
||||
TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
|
||||
|
||||
sdmmc_host_t config = SDSPI_HOST_DEFAULT();
|
||||
config.slot = handle;
|
||||
|
||||
test_cd_input(CD_WP_TEST_GPIO, &config);
|
||||
|
||||
TEST_ESP_OK(sdspi_host_deinit());
|
||||
test_sdspi_deinit_bus(dev_config.host_id);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
|
||||
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
|
||||
//No runners
|
||||
TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
|
||||
{
|
||||
sd_test_board_power_on();
|
||||
@@ -683,4 +660,4 @@ TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
|
||||
test_sdspi_deinit_bus(dev_config.host_id);
|
||||
sd_test_board_power_off();
|
||||
}
|
||||
#endif //DISABLED_FOR_TARGETS(ESP32S2)
|
||||
#endif //WITH_SDSPI_TEST
|
||||
|
||||
Reference in New Issue
Block a user