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https://github.com/espressif/esp-idf.git
synced 2026-05-04 20:05:25 +02:00
feat(adc): move adc periph enable/reset functions to ll layer
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@@ -245,7 +245,9 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
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ESP_RETURN_ON_FALSE(handle->fsm == ADC_FSM_INIT, ESP_ERR_INVALID_STATE, ADC_TAG, "ADC continuous mode isn't in the init state, it's started already");
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//reset ADC digital part to reset ADC sampling EOF counter
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periph_module_reset(PERIPH_SARADC_MODULE);
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ADC_BUS_CLK_ATOMIC() {
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adc_ll_reset_register();
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}
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if (handle->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(handle->pm_lock), ADC_TAG, "acquire pm_lock failed");
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@@ -115,7 +115,6 @@ esp_err_t adc_oneshot_new_unit(const adc_oneshot_unit_init_cfg_t *init_config, a
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};
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adc_oneshot_hal_init(&(unit->hal), &config);
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#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
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//To enable the APB_SARADC periph if needed
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_lock_acquire(&s_ctx.mutex);
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s_ctx.apb_periph_ref_cnts++;
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@@ -123,12 +122,6 @@ esp_err_t adc_oneshot_new_unit(const adc_oneshot_unit_init_cfg_t *init_config, a
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adc_apb_periph_claim();
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}
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_lock_release(&s_ctx.mutex);
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#endif
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//TODO: refactor clock enable/reset functions, add adc_digi_clk_enable/reset and adc_rtc_clk_enable/reset
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#if CONFIG_IDF_TARGET_ESP32P4
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adc_ll_rtc_reset();
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#endif
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if (init_config->ulp_mode == ADC_ULP_MODE_DISABLE) {
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sar_periph_ctrl_adc_oneshot_power_acquire();
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@@ -28,6 +28,7 @@ __attribute__((unused)) static const char *TAG = "TEST_ADC";
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#define TEST_STD_ADC1_CHANNEL0 ADC_CHANNEL_2
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#endif
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#if !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-6497
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static int s_adc_count_size;
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static int *s_p_adc_count;
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static int s_adc_offset = -1;
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@@ -131,6 +132,8 @@ static float s_print_summary(bool figure)
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return sqrt(variation_square / count);
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}
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#endif
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#if SOC_ADC_DMA_SUPPORTED
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/*---------------------------------------------------------------
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ADC Continuous Average / STD_Deviation Test
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