espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-07-30 18:57:19 +02:00
Code Issues Packages Projects Releases Wiki Activity

component/bt: set non-zero initial value for bt sleep clock cycle to avoid div-by-zero error in function "btdm_us_2_lpcycles" when BT modem sleep is not enabled

Browse Source
This commit is contained in:
wangmengyang
2020-02-26 15:58:44 +08:00
parent 3b16089cb2
commit 6fad6eb9f1
1 changed files with 4 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
components/bt/controller/bt.c
View File

@ -1138,6 +1138,10 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
s_btdm_allow_light_sleep = false;
#endif
// set default sleep clock cycle and its fractional bits
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
#if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value