Merge branch 'bugfix/fix_s3_adc1_wrong_clk_div_v4.4' into 'release/v4.4'

fix(adc): fixed esp32, esp32s2,esp32s3 adc oneshot mode clk div issue (v4.4)

See merge request espressif/esp-idf!24745
This commit is contained in:
morris
2023-07-13 15:48:39 +08:00
5 changed files with 3 additions and 7 deletions

View File

@@ -26,6 +26,6 @@
#define SOC_ADC_PWDET_CCT_DEFAULT (4) #define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (2) #define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (1)
#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (16) #define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (16)

View File

@@ -26,6 +26,4 @@
#define SOC_ADC_PWDET_CCT_DEFAULT (4) #define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) ((PERIPH_NUM==0)? 2 : 1)
#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (1) #define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (1)

View File

@@ -26,6 +26,4 @@
#define SOC_ADC_PWDET_CCT_DEFAULT (4) #define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) ((PERIPH_NUM==0)? 2 : 1)
#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (1) #define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (1)

View File

@@ -26,6 +26,6 @@
#define SOC_ADC_PWDET_CCT_DEFAULT (4) #define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) ((PERIPH_NUM==0)? 2 : 1) #define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (1)
#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (2) #define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (2)

View File

@@ -26,6 +26,6 @@
#define SOC_ADC_PWDET_CCT_DEFAULT (4) #define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) ((PERIPH_NUM==0)? 2 : 1) #define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (1)
#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (1) #define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (1)