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i2s: add XTAL clock source

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This commit is contained in:
laokaiyao
2022-09-15 17:27:57 +08:00
parent 77ce37f235
commit 7197e987cb
26 changed files with 156 additions and 61 deletions
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4
components/soc/esp32c3/include/soc/i2s_struct.h
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@@ -140,7 +140,7 @@ typedef volatile struct i2s_dev_s {
uint32_t rx_clkm_div_num: 8; /*Integral I2S clock divider value*/
uint32_t reserved8: 18; /*Reserved*/
uint32_t rx_clk_active: 1; /*I2S Rx module clock enable signal.*/
uint32_t rx_clk_sel: 2; /*Select I2S Rx module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_in.*/
uint32_t rx_clk_sel: 2; /*Select I2S Rx module source clock. 0: XTAL clock. 1: PLL240M. 2: PLL160M. 3: I2S_MCLK_in.*/
uint32_t mclk_sel: 1; /*0: UseI2S Tx module clock as I2S_MCLK_OUT. 1: UseI2S Rx module clock as I2S_MCLK_OUT.*/
uint32_t reserved30: 2; /*Reserved*/
};
@@ -151,7 +151,7 @@ typedef volatile struct i2s_dev_s {
uint32_t tx_clkm_div_num: 8; /*Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2 z * [x * n-div + (n+1)-div] + y * n-div. For b > a/2 z * [n-div + x * (n+1)-div] + y * (n+1)-div.*/
uint32_t reserved8: 18; /*Reserved*/
uint32_t tx_clk_active: 1; /*I2S Tx module clock enable signal.*/
uint32_t tx_clk_sel: 2; /*Select I2S Tx module source clock. 0: XTAL clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_in.*/
uint32_t tx_clk_sel: 2; /*Select I2S Tx module source clock. 0: XTAL clock. 1: PLL240M. 2: PLL160M. 3: I2S_MCLK_in.*/
uint32_t clk_en: 1; /*Set this bit to enable clk gate*/
uint32_t reserved30: 2; /*Reserved*/
};