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soc: place constant data from rtc_clk.c into DRAM

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In release mode, switches in rtc_clk_bbpll_set would be converted to
jump tables. These tables would be placed into .rodata, which caused
rtc_clk_cpu_freq_set to be unusable while cache is disabled. This
manifested itself in crashes when exiting from light sleep:

https://esp32.com/posting.php?mode=reply&f=13&t=3089#pr14590
This commit is contained in:
Ivan Grokhotkov
2017-09-26 17:08:49 +08:00
parent 7d436c9a44
commit 73e8afc5b9
1 changed files with 1 additions and 0 deletions
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components/esp32/ld/esp32.common.ld
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@@ -117,6 +117,7 @@ SECTIONS
*(.dram1 .dram1.*) *(.dram1 .dram1.*)
*libesp32.a:panic.o(.rodata .rodata.*) *libesp32.a:panic.o(.rodata .rodata.*)
*libphy.a:(.rodata .rodata.*) *libphy.a:(.rodata .rodata.*)
*libsoc.a:rtc_clk.o(.rodata .rodata.*)
*libapp_trace.a:(.rodata .rodata.*) *libapp_trace.a:(.rodata .rodata.*)
*libgcov.a:(.rodata .rodata.*) *libgcov.a:(.rodata .rodata.*)
*libheap.a:multi_heap.o(.rodata .rodata.*) *libheap.a:multi_heap.o(.rodata .rodata.*)