diff --git a/components/esp_eth/src/esp_eth.c b/components/esp_eth/src/esp_eth.c
index bef3e7966c..868dddad3f 100644
--- a/components/esp_eth/src/esp_eth.c
+++ b/components/esp_eth/src/esp_eth.c
@@ -322,6 +322,13 @@ esp_err_t esp_eth_transmit(esp_eth_handle_t hdl, void *buf, size_t length)
 {
     esp_err_t ret = ESP_OK;
     esp_eth_driver_t *eth_driver = (esp_eth_driver_t *)hdl;
+
+    if (atomic_load(&eth_driver->fsm) != ESP_ETH_FSM_START) {
+        ret = ESP_ERR_INVALID_STATE;
+        ESP_LOGD(TAG, "Ethernet is not started");
+        goto err;
+    }
+
     ESP_GOTO_ON_FALSE(buf, ESP_ERR_INVALID_ARG, err, TAG, "can't set buf to null");
     ESP_GOTO_ON_FALSE(length, ESP_ERR_INVALID_ARG, err, TAG, "buf length can't be zero");
     ESP_GOTO_ON_FALSE(eth_driver, ESP_ERR_INVALID_ARG, err, TAG, "ethernet driver handle can't be null");
diff --git a/components/esp_eth/src/esp_eth_mac_esp.c b/components/esp_eth/src/esp_eth_mac_esp.c
index 1de969d7a6..278d9ae4de 100644
--- a/components/esp_eth/src/esp_eth_mac_esp.c
+++ b/components/esp_eth/src/esp_eth_mac_esp.c
@@ -41,6 +41,7 @@
 static const char *TAG = "esp.emac";
 
 #define PHY_OPERATION_TIMEOUT_US (1000)
+#define MAC_STOP_TIMEOUT_MS (100)
 #define FLOW_CONTROL_LOW_WATER_MARK (CONFIG_ETH_DMA_RX_BUFFER_NUM / 3)
 #define FLOW_CONTROL_HIGH_WATER_MARK (FLOW_CONTROL_LOW_WATER_MARK * 2)
 
@@ -389,6 +390,7 @@ static esp_err_t emac_esp32_deinit(esp_eth_mac_t *mac)
 static esp_err_t emac_esp32_start(esp_eth_mac_t *mac)
 {
     emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent);
+    emac_hal_reset_desc_chain(&emac->hal);
     emac_hal_start(&emac->hal);
     return ESP_OK;
 }
@@ -396,8 +398,16 @@ static esp_err_t emac_esp32_start(esp_eth_mac_t *mac)
 static esp_err_t emac_esp32_stop(esp_eth_mac_t *mac)
 {
     emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent);
-    emac_hal_stop(&emac->hal);
-    return ESP_OK;
+    esp_err_t ret = ESP_OK;
+    int32_t to = 0;
+    do {
+        if ((ret = emac_hal_stop(&emac->hal)) == ESP_OK) {
+            break;
+        }
+        to += 20;
+        vTaskDelay(pdMS_TO_TICKS(20));
+    } while (to < MAC_STOP_TIMEOUT_MS);
+    return ret;
 }
 
 static esp_err_t emac_esp32_del(esp_eth_mac_t *mac)
diff --git a/components/hal/emac_hal.c b/components/hal/emac_hal.c
index 4efe6cc551..df9d0901b6 100644
--- a/components/hal/emac_hal.c
+++ b/components/hal/emac_hal.c
@@ -335,12 +335,15 @@ void emac_hal_start(emac_hal_context_t *hal)
     /* Enable Ethernet MAC and DMA Interrupt */
     emac_ll_enable_corresponding_intr(hal->dma_regs, EMAC_LL_CONFIG_ENABLE_INTR_MASK);
 
+    /* Flush Transmit FIFO */
+    emac_ll_flush_trans_fifo_enable(hal->dma_regs, true);
+    /* Flush Receive FIFO */
+    emac_ll_flush_recv_frame_enable(hal->dma_regs, true);
+
     /* Enable transmit state machine of the MAC for transmission on the MII */
     emac_ll_transmit_enable(hal->mac_regs, true);
     /* Enable receive state machine of the MAC for reception from the MII */
     emac_ll_receive_enable(hal->mac_regs, true);
-    /* Flush Transmit FIFO */
-    emac_ll_flush_trans_fifo_enable(hal->dma_regs, true);
     /* Start DMA transmission */
     emac_ll_start_stop_dma_transmit(hal->dma_regs, true);
     /* Start DMA reception */
@@ -350,14 +353,18 @@ void emac_hal_start(emac_hal_context_t *hal)
     emac_ll_clear_all_pending_intr(hal->dma_regs);
 }
 
-void emac_hal_stop(emac_hal_context_t *hal)
+esp_err_t emac_hal_stop(emac_hal_context_t *hal)
 {
-    /* Flush Transmit FIFO */
-    emac_ll_flush_trans_fifo_enable(hal->dma_regs, true);
     /* Stop DMA transmission */
     emac_ll_start_stop_dma_transmit(hal->dma_regs, false);
     /* Stop DMA reception */
     emac_ll_start_stop_dma_receive(hal->dma_regs, false);
+
+    if (emac_ll_transmit_frame_ctrl_status(hal->mac_regs) != 0x0) {
+        /* Previous transmit in progress */
+        return ESP_ERR_INVALID_STATE;
+    }
+
     /* Disable receive state machine of the MAC for reception from the MII */
     emac_ll_transmit_enable(hal->mac_regs, false);
     /* Disable transmit state machine of the MAC for transmission on the MII */
@@ -365,6 +372,8 @@ void emac_hal_stop(emac_hal_context_t *hal)
 
     /* Disable Ethernet MAC and DMA Interrupt */
     emac_ll_disable_all_intr(hal->dma_regs);
+
+    return ESP_OK;
 }
 
 uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal)
diff --git a/components/hal/esp32/include/hal/emac_ll.h b/components/hal/esp32/include/hal/emac_ll.h
index 625687b6a0..bea18961bc 100644
--- a/components/hal/esp32/include/hal/emac_ll.h
+++ b/components/hal/esp32/include/hal/emac_ll.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -344,6 +336,12 @@ static inline void emac_ll_clear(emac_mac_dev_t *mac_regs)
     mac_regs->gmacfc.val = 0;
 }
 
+/* emacdebug */
+static inline uint32_t emac_ll_transmit_frame_ctrl_status(emac_mac_dev_t *mac_regs)
+{
+    return mac_regs->emacdebug.mactfcs;
+}
+
 /* emacmiidata */
 static inline void emac_ll_set_phy_data(emac_mac_dev_t *mac_regs, uint32_t data)
 {
diff --git a/components/hal/include/hal/emac_hal.h b/components/hal/include/hal/emac_hal.h
index f661e58985..fd99b584be 100644
--- a/components/hal/include/hal/emac_hal.h
+++ b/components/hal/include/hal/emac_hal.h
@@ -1,16 +1,8 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -222,7 +214,7 @@ void emac_hal_set_address(emac_hal_context_t *hal, uint8_t *mac_addr);
 
 void emac_hal_start(emac_hal_context_t *hal);
 
-void emac_hal_stop(emac_hal_context_t *hal);
+esp_err_t emac_hal_stop(emac_hal_context_t *hal);
 
 uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal);
 
diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt
index ed04d2131f..3529952230 100644
--- a/tools/ci/check_copyright_ignore.txt
+++ b/tools/ci/check_copyright_ignore.txt
@@ -1131,7 +1131,6 @@ components/hal/esp32/include/hal/can_types.h
 components/hal/esp32/include/hal/clk_gate_ll.h
 components/hal/esp32/include/hal/cpu_ll.h
 components/hal/esp32/include/hal/dac_ll.h
-components/hal/esp32/include/hal/emac_ll.h
 components/hal/esp32/include/hal/i2c_ll.h
 components/hal/esp32/include/hal/i2s_ll.h
 components/hal/esp32/include/hal/interrupt_controller_ll.h
@@ -1298,7 +1297,6 @@ components/hal/include/hal/cpu_types.h
 components/hal/include/hal/dac_hal.h
 components/hal/include/hal/dac_types.h
 components/hal/include/hal/ds_hal.h
-components/hal/include/hal/emac_hal.h
 components/hal/include/hal/esp_flash_err.h
 components/hal/include/hal/eth_types.h
 components/hal/include/hal/gpio_hal.h