Merge branch 'feature/usj_support_h2' into 'master'

USJ console support on esp32h2

Closes IDF-6239

See merge request espressif/esp-idf!22156

components/bootloader_support/src/bootloader_console.c

@@ -17,20 +17,6 @@
 #if CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/usb/cdc_acm.h"
 #include "esp32s2/rom/usb/usb_common.h"
-#elif CONFIG_IDF_TARGET_ESP32C3
-#include "esp32c3/rom/ets_sys.h"
-#include "esp32c3/rom/uart.h"
-#elif CONFIG_IDF_TARGET_ESP32S3
-#include "esp32s3/rom/uart.h"
-#elif CONFIG_IDF_TARGET_ESP32H4
-#include "esp32h4/rom/ets_sys.h"
-#include "esp32h4/rom/uart.h"
-#elif CONFIG_IDF_TARGET_ESP32C2
-#include "esp32c2/rom/ets_sys.h"
-#include "esp32c2/rom/uart.h"
-#elif CONFIG_IDF_TARGET_ESP32C6
-#include "esp32c6/rom/ets_sys.h"
-#include "esp32c6/rom/uart.h"
 #endif
 #include "esp_rom_gpio.h"
 #include "esp_rom_uart.h"
@@ -117,7 +103,6 @@ void bootloader_console_init(void)
 #ifdef CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
 void bootloader_console_init(void)
 {
-    UartDevice *uart = GetUartDevice();
+    esp_rom_uart_switch_buffer(ESP_ROM_USB_SERIAL_DEVICE_NUM);
-    uart->buff_uart_no = ESP_ROM_USB_SERIAL_DEVICE_NUM;
 }
 #endif //CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG

components/esp_rom/esp32/Kconfig.soc_caps.in

@@ -19,6 +19,10 @@ config ESP_ROM_HAS_JPEG_DECODE
     bool
     default y
 
+config ESP_ROM_HAS_UART_BUF_SWITCH
+    bool
+    default y
+
 config ESP_ROM_NEEDS_SWSETUP_WORKAROUND
     bool
     default y

components/esp_rom/esp32/esp_rom_caps.h

@@ -10,4 +10,5 @@
 #define ESP_ROM_HAS_CRC_BE              (1) // ROM CRC library supports Big Endian
 #define ESP_ROM_HAS_MZ_CRC32            (1) // ROM has mz_crc32 function
 #define ESP_ROM_HAS_JPEG_DECODE         (1) // ROM has JPEG decode library
+#define ESP_ROM_HAS_UART_BUF_SWITCH     (1) // ROM has exported the uart buffer switch function
 #define ESP_ROM_NEEDS_SWSETUP_WORKAROUND    (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing

components/esp_rom/esp32/ld/esp32.rom.api.ld

@@ -26,6 +26,7 @@ PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
 PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
 PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+PROVIDE ( esp_rom_uart_switch_buffer  = uart_buff_switch );
 
 /* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
 /* so here we directly assign the symbols with the ROM API address */

components/esp_rom/esp32c6/ld/esp32c6.rom.api.ld

@@ -24,7 +24,7 @@ PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
 PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
 
 PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
-PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char2 );
 PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
 PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
 PROVIDE ( esp_rom_uart_rx_string      = UartRxString );

components/esp_rom/esp32h2/ld/esp32h2.rom.api.ld

@@ -24,7 +24,7 @@ PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
 PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
 
 PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
-PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char2 );
 PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
 PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
 PROVIDE ( esp_rom_uart_rx_string      = UartRxString );

components/esp_rom/esp32s2/Kconfig.soc_caps.in

@@ -11,6 +11,10 @@ config ESP_ROM_HAS_MZ_CRC32
     bool
     default y
 
+config ESP_ROM_HAS_UART_BUF_SWITCH
+    bool
+    default y
+
 config ESP_ROM_NEEDS_SWSETUP_WORKAROUND
     bool
     default y

components/esp_rom/esp32s2/esp_rom_caps.h

@@ -8,5 +8,6 @@
 
 #define ESP_ROM_HAS_CRC_LE                  (1) // ROM CRC library supports Little Endian
 #define ESP_ROM_HAS_MZ_CRC32                (1) // ROM has mz_crc32 function
+#define ESP_ROM_HAS_UART_BUF_SWITCH         (1) // ROM has exported the uart buffer switch function
 #define ESP_ROM_NEEDS_SWSETUP_WORKAROUND    (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing
 #define ESP_ROM_HAS_REGI2C_BUG              (1) // ROM has the regi2c bug

components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld

@@ -27,6 +27,7 @@ PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
 PROVIDE ( esp_rom_uart_usb_acm_init   = Uart_Init_USB );
 PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+PROVIDE ( esp_rom_uart_switch_buffer  = uart_buff_switch );
 
 /* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
 /* so here we directly assign the symbols with the ROM API address */

components/esp_rom/include/esp_rom_uart.h

@@ -1,16 +1,8 @@
-// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+/*
-//
+ * SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
-// Licensed under the Apache License, Version 2.0 (the "License");
+ *
-// you may not use this file except in compliance with the License.
+ * SPDX-License-Identifier: Apache-2.0
-// You may obtain a copy of the License at
+ */
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 
 #pragma once
 
@@ -91,10 +83,23 @@ int esp_rom_uart_rx_string(uint8_t *str, uint8_t max_len);
 /**
  * @brief Set the UART port used by ets_printf.
  *
+ * @note USB-CDC port is also treated as "UART" port in the ROM code.
+ *       Use ESP_ROM_USB_SERIAL_DEVICE_NUM or ESP_ROM_USB_OTG_NUM to identify USB_SERIAL_JTAG and USB_OTG, respectively.
+ *
  * @param uart_no UART port number
  */
 void esp_rom_uart_set_as_console(uint8_t uart_no);
 
+/**
+ * @brief Switch the UART port that will use a buffer for TX and RX.
+ *
+ * @note USB-CDC port is also treated as "UART" port in the ROM code.
+ *       Use ESP_ROM_USB_SERIAL_DEVICE_NUM or ESP_ROM_USB_OTG_NUM to identify USB_SERIAL_JTAG and USB_OTG, respectively.
+ *
+ * @param uart_no UART port number
+ */
+void esp_rom_uart_switch_buffer(uint8_t uart_no);
+
 /**
  * @brief Initialize the USB ACM UART
  * @note The ACM working memroy should be at least 128 bytes (ESP_ROM_CDC_ACM_WORK_BUF_MIN) in size.

components/esp_rom/patches/esp_rom_uart.c

@@ -10,6 +10,8 @@
 #include "sdkconfig.h"
 #include "hal/uart_ll.h"
 #include "hal/efuse_hal.h"
+#include "esp_rom_caps.h"
+#include "rom/uart.h"
 
 #if CONFIG_IDF_TARGET_ESP32
 /**
@@ -47,3 +49,11 @@ IRAM_ATTR void esp_rom_uart_set_as_console(uint8_t uart_no)
     uart_tx_switch(uart_no);
 }
 #endif
+
+#if !ESP_ROM_HAS_UART_BUF_SWITCH
+IRAM_ATTR void esp_rom_uart_switch_buffer(uint8_t uart_no)
+{
+    UartDevice *uart = GetUartDevice();
+    uart->buff_uart_no = uart_no;
+}
+#endif // !ESP_ROM_HAS_UART_BUF_SWITCH

components/hal/esp32h2/include/hal/usb_phy_ll.h

@@ -0,0 +1,34 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/usb_serial_jtag_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configures the internal PHY for USB_Serial_JTAG
+ *
+ * @param hw Start address of the USB Serial_JTAG registers
+ */
+static inline void usb_phy_ll_int_jtag_enable(usb_serial_jtag_dev_t *hw)
+{
+    // USB_Serial_JTAG use internal PHY
+    hw->conf0.phy_sel = 0;
+    // Disable software control USB D+ D- pullup pulldown (Device FS: dp_pullup = 1)
+    hw->conf0.pad_pull_override = 0;
+    // Enable USB D+ pullup
+    hw->conf0.dp_pullup = 1;
+    // Enable USB pad function
+    hw->conf0.usb_pad_enable = 1;
+}
+
+#ifdef __cplusplus
+}
+#endif

components/hal/esp32h2/include/hal/usb_serial_jtag_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */

components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -23,6 +23,10 @@ config SOC_IEEE802154_BLE_ONLY
     bool
     default y
 
+config SOC_USB_SERIAL_JTAG_SUPPORTED
+    bool
+    default y
+
 config SOC_EFUSE_KEY_PURPOSE_FIELD
     bool
     default y

components/soc/esp32h2/include/soc/soc_caps.h

@@ -36,7 +36,7 @@
 // #define SOC_IEEE802154_SUPPORTED        1 // TODO: IDF-6577
 #define SOC_GPTIMER_SUPPORTED              1
 #define SOC_IEEE802154_BLE_ONLY            1
-// #define SOC_USB_SERIAL_JTAG_SUPPORTED   1 // TODO: IDF-6239
+#define SOC_USB_SERIAL_JTAG_SUPPORTED   1
 // #define SOC_TEMP_SENSOR_SUPPORTED       1 // TODO: IDF-6229
 // #define SOC_SUPPORTS_SECURE_DL_MODE     1 // TODO: IDF-6281
 //#define SOC_RISCV_COPROC_SUPPORTED       1 // TODO: IDF-6272

docs/docs_not_updated/esp32h2.txt

@@ -28,7 +28,6 @@ api-guides/startup
 api-guides/RF_calibration
 api-guides/blufi
 api-guides/coexist
-api-guides/usb-serial-jtag-console
 api-guides/wifi
 api-guides/usb-otg-console
 api-guides/wireshark-user-guide

docs/en/api-guides/jtag-debugging/configure-builtin-jtag.rst

@@ -6,8 +6,8 @@
 Configure {IDF_TARGET_NAME} built-in JTAG Interface
 ===================================================
 
-{IDF_TARGET_JTAG_PIN_Dneg:default="Not Updated!", esp32c3="GPIO18", esp32c6="GPIO12", esp32s3="GPIO19"}
+{IDF_TARGET_JTAG_PIN_Dneg:default="Not Updated!", esp32c3="GPIO18", esp32c6="GPIO12", esp32s3="GPIO19", esp32h2="GPIO26"}
-{IDF_TARGET_JTAG_PIN_Dpos:default="Not Updated!", esp32c3="GPIO19", esp32c6="GPIO13", esp32s3="GPIO20"}
+{IDF_TARGET_JTAG_PIN_Dpos:default="Not Updated!", esp32c3="GPIO19", esp32c6="GPIO13", esp32s3="GPIO20", esp32h2="GPIO27"}
 
 {IDF_TARGET_NAME} has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary. The necessary connections are shown in the following section.
 

docs/en/api-guides/usb-serial-jtag-console.rst

@@ -13,8 +13,8 @@ Note that, in contrast with the USB OTG peripheral in some Espressif chips, the
 Hardware Requirements
 =====================
 
-{IDF_TARGET_USB_DP_GPIO:default="Not Updated!",esp32c3="19",esp32s3="20", esp32c6="13"}
+{IDF_TARGET_USB_DP_GPIO:default="Not Updated!",esp32c3="19",esp32s3="20", esp32c6="13", esp32h2="27"}
-{IDF_TARGET_USB_DM_GPIO:default="Not Updated!",esp32c3="18",esp32s3="19", esp32c6="12"}
+{IDF_TARGET_USB_DM_GPIO:default="Not Updated!",esp32c3="18",esp32s3="19", esp32c6="12", esp32h2="26"}
 
 Connect {IDF_TARGET_NAME} to the USB port as follows:
 

tools/ci/check_copyright_ignore.txt

@@ -539,7 +539,6 @@ components/esp_rom/include/esp32s3/rom/usb/usb_os_glue.h
 components/esp_rom/include/esp32s3/rom/usb/usb_persist.h
 components/esp_rom/include/esp_rom_crc.h
 components/esp_rom/include/esp_rom_gpio.h
-components/esp_rom/include/esp_rom_uart.h
 components/esp_rom/include/linux/soc/reset_reasons.h
 components/esp_rom/linux/esp_rom_crc.c
 components/esp_rom/linux/esp_rom_md5.c